Documentation/devicetree/bindings/net/tesla,fsd-ethqos.yaml


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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/tesla,fsd-ethqos.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: FSD Ethernet Quality of Service

maintainers:
  - Swathi K S <swathi.ks@samsung.com>

description:
  Tesla ethernet devices based on dwmmac support Gigabit ethernet.

allOf:
  - $ref: snps,dwmac.yaml#

properties:
  compatible:
    const: tesla,fsd-ethqos

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  interrupt-names:
    items:
      - const: macirq

  clocks:
    minItems: 5
    items:
      - description: PTP clock
      - description: Master bus clock
      - description: Slave bus clock
      - description: MAC TX clock
      - description: MAC RX clock
      - description: Master2 bus clock
      - description: Slave2 bus clock
      - description: RX MUX clock
      - description: PHY RX clock
      - description: PERIC RGMII clock

  clock-names:
    minItems: 5
    items:
      - const: ptp_ref
      - const: master_bus
      - const: slave_bus
      - const: tx
      - const: rx
      - const: master2_bus
      - const: slave2_bus
      - const: eqos_rxclk_mux
      - const: eqos_phyrxclk
      - const: dout_peric_rgmii_clk

  iommus:
    maxItems: 1

  phy-mode:
    enum:
      - rgmii
      - rgmii-id
      - rgmii-rxid
      - rgmii-txid

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - iommus
  - phy-mode

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/fsd-clk.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    soc {
        #address-cells = <2>;
        #size-cells = <2>;
        ethernet1: ethernet@14300000 {
            compatible = "tesla,fsd-ethqos";
            reg = <0x0 0x14300000 0x0 0x10000>;
            interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
            interrupt-names = "macirq";
            clocks = <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_PTP_REF_I>,
                     <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_ACLK_I>,
                     <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_HCLK_I>,
                     <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_RGMII_CLK_I>,
                     <&clock_peric PERIC_EQOS_TOP_IPCLKPORT_CLK_RX_I>,
                     <&clock_peric PERIC_BUS_D_PERIC_IPCLKPORT_EQOSCLK>,
                     <&clock_peric PERIC_BUS_P_PERIC_IPCLKPORT_EQOSCLK>,
                     <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
                     <&clock_peric PERIC_EQOS_PHYRXCLK>,
                     <&clock_peric PERIC_DOUT_RGMII_CLK>;
            clock-names = "ptp_ref", "master_bus", "slave_bus","tx",
                          "rx", "master2_bus", "slave2_bus", "eqos_rxclk_mux",
                          "eqos_phyrxclk","dout_peric_rgmii_clk";
            assigned-clocks = <&clock_peric PERIC_EQOS_PHYRXCLK_MUX>,
                              <&clock_peric PERIC_EQOS_PHYRXCLK>;
            assigned-clock-parents = <&clock_peric PERIC_EQOS_PHYRXCLK>;
            pinctrl-names = "default";
            pinctrl-0 = <&eth1_tx_clk>, <&eth1_tx_data>, <&eth1_tx_ctrl>,
                        <&eth1_phy_intr>, <&eth1_rx_clk>, <&eth1_rx_data>,
                        <&eth1_rx_ctrl>, <&eth1_mdio>;
            iommus = <&smmu_peric 0x0 0x1>;
            phy-mode = "rgmii-id";
        };
    };

...