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# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/hisilicon,hi3798cv200-combphy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: HiSilicon STB PCIE/SATA/USB3 PHY
maintainers:
- Shawn Guo <shawn.guo@linaro.org>
properties:
compatible:
const: hisilicon,hi3798cv200-combphy
reg:
maxItems: 1
'#phy-cells':
description: The cell contains the PHY mode
const: 1
clocks:
maxItems: 1
resets:
maxItems: 1
hisilicon,fixed-mode:
description: If the phy device doesn't support mode select but a fixed mode
setting, the property should be present to specify the particular mode.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [ 1, 2, 4] # SATA, PCIE, USB3
hisilicon,mode-select-bits:
description: If the phy device support mode select, this property should be
present to specify the register bits in peripheral controller.
items:
- description: register_offset
- description: bit shift
- description: bit mask
required:
- compatible
- reg
- '#phy-cells'
- clocks
- resets
oneOf:
- required: ['hisilicon,fixed-mode']
- required: ['hisilicon,mode-select-bits']
additionalProperties: false
...
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