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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/nuvoton,nau8325.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NAU8325 audio Amplifier
maintainers:
- Seven Lee <WTLI@nuvoton.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
const: nuvoton,nau8325
reg:
maxItems: 1
nuvoton,vref-impedance-ohms:
description:
The vref impedance to be used in ohms. Middle of voltage enables
Tie-Off selection options. Due to the high impedance of the VREF
pin, it is important to use a low-leakage capacitor.
enum: [0, 25000, 125000, 2500]
nuvoton,dac-vref-microvolt:
description:
The DAC vref to be used in voltage. DAC reference voltage setting. Can
be used for minor tuning of the output level. Since the VDDA is range
between 1.62 to 1.98 voltage, the typical value for design is 1.8V. After
the minor tuning, the final microvolt are as the below.
enum: [1800000, 2700000, 2880000, 3060000]
nuvoton,alc-enable:
description:
Enable digital automatic level control (ALC) function.
type: boolean
nuvoton,clock-detection-disable:
description:
When clock detection is enabled, it will detect whether MCLK
and FS are within the range. MCLK range is from 2.048MHz to 24.576MHz.
FS range is from 8kHz to 96kHz. And also needs to detect the ratio
MCLK_SRC/LRCK of 256, 400 or 500, and needs to detect the BCLK
to make sure data is present. There needs to be at least 8 BCLK
cycles per Frame Sync.
type: boolean
nuvoton,clock-det-data:
description:
Request clock detection to require 2048 non-zero samples before enabling
the audio paths. If set then non-zero samples is required, otherwise it
doesn't matter.
type: boolean
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec@21 {
compatible = "nuvoton,nau8325";
reg = <0x21>;
nuvoton,vref-impedance-ohms = <125000>;
nuvoton,dac-vref-microvolt = <2880000>;
nuvoton,alc-enable;
nuvoton,clock-det-data;
};
};
|
