summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
blob: 4380bb6fa2f08a475b557e80467abc2861f622e2 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/snps,dwc3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Synopsys DesignWare USB3 Controller

maintainers:
  - Felipe Balbi <balbi@kernel.org>

description:
  This is usually a subnode to DWC3 glue to which it is connected, but can also
  be presented as a standalone DT node with an optional vendor-specific
  compatible string.

allOf:
  - $ref: snps,dwc3-common.yaml#

properties:
  compatible:
    contains:
      oneOf:
        - const: snps,dwc3
        - const: synopsys,dwc3
          deprecated: true

  reg:
    maxItems: 1

  interrupts:
    description:
      It's either a single common DWC3 interrupt (dwc_usb3) or individual
      interrupts for the host, gadget and DRD modes.
    minItems: 1
    maxItems: 4

  interrupt-names:
    minItems: 1
    maxItems: 4
    oneOf:
      - const: dwc_usb3
      - items:
          enum: [host, peripheral, otg, wakeup]

  clocks:
    description:
      In general the core supports three types of clocks. bus_early is a
      SoC Bus Clock (AHB/AXI/Native). ref generates ITP when the UTMI/ULPI
      PHY is suspended. suspend clocks a small part of the USB3 core when
      SS PHY in P3. But particular cases may differ from that having less
      or more clock sources with another names.

  clock-names:
    contains:
      anyOf:
        - enum: [bus_early, ref, suspend]
        - true

  dma-coherent: true

  iommus:
    maxItems: 1

  power-domains:
    description:
      The DWC3 has 2 power-domains. The power management unit (PMU) and
      everything else. The PMU is typically always powered and may not have an
      entry.
    minItems: 1
    items:
      - description: Core
      - description: Power management unit

  resets:
    minItems: 1

unevaluatedProperties: false

required:
  - compatible
  - reg
  - interrupts

examples:
  - |
    usb@4a030000 {
      compatible = "snps,dwc3";
      reg = <0x4a030000 0xcfff>;
      interrupts = <0 92 4>;
      usb-phy = <&usb2_phy>, <&usb3_phy>;
      snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
    };
  - |
    usb@4a000000 {
      compatible = "snps,dwc3";
      reg = <0x4a000000 0xcfff>;
      interrupts = <0 92 4>;
      clocks = <&clk 1>, <&clk 2>, <&clk 3>;
      clock-names = "bus_early", "ref", "suspend";
      phys = <&usb2_phy>, <&usb3_phy>;
      phy-names = "usb2-phy", "usb3-phy";
      snps,dis_u2_susphy_quirk;
      snps,dis_enblslpm_quirk;
    };
...