summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/lan966x-pcb8291.dts
blob: 24d9055c4a08c679892e77922a42bf66307fb319 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * lan966x_pcb8291.dts - Device Tree file for PCB8291
 */
/dts-v1/;
#include "lan966x.dtsi"
#include "dt-bindings/phy/phy-lan966x-serdes.h"

/ {
	model = "Microchip EVB - LAN9662";
	compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	aliases {
		serial0 = &usart3;
	};

	gpio-restart {
		compatible = "gpio-restart";
		gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
		priority = <200>;
	};
};

&gpio {
	fc3_b_pins: fc3-b-pins {
		/* RX, TX */
		pins = "GPIO_52", "GPIO_53";
		function = "fc3_b";
	};

	can0_b_pins:  can0-b-pins {
		/* RX, TX */
		pins = "GPIO_35", "GPIO_36";
		function = "can0_b";
	};
};

&can0 {
	pinctrl-0 = <&can0_b_pins>;
	pinctrl-names = "default";
	status = "disabled"; /* Conflict with switch */
};

&flx3 {
	atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
	status = "okay";

	usart3: serial@200 {
		pinctrl-0 = <&fc3_b_pins>;
		pinctrl-names = "default";
		status = "okay";
	};
};

&mdio1 {
	status = "okay";
};

&phy0 {
	status = "okay";
};

&phy1 {
	status = "okay";
};

&port0 {
	phy-handle = <&phy0>;
	phy-mode = "gmii";
	phys = <&serdes 0 CU(0)>;
	status = "okay";
};

&port1 {
	phy-handle = <&phy1>;
	phy-mode = "gmii";
	phys = <&serdes 1 CU(1)>;
	status = "okay";
};

&serdes {
	status = "okay";
};

&switch {
	status = "okay";
};

&watchdog {
	status = "okay";
};