summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/meson8b.dtsi
blob: 828aa49c678cd4bc484648d6dd339b9f515a2f11 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
/*
 * Copyright 2015 Endless Mobile, Inc.
 * Author: Carlo Caione <carlo@endlessm.com>
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This library is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This library is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 *     You should have received a copy of the GNU General Public License
 *     along with this program. If not, see <http://www.gnu.org/licenses/>.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/clock/meson8b-clkc.h>
#include <dt-bindings/gpio/meson8b-gpio.h>
#include <dt-bindings/reset/amlogic,meson8b-reset.h>
#include "skeleton.dtsi"

/ {
	interrupt-parent = <&gic>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a5";
			next-level-cache = <&L2>;
			reg = <0x200>;
		};

		cpu@201 {
			device_type = "cpu";
			compatible = "arm,cortex-a5";
			next-level-cache = <&L2>;
			reg = <0x201>;
		};

		cpu@202 {
			device_type = "cpu";
			compatible = "arm,cortex-a5";
			next-level-cache = <&L2>;
			reg = <0x202>;
		};

		cpu@203 {
			device_type = "cpu";
			compatible = "arm,cortex-a5";
			next-level-cache = <&L2>;
			reg = <0x203>;
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		L2: l2-cache-controller@c4200000 {
			compatible = "arm,pl310-cache";
			reg = <0xc4200000 0x1000>;
			cache-unified;
			cache-level = <2>;
		};

		gic: interrupt-controller@c4301000 {
			compatible = "arm,cortex-a9-gic";
			reg = <0xc4301000 0x1000>,
			      <0xc4300100 0x0100>;
			interrupt-controller;
			#interrupt-cells = <3>;
		};

		reset: reset-controller@c1104404 {
			compatible = "amlogic,meson8b-reset";
			reg = <0xc1104404 0x20>;
			#reset-cells = <1>;
		};

		wdt: watchdog@c1109900 {
			compatible = "amlogic,meson8b-wdt";
			reg = <0xc1109900 0x8>;
			interrupts = <0 0 1>;
		};

		timer@c1109940 {
			compatible = "amlogic,meson6-timer";
			reg = <0xc1109940 0x18>;
			interrupts = <0 10 1>;
		};

		uart_AO: serial@c81004c0 {
			compatible = "amlogic,meson-uart";
			reg = <0xc81004c0 0x18>;
			interrupts = <0 90 1>;
			clocks = <&clkc CLKID_CLK81>;
			status = "disabled";
		};

		uart_A: serial@c11084c0 {
			compatible = "amlogic,meson-uart";
			reg = <0xc11084c0 0x18>;
			interrupts = <0 26 1>;
			clocks = <&clkc CLKID_CLK81>;
			status = "disabled";
		};

		uart_B: serial@c11084dc {
			compatible = "amlogic,meson-uart";
			reg = <0xc11084dc 0x18>;
			interrupts = <0 75 1>;
			clocks = <&clkc CLKID_CLK81>;
			status = "disabled";
		};

		uart_C: serial@c1108700 {
			compatible = "amlogic,meson-uart";
			reg = <0xc1108700 0x18>;
			interrupts = <0 93 1>;
			clocks = <&clkc CLKID_CLK81>;
			status = "disabled";
		};

		clkc: clock-controller@c1104000 {
			#clock-cells = <1>;
			compatible = "amlogic,meson8b-clkc";
			reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
		};

		pwm_ab: pwm@8550 {
			compatible = "amlogic,meson8b-pwm";
			reg = <0xc1108550 0x10>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pwm_cd: pwm@8650 {
			compatible = "amlogic,meson8b-pwm";
			reg = <0xc1108650 0x10>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pwm_ef: pwm@86c0 {
			compatible = "amlogic,meson8b-pwm";
			reg = <0xc11086c0 0x10>;
			#pwm-cells = <3>;
			status = "disabled";
		};

		pinctrl_cbus: pinctrl@c1109880 {
			compatible = "amlogic,meson8b-cbus-pinctrl";
			reg = <0xc1109880 0x10>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			gpio: banks@c11080b0 {
				reg = <0xc11080b0 0x28>,
				      <0xc11080e8 0x18>,
				      <0xc1108120 0x18>,
				      <0xc1108030 0x38>;
				reg-names = "mux", "pull", "pull-enable", "gpio";
				gpio-controller;
				#gpio-cells = <2>;
				gpio-ranges = <&pinctrl_cbus 0 0 130>;
			};
		};

		pinctrl_aobus: pinctrl@c8100084 {
			compatible = "amlogic,meson8b-aobus-pinctrl";
			reg = <0xc8100084 0xc>;
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			gpio_ao: ao-bank@c1108030 {
				reg = <0xc8100014 0x4>,
				      <0xc810002c 0x4>,
				      <0xc8100024 0x8>;
				reg-names = "mux", "pull", "gpio";
				gpio-controller;
				#gpio-cells = <2>;
				gpio-ranges = <&pinctrl_aobus 0 130 16>;
			};

			uart_ao_a_pins: uart_ao_a {
				mux {
					groups = "uart_tx_ao_a", "uart_rx_ao_a";
					function = "uart_ao";
				};
			};
		};
	};
}; /* end of / */