summaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap1/io.c
blob: 1f20fe99be57dd5829ba3e8aafe2c53118e1ac1e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
// SPDX-License-Identifier: GPL-2.0-only
/*
 * linux/arch/arm/mach-omap1/io.c
 *
 * OMAP1 I/O mapping code
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/omap-dma.h>

#include <asm/tlb.h>
#include <asm/mach/map.h>

#include "tc.h"
#include "iomap.h"
#include "common.h"

/*
 * The machine specific code may provide the extra mapping besides the
 * default mapping provided here.
 */
static struct map_desc omap1_io_desc[] __initdata = {
	{
		.virtual	= OMAP1_IO_VIRT,
		.pfn		= __phys_to_pfn(OMAP1_IO_PHYS),
		.length		= OMAP1_IO_SIZE,
		.type		= MT_DEVICE
	}, {
		.virtual	= OMAP1_DSP_BASE,
		.pfn		= __phys_to_pfn(OMAP1_DSP_START),
		.length		= OMAP1_DSP_SIZE,
		.type		= MT_DEVICE
	}, {
		.virtual	= OMAP1_DSPREG_BASE,
		.pfn		= __phys_to_pfn(OMAP1_DSPREG_START),
		.length		= OMAP1_DSPREG_SIZE,
		.type		= MT_DEVICE
	}
};

/*
 * Maps common IO regions for omap1
 */
void __init omap1_map_io(void)
{
	iotable_init(omap1_io_desc, ARRAY_SIZE(omap1_io_desc));
}

/*
 * Common low-level hardware init for omap1.
 */
void __init omap1_init_early(void)
{
	omap_check_revision();

	/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
	 * on a Posted Write in the TIPB Bridge".
	 */
	omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
	omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
}

void __init omap1_init_late(void)
{
	omap_serial_wakeup_init();
}

/*
 * NOTE: Please use ioremap + __raw_read/write where possible instead of these
 */

u8 omap_readb(u32 pa)
{
	return __raw_readb(OMAP1_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_readb);

u16 omap_readw(u32 pa)
{
	return __raw_readw(OMAP1_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_readw);

u32 omap_readl(u32 pa)
{
	return __raw_readl(OMAP1_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_readl);

void omap_writeb(u8 v, u32 pa)
{
	__raw_writeb(v, OMAP1_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_writeb);

void omap_writew(u16 v, u32 pa)
{
	__raw_writew(v, OMAP1_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_writew);

void omap_writel(u32 v, u32 pa)
{
	__raw_writel(v, OMAP1_IO_ADDRESS(pa));
}
EXPORT_SYMBOL(omap_writel);