summaryrefslogtreecommitdiff
path: root/arch/arm/plat-s5p/sysmmu.c
blob: c8bec9c7655d417ebbcb78096f16a7cbeddcf54d (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
/* linux/arch/arm/plat-s5p/sysmmu.c
 *
 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/io.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/export.h>

#include <asm/pgtable.h>

#include <mach/map.h>
#include <mach/regs-sysmmu.h>
#include <plat/sysmmu.h>

#define CTRL_ENABLE	0x5
#define CTRL_BLOCK	0x7
#define CTRL_DISABLE	0x0

static struct device *dev;

static unsigned short fault_reg_offset[SYSMMU_FAULTS_NUM] = {
	S5P_PAGE_FAULT_ADDR,
	S5P_AR_FAULT_ADDR,
	S5P_AW_FAULT_ADDR,
	S5P_DEFAULT_SLAVE_ADDR,
	S5P_AR_FAULT_ADDR,
	S5P_AR_FAULT_ADDR,
	S5P_AW_FAULT_ADDR,
	S5P_AW_FAULT_ADDR
};

static char *sysmmu_fault_name[SYSMMU_FAULTS_NUM] = {
	"PAGE FAULT",
	"AR MULTI-HIT FAULT",
	"AW MULTI-HIT FAULT",
	"BUS ERROR",
	"AR SECURITY PROTECTION FAULT",
	"AR ACCESS PROTECTION FAULT",
	"AW SECURITY PROTECTION FAULT",
	"AW ACCESS PROTECTION FAULT"
};

static int (*fault_handlers[S5P_SYSMMU_TOTAL_IPNUM])(
		enum S5P_SYSMMU_INTERRUPT_TYPE itype,
		unsigned long pgtable_base,
		unsigned long fault_addr);

/*
 * If adjacent 2 bits are true, the system MMU is enabled.
 * The system MMU is disabled, otherwise.
 */
static unsigned long sysmmu_states;

static inline void set_sysmmu_active(sysmmu_ips ips)
{
	sysmmu_states |= 3 << (ips * 2);
}

static inline void set_sysmmu_inactive(sysmmu_ips ips)
{
	sysmmu_states &= ~(3 << (ips * 2));
}

static inline int is_sysmmu_active(sysmmu_ips ips)
{
	return sysmmu_states & (3 << (ips * 2));
}

static void __iomem *sysmmusfrs[S5P_SYSMMU_TOTAL_IPNUM];

static inline void sysmmu_block(sysmmu_ips ips)
{
	__raw_writel(CTRL_BLOCK, sysmmusfrs[ips] + S5P_MMU_CTRL);
	dev_dbg(dev, "%s is blocked.\n", sysmmu_ips_name[ips]);
}

static inline void sysmmu_unblock(sysmmu_ips ips)
{
	__raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
	dev_dbg(dev, "%s is unblocked.\n", sysmmu_ips_name[ips]);
}

static inline void __sysmmu_tlb_invalidate(sysmmu_ips ips)
{
	__raw_writel(0x1, sysmmusfrs[ips] + S5P_MMU_FLUSH);
	dev_dbg(dev, "TLB of %s is invalidated.\n", sysmmu_ips_name[ips]);
}

static inline void __sysmmu_set_ptbase(sysmmu_ips ips, unsigned long pgd)
{
	if (unlikely(pgd == 0)) {
		pgd = (unsigned long)ZERO_PAGE(0);
		__raw_writel(0x20, sysmmusfrs[ips] + S5P_MMU_CFG); /* 4KB LV1 */
	} else {
		__raw_writel(0x0, sysmmusfrs[ips] + S5P_MMU_CFG); /* 16KB LV1 */
	}

	__raw_writel(pgd, sysmmusfrs[ips] + S5P_PT_BASE_ADDR);

	dev_dbg(dev, "Page table base of %s is initialized with 0x%08lX.\n",
						sysmmu_ips_name[ips], pgd);
	__sysmmu_tlb_invalidate(ips);
}

void sysmmu_set_fault_handler(sysmmu_ips ips,
			int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
					unsigned long pgtable_base,
					unsigned long fault_addr))
{
	BUG_ON(!((ips >= SYSMMU_MDMA) && (ips < S5P_SYSMMU_TOTAL_IPNUM)));
	fault_handlers[ips] = handler;
}

static irqreturn_t s5p_sysmmu_irq(int irq, void *dev_id)
{
	/* SYSMMU is in blocked when interrupt occurred. */
	unsigned long base = 0;
	sysmmu_ips ips = (sysmmu_ips)dev_id;
	enum S5P_SYSMMU_INTERRUPT_TYPE itype;

	itype = (enum S5P_SYSMMU_INTERRUPT_TYPE)
		__ffs(__raw_readl(sysmmusfrs[ips] + S5P_INT_STATUS));

	BUG_ON(!((itype >= 0) && (itype < 8)));

	dev_alert(dev, "%s occurred by %s.\n", sysmmu_fault_name[itype],
							sysmmu_ips_name[ips]);

	if (fault_handlers[ips]) {
		unsigned long addr;

		base = __raw_readl(sysmmusfrs[ips] + S5P_PT_BASE_ADDR);
		addr = __raw_readl(sysmmusfrs[ips] + fault_reg_offset[itype]);

		if (fault_handlers[ips](itype, base, addr)) {
			__raw_writel(1 << itype,
					sysmmusfrs[ips] + S5P_INT_CLEAR);
			dev_notice(dev, "%s from %s is resolved."
					" Retrying translation.\n",
				sysmmu_fault_name[itype], sysmmu_ips_name[ips]);
		} else {
			base = 0;
		}
	}

	sysmmu_unblock(ips);

	if (!base)
		dev_notice(dev, "%s from %s is not handled.\n",
			sysmmu_fault_name[itype], sysmmu_ips_name[ips]);

	return IRQ_HANDLED;
}

void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd)
{
	if (is_sysmmu_active(ips)) {
		sysmmu_block(ips);
		__sysmmu_set_ptbase(ips, pgd);
		sysmmu_unblock(ips);
	} else {
		dev_dbg(dev, "%s is disabled. "
			"Skipping initializing page table base.\n",
						sysmmu_ips_name[ips]);
	}
}

void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd)
{
	if (!is_sysmmu_active(ips)) {
		sysmmu_clk_enable(ips);

		__sysmmu_set_ptbase(ips, pgd);

		__raw_writel(CTRL_ENABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);

		set_sysmmu_active(ips);
		dev_dbg(dev, "%s is enabled.\n", sysmmu_ips_name[ips]);
	} else {
		dev_dbg(dev, "%s is already enabled.\n", sysmmu_ips_name[ips]);
	}
}

void s5p_sysmmu_disable(sysmmu_ips ips)
{
	if (is_sysmmu_active(ips)) {
		__raw_writel(CTRL_DISABLE, sysmmusfrs[ips] + S5P_MMU_CTRL);
		set_sysmmu_inactive(ips);
		sysmmu_clk_disable(ips);
		dev_dbg(dev, "%s is disabled.\n", sysmmu_ips_name[ips]);
	} else {
		dev_dbg(dev, "%s is already disabled.\n", sysmmu_ips_name[ips]);
	}
}

void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips)
{
	if (is_sysmmu_active(ips)) {
		sysmmu_block(ips);
		__sysmmu_tlb_invalidate(ips);
		sysmmu_unblock(ips);
	} else {
		dev_dbg(dev, "%s is disabled. "
			"Skipping invalidating TLB.\n", sysmmu_ips_name[ips]);
	}
}

static int s5p_sysmmu_probe(struct platform_device *pdev)
{
	int i, ret;
	struct resource *res, *mem;

	dev = &pdev->dev;

	for (i = 0; i < S5P_SYSMMU_TOTAL_IPNUM; i++) {
		int irq;

		sysmmu_clk_init(dev, i);
		sysmmu_clk_disable(i);

		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!res) {
			dev_err(dev, "Failed to get the resource of %s.\n",
							sysmmu_ips_name[i]);
			ret = -ENODEV;
			goto err_res;
		}

		mem = request_mem_region(res->start, resource_size(res),
					 pdev->name);
		if (!mem) {
			dev_err(dev, "Failed to request the memory region of %s.\n",
							sysmmu_ips_name[i]);
			ret = -EBUSY;
			goto err_res;
		}

		sysmmusfrs[i] = ioremap(res->start, resource_size(res));
		if (!sysmmusfrs[i]) {
			dev_err(dev, "Failed to ioremap() for %s.\n",
							sysmmu_ips_name[i]);
			ret = -ENXIO;
			goto err_reg;
		}

		irq = platform_get_irq(pdev, i);
		if (irq <= 0) {
			dev_err(dev, "Failed to get the IRQ resource of %s.\n",
							sysmmu_ips_name[i]);
			ret = -ENOENT;
			goto err_map;
		}

		if (request_irq(irq, s5p_sysmmu_irq, IRQF_DISABLED,
						pdev->name, (void *)i)) {
			dev_err(dev, "Failed to request IRQ for %s.\n",
							sysmmu_ips_name[i]);
			ret = -ENOENT;
			goto err_map;
		}
	}

	return 0;

err_map:
	iounmap(sysmmusfrs[i]);
err_reg:
	release_mem_region(mem->start, resource_size(mem));
err_res:
	return ret;
}

static int s5p_sysmmu_remove(struct platform_device *pdev)
{
	return 0;
}
int s5p_sysmmu_runtime_suspend(struct device *dev)
{
	return 0;
}

int s5p_sysmmu_runtime_resume(struct device *dev)
{
	return 0;
}

const struct dev_pm_ops s5p_sysmmu_pm_ops = {
	.runtime_suspend	= s5p_sysmmu_runtime_suspend,
	.runtime_resume		= s5p_sysmmu_runtime_resume,
};

static struct platform_driver s5p_sysmmu_driver = {
	.probe		= s5p_sysmmu_probe,
	.remove		= s5p_sysmmu_remove,
	.driver		= {
		.owner		= THIS_MODULE,
		.name		= "s5p-sysmmu",
		.pm		= &s5p_sysmmu_pm_ops,
	}
};

static int __init s5p_sysmmu_init(void)
{
	return platform_driver_register(&s5p_sysmmu_driver);
}
arch_initcall(s5p_sysmmu_init);