1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
|
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
* Copyright (c) 2021-2024, Arm Limited. All rights reserved.
*/
/dts-v1/;
#include "morello.dtsi"
/ {
model = "Arm Morello Fixed Virtual Platform";
compatible = "arm,morello-fvp", "arm,morello";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
bp_refclock24mhz: clock-24000000 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "bp:clock24mhz";
};
block_0: virtio_block@1c170000 {
compatible = "virtio,mmio";
reg = <0x0 0x1c170000 0x0 0x200>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
};
net_0: virtio_net@1c180000 {
compatible = "virtio,mmio";
reg = <0x0 0x1c180000 0x0 0x200>;
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
};
rng_0: virtio_rng@1c190000 {
compatible = "virtio,mmio";
reg = <0x0 0x1c190000 0x0 0x200>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
};
p9_0: virtio_p9@1c1a0000 {
compatible = "virtio,mmio";
reg = <0x0 0x1c1a0000 0x0 0x200>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
};
kmi_0: kmi@1c150000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x0 0x1c150000 0x0 0x1000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bp_refclock24mhz>, <&bp_refclock24mhz>;
clock-names = "KMIREFCLK", "apb_pclk";
};
kmi_1: kmi@1c160000 {
compatible = "arm,pl050", "arm,primecell";
reg = <0x0 0x1c160000 0x0 0x1000>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bp_refclock24mhz>, <&bp_refclock24mhz>;
clock-names = "KMIREFCLK", "apb_pclk";
};
eth_0: ethernet@1d100000 {
compatible = "smsc,lan91c111";
reg = <0x0 0x1d100000 0x0 0x10000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
};
};
&uart0 {
status = "okay";
};
|