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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2025 PHYTEC Messtechnik GmbH
* Author: Teresa Remmet <t.remmet@phytec.de>
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/imx8mm-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include "imx8mm-pinfunc.h"
&{/} {
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>;
default-brightness-level = <6>;
pwms = <&pwm4 0 50000 0>;
power-supply = <®_vdd_3v3_s>;
enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
brightness-levels= <0 4 8 16 32 64 128 255>;
};
panel {
compatible = "edt,etml1010g3dra";
backlight = <&backlight>;
power-supply = <®_vcc_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&bridge_out>;
};
};
};
reg_sound_1v8: regulator-1v8 {
compatible = "regulator-fixed";
regulator-name = "VCC_1V8_Audio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_sound_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "VCC_3V3_Analog";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
sound-peb-av-10 {
compatible = "simple-audio-card";
simple-audio-card,name = "snd-peb-av-10";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&dailink_master>;
simple-audio-card,frame-master = <&dailink_master>;
simple-audio-card,mclk-fs = <32>;
simple-audio-card,widgets =
"Line", "Line In",
"Speaker", "Speaker",
"Microphone", "Microphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Speaker", "SPOP",
"Speaker", "SPOM",
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"LINE1L", "Line In",
"LINE1R", "Line In",
"MIC3R", "Microphone Jack",
"Microphone Jack", "Mic Bias";
simple-audio-card,cpu {
sound-dai = <&sai5>;
};
dailink_master: simple-audio-card,codec {
sound-dai = <&codec>;
clocks = <&clk IMX8MM_CLK_SAI5>;
};
};
};
&i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c3>;
pinctrl-1 = <&pinctrl_i2c3_gpio>;
sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
codec: codec@18 {
compatible = "ti,tlv320aic3007";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tlv320>;
#sound-dai-cells = <0>;
reg = <0x18>;
reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
ai3x-gpio-func = <0xd 0x0>;
ai3x-micbias-vg = <2>;
AVDD-supply = <®_sound_3v3>;
IOVDD-supply = <®_sound_3v3>;
DRVDD-supply = <®_sound_3v3>;
DVDD-supply = <®_sound_1v8>;
};
eeprom@57 {
compatible = "atmel,24c32";
pagesize = <32>;
reg = <0x57>;
vcc-supply = <®_vdd_3v3_s>;
};
eeprom@5f {
compatible = "atmel,24c32";
pagesize = <32>;
reg = <0x5f>;
size = <32>;
vcc-supply = <®_vdd_3v3_s>;
};
};
&lcdif {
status = "okay";
};
&mipi_dsi {
samsung,esc-clock-frequency = <10000000>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out: endpoint {
remote-endpoint = <&bridge_in>;
};
};
};
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};
&sai5 {
assigned-clocks = <&clk IMX8MM_CLK_SAI5>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL2_OUT>;
assigned-clock-rates = <11289600>;
clocks = <&clk IMX8MM_CLK_SAI5_IPG>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_SAI5_ROOT>, <&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
<&clk IMX8MM_AUDIO_PLL2_OUT>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k",
"pll11k";
fsl,sai-mclk-direction-output;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai5>;
#sound-dai-cells = <0>;
status = "okay";
};
&sn65dsi83 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
bridge_in: endpoint {
remote-endpoint = <&dsi_out>;
data-lanes = <1 2 3 4>;
};
};
port@2 {
reg = <2>;
bridge_out: endpoint {
remote-endpoint = <&panel_in>;
ti,lvds-vod-swing-clock-microvolt = <200000 600000>;
ti,lvds-vod-swing-data-microvolt = <200000 600000>;
};
};
};
};
&iomuxc {
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400001c2
MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c2
>;
};
pinctrl_i2c3_gpio: i2c3gpiogrp {
fsl,pins = <
MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18 0x1e2
MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19 0x1e2
>;
};
pinctrl_lcd: lcd0grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXD_GPIO5_IO1 0x12
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_MCLK_PWM4_OUT 0x12
>;
};
pinctrl_sai5: sai5grp {
fsl,pins = <
MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6
MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6
MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6
>;
};
pinctrl_tlv320: tlv320grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x16
MX8MM_IOMUXC_SAI5_RXC_GPIO3_IO20 0x16
>;
};
};
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