summaryrefslogtreecommitdiff
path: root/drivers/base/regmap/regmap-mdio.c
blob: f7293040a2b18ac15f2c27f5c4a1ac9fb5985020 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
// SPDX-License-Identifier: GPL-2.0

#include <linux/errno.h>
#include <linux/mdio.h>
#include <linux/module.h>
#include <linux/regmap.h>

#define REGVAL_MASK		GENMASK(15, 0)
#define REGNUM_C22_MASK		GENMASK(4, 0)
/* Clause-45 mask includes the device type (5 bit) and actual register number (16 bit) */
#define REGNUM_C45_MASK		GENMASK(20, 0)

static int regmap_mdio_read(struct mdio_device *mdio_dev, u32 reg, unsigned int *val)
{
	int ret;

	ret = mdiodev_read(mdio_dev, reg);
	if (ret < 0)
		return ret;

	*val = ret & REGVAL_MASK;
	return 0;
}

static int regmap_mdio_write(struct mdio_device *mdio_dev, u32 reg, unsigned int val)
{
	return mdiodev_write(mdio_dev, reg, val);
}

static int regmap_mdio_c22_read(void *context, unsigned int reg, unsigned int *val)
{
	struct mdio_device *mdio_dev = context;

	if (unlikely(reg & ~REGNUM_C22_MASK))
		return -ENXIO;

	return regmap_mdio_read(mdio_dev, reg, val);
}

static int regmap_mdio_c22_write(void *context, unsigned int reg, unsigned int val)
{
	struct mdio_device *mdio_dev = context;

	if (unlikely(reg & ~REGNUM_C22_MASK))
		return -ENXIO;

	return mdiodev_write(mdio_dev, reg, val);
}

static const struct regmap_bus regmap_mdio_c22_bus = {
	.reg_write = regmap_mdio_c22_write,
	.reg_read = regmap_mdio_c22_read,
};

static int regmap_mdio_c45_read(void *context, unsigned int reg, unsigned int *val)
{
	struct mdio_device *mdio_dev = context;

	if (unlikely(reg & ~REGNUM_C45_MASK))
		return -ENXIO;

	return regmap_mdio_read(mdio_dev, MII_ADDR_C45 | reg, val);
}

static int regmap_mdio_c45_write(void *context, unsigned int reg, unsigned int val)
{
	struct mdio_device *mdio_dev = context;

	if (unlikely(reg & ~REGNUM_C45_MASK))
		return -ENXIO;

	return regmap_mdio_write(mdio_dev, MII_ADDR_C45 | reg, val);
}

static const struct regmap_bus regmap_mdio_c45_bus = {
	.reg_write = regmap_mdio_c45_write,
	.reg_read = regmap_mdio_c45_read,
};

struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev,
	const struct regmap_config *config, struct lock_class_key *lock_key,
	const char *lock_name)
{
	const struct regmap_bus *bus;

	if (config->reg_bits == 5 && config->val_bits == 16)
		bus = &regmap_mdio_c22_bus;
	else if (config->reg_bits == 21 && config->val_bits == 16)
		bus = &regmap_mdio_c45_bus;
	else
		return ERR_PTR(-EOPNOTSUPP);

	return __regmap_init(&mdio_dev->dev, bus, mdio_dev, config, lock_key, lock_name);
}
EXPORT_SYMBOL_GPL(__regmap_init_mdio);

struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev,
	const struct regmap_config *config, struct lock_class_key *lock_key,
	const char *lock_name)
{
	const struct regmap_bus *bus;

	if (config->reg_bits == 5 && config->val_bits == 16)
		bus = &regmap_mdio_c22_bus;
	else if (config->reg_bits == 21 && config->val_bits == 16)
		bus = &regmap_mdio_c45_bus;
	else
		return ERR_PTR(-EOPNOTSUPP);

	return __devm_regmap_init(&mdio_dev->dev, bus, mdio_dev, config, lock_key, lock_name);
}
EXPORT_SYMBOL_GPL(__devm_regmap_init_mdio);

MODULE_AUTHOR("Sander Vanheule <sander@svanheule.net>");
MODULE_DESCRIPTION("Regmap MDIO Module");
MODULE_LICENSE("GPL v2");