diff options
| author | Zixian Zeng <sycamoremoon376@gmail.com> | 2025-09-16 21:22:52 +0800 |
|---|---|---|
| committer | Inochi Amaoto <inochiama@gmail.com> | 2025-11-18 09:17:55 +0800 |
| commit | 11f4d84c9f724ec4c6810567d6b9713b054bb28b (patch) | |
| tree | 74fab894d5b46a45b4942b7c421c7b233578e82b | |
| parent | f49314cbbc98f9ab2bf4eb82ccacbf79f179db6c (diff) | |
riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V1
Enable SPI NOR node for SG2042_EVB_V1 device tree
According to SG2042_EVB_V1 schematic, SPI-NOR Flash cannot support QSPI
due to hardware design. Thus spi-(tx|rx)-bus-width must be set to 1.
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com>
Link: https://lore.kernel.org/r/20250916-sfg-spidts-v2-3-b5d9024fe1c8@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts index a186d036cf36..b116dfa904cd 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts +++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v1.dts @@ -250,6 +250,30 @@ status = "okay"; }; +&spifmc0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + +&spifmc1 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + &uart0 { pinctrl-0 = <&uart0_cfg>; pinctrl-names = "default"; |