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| author | Alex Elder <elder@riscstar.com> | 2025-10-27 08:30:07 -0500 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2025-11-12 11:26:51 +0000 |
| commit | 3187e25eb2705dec9f0509f6e42da7e018718c74 (patch) | |
| tree | b9edadf7890772497c3a383dc6e9aa7d7680a216 | |
| parent | 3a8660878839faadb4f1a6dd72c3179c1df56787 (diff) | |
riscv: defconfig: enable SPI_FSL_QUADSPI as a module
The SpacemiT K1 SoC QSPI IP uses the Freescale driver. Enable it as a
module in the default kernel configuration for RISC-V.
Acked-by: Paul Walmsley <pjw@kernel.org> # for arch/riscv
Signed-off-by: Alex Elder <elder@riscstar.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| -rw-r--r-- | arch/riscv/configs/defconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index fc2725cbca18..48afe30d42e8 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -158,6 +158,7 @@ CONFIG_I2C_DESIGNWARE_CORE=y CONFIG_I2C_MV64XXX=m CONFIG_SPI=y CONFIG_SPI_CADENCE_QUADSPI=m +CONFIG_SPI_FSL_QUADSPI=m CONFIG_SPI_PL022=m CONFIG_SPI_SIFIVE=y CONFIG_SPI_SUN6I=y |