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| author | Junhui Liu <junhui.liu@pigmoral.tech> | 2025-10-21 17:41:38 +0800 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2025-11-12 17:06:56 +0000 |
| commit | 4689d4422ac47ffb0a4c06fdb0e165388f585d01 (patch) | |
| tree | dbe07c7509ac98016da5381c4ffcdeb324645175 | |
| parent | 66c2a3173cdaf7b776552203609f008c8709dd22 (diff) | |
dt-bindings: riscv: Add Anlogic DR1V90
Add Anlogic DR1V90 FPSoC, featuring a UX900 RISC-V core as the
processing system (PS) and 94,464 LUTs programmable logic (PL). It is
used by the Milianke MLKPAI-FS01 board, a SBC equipped with 512MB DDR3
memory, USB-C UART, 1GbE RJ45 Ethernet, USB-A 2.0 port, TF card slot,
and 256Mbit Quad-SPI flash.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
| -rw-r--r-- | Documentation/devicetree/bindings/riscv/anlogic.yaml | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/riscv/anlogic.yaml b/Documentation/devicetree/bindings/riscv/anlogic.yaml new file mode 100644 index 000000000000..91b1526c99aa --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/anlogic.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/anlogic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Anlogic SoC-based boards + +maintainers: + - Junhui Liu <junhui.liu@pigmoral.tech> + +description: + Anlogic SoC-based boards + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - items: + - enum: + - milianke,mlkpai-fs01 + - const: anlogic,dr1v90 + +additionalProperties: true + +... |