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| author | Frank Wunderlich <frank-w@public-files.de> | 2025-04-22 15:24:27 +0200 |
|---|---|---|
| committer | Vinod Koul <vkoul@kernel.org> | 2025-05-14 09:24:44 +0100 |
| commit | b484b25a486962b568ada1f55c1b96dfd96b912d (patch) | |
| tree | 6b013582ae19589e3d6d3f1a70d14089db75aee2 | |
| parent | 117d09e2830d6ff6c1bb2dc5629f972504fde51e (diff) | |
dt-bindings: phy: mtk-xs-phy: support type switch by pericfg
Add support for type switch by pericfg register between USB3/PCIe.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250422132438.15735-5-linux@fw-web.de
Signed-off-by: Vinod Koul <vkoul@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml index 3b5253659e6f..0bed847bb4ad 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -151,6 +151,21 @@ patternProperties: minimum: 1 maximum: 31 + mediatek,syscon-type: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A phandle to syscon used to access the register of type switch, + the field should always be 3 cells long. + items: + - items: + - description: + Phandle to phy type configuration system controller + - description: + Phy type configuration register offset + - description: + Index of config segment + enum: [0, 1, 2, 3] + required: - reg - clocks |