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author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-06-24 20:00:46 +0300 |
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committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2025-06-27 15:55:47 +0300 |
commit | a47828f3e7aaa9339f43c9a919c5b9b12b89d4b4 (patch) | |
tree | a38f629a73c1b9e9a125550c8b5737e720670b0d /drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |
parent | ec3a347beaa21b4a041f636b7081d17677fb3f56 (diff) |
drm/i915/flipq: Implement Wa_18034343758
Implement the driver side of Wa_18034343758, which is supposed to
prevent the DSB and DMC from accessing registers in parallel, and
thus potentially corrupting the registers due to a hardware issue
(which should be fixed in PTL-B0).
The w/a sequence goes as follows:
DMC starts the DSB
| \
DMC halts itself | DSB waits a while for DMC to have time to halt
. | DSB executes normally
. | DSB unhalts the DMC at the very end
. /
DMC resumes execution
v2: PTL-B0+ firmware no longer has the w/a since the hw got fixed
v3: Do the w/a on all PTL for now since we only have the A0 firmware
binaries which issues the halt instructions unconditionally
v4: PTL DMC binaries do in fact have the A0 vs. B0 split, so skip
the w/a on PTL-B0+
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250624170049.27284-7-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_object.c')
0 files changed, 0 insertions, 0 deletions