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authorPaolo Abeni <pabeni@redhat.com>2025-08-12 12:52:24 +0200
committerPaolo Abeni <pabeni@redhat.com>2025-08-12 12:52:25 +0200
commitb3e8c3dfce8d31e176584e03e8fa50613c766e47 (patch)
treefb6d05f3b440fa64924aec82f4a6fd9e0ae1cc93 /lib/mpi/mpi-add.c
parent8ea25274ebaf2f6be8be374633b2ed8348ec0e70 (diff)
parenta7f75e2883c4bd57b12c3be61bb926929adad9c0 (diff)
Merge branch 'fix-broken-link-with-th1520-gmac-when-linkspeed-changes'
Yao Zi says: ==================== Fix broken link with TH1520 GMAC when linkspeed changes It's noted that on TH1520 SoC, the GMAC's link becomes broken after the link speed is changed (for example, running ethtool -s eth0 speed 100 on the peer when negotiated to 1Gbps), but the GMAC could function normally if the speed is brought back to the initial. Just like many other SoCs utilizing STMMAC IP, we need to adjust the TX clock supplying TH1520's GMAC through some SoC-specific glue registers when linkspeed changes. But it's found that after the full kernel startup, reading from them results in garbage and writing to them makes no effect, which is the cause of broken link. Further testing shows perisys-apb4-hclk must be ungated for normal access to Th1520 GMAC APB glue registers, which is neither described in dt-binding nor acquired by the driver. This series expands the dt-binding of TH1520's GMAC to allow an extra "APB glue registers interface clock", instructs the driver to acquire and enable the clock, and finally supplies CLK_PERISYS_APB4_HCLK for TH1520's GMACs in SoC devicetree. v2: https://lore.kernel.org/netdev/20250801091240.46114-1-ziyao@disroot.org/ v1: https://lore.kernel.org/all/20250729093734.40132-1-ziyao@disroot.org/ ==================== Link: https://patch.msgid.link/20250808093655.48074-2-ziyao@disroot.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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