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| author | Joseph Lo <josephl@nvidia.com> | 2019-01-04 15:16:46 +0800 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-01-25 12:39:47 +0100 |
| commit | d94da0dd686d249ab0f6500d41169a7eff9a4b21 (patch) | |
| tree | 9d56a6baf9f29394bb00e35dcf01ecc642164602 /scripts/gdb/linux/utils.py | |
| parent | 51294bf6b9e897d595466dcda5a3f2751906a200 (diff) | |
soc/tegra: fuse: Fix typo in tegra210_init_speedo_data
Fix typo when reading SoC speedo value from fuse SoC speedo register.
Reported-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions