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authorJunhao He <hejunhao3@huawei.com>2025-06-19 20:55:51 +0800
committerWill Deacon <will@kernel.org>2025-07-14 15:42:16 +0100
commit17aa34e86936d0dba4e7c05c55ffc3e12c0ccec9 (patch)
tree4d23cc95cffe4ec2502afa72614cb82d8b88e3b3 /scripts/lib/kdoc/kdoc_files.py
parentdc86791ff68c38a2954c3bf2c444b6d6d9da52f3 (diff)
drivers/perf: hisi: Add support for HiSilicon DDRC v3 PMU driver
HiSilicon DDRC v3 PMU has the different interrupt register offset compared to the v2. Add device information of v3 PMU with ACPI HID HISI0235. Signed-off-by: Junhao He <hejunhao3@huawei.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/20250619125557.57372-3-yangyicong@huawei.com Signed-off-by: Will Deacon <will@kernel.org>
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