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| author | Cristian Ciocaltea <cristian.ciocaltea@collabora.com> | 2025-09-03 21:51:03 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2025-10-15 22:28:07 +0200 |
| commit | 33ea4d520fbda505e2cfe5b36ebf522de1f3f5e9 (patch) | |
| tree | f0c4fe944fef40519c0297c0a1b588aa08bbd1e2 /scripts/lib/kdoc/kdoc_output.py | |
| parent | 9baa02327adf2b1e919e95af23036102cfd0133f (diff) | |
drm/rockchip: dw_hdmi_qp: Provide ref clock rate in dw_hdmi_qp_plat_data
In order to support correct initialization of the timer base in the HDMI
QP IP block, setup platform data to include the required reference clock
rate.
While at it, ensure plat_data is zero-initialized in
dw_hdmi_qp_rockchip_bind().
Reviewed-by: Daniel Stone <daniels@collabora.com>
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20250903-rk3588-hdmi-cec-v4-5-fa25163c4b08@collabora.com
Diffstat (limited to 'scripts/lib/kdoc/kdoc_output.py')
0 files changed, 0 insertions, 0 deletions