staging: axis-fifo: simplify interrupt handling

The irq handler iterates through the interrupt bits one by one in a while()
loop, clearing one bit at a time. This is unnecessary and inefficient, as
the 'Interrupt Status Register' can be cleared with a single write
operation.

Also the irq handler checks for some interrupts that are masked out in the
'Interrupt Enable Register', so they are never triggered.

Simplify the irq handler by removing the checks for interrupts that are
masked out and clear the whole 'Interrupt Status Register' in one go. The
macros that are no longer relevant are also removed.

Signed-off-by: Ovidiu Panait <ovidiu.panait.oss@gmail.com>
Link: https://lore.kernel.org/r/20250919195400.3180039-2-ovidiu.panait.oss@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

0 files changed, 0 insertions, 0 deletions