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authorYao Zi <ziyao@disroot.org>2025-09-18 15:30:55 +0000
committerManivannan Sadhasivam <mani@kernel.org>2025-10-19 12:13:45 +0530
commitdfbf19c47a01eda5df4d476d64a273e1188ea5a1 (patch)
tree64d0951f3ec9e0b861b742b0d1d3d34a487a5682 /tools/lib/python/kdoc/parse_data_structs.py
parent3a8660878839faadb4f1a6dd72c3179c1df56787 (diff)
dt-bindings: PCI: dwc: rockchip: Add RK3528 variant
RK3528 ships a PCIe Gen2x1 controller that operates in RC mode only. Since the SoC has no separate MSI controller, the one integrated in the DWC PCIe IP must be used, and thus its interrupt scheme is similar to variants found in RK3562 and RK3576. Older BSP code claimed its integrated MSI controller supports only 8 MSIs[1], but this has been changed in newer BSP[2] and testing proves the controller works correctly with more than 8 MSIs allocated, suggesting the controller should be compatible with the RK3568 variant. Hence, document its compatible string. Signed-off-by: Yao Zi <ziyao@disroot.org> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://github.com/rockchip-linux/kernel/blob/792a7d4273a5/drivers/pci/controller/dwc/pcie-dw-rockchip.c#L1610-L1613 # [1] Link: https://github.com/rockchip-linux/kernel/blob/1ba51b059f25/drivers/pci/controller/dwc/pcie-dw-rockchip.c#L904-L906 # [2] Link: https://patch.msgid.link/20250918153057.56023-2-ziyao@disroot.org
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