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authorFabrizio Castro <fabrizio.castro.jz@renesas.com>2025-04-23 15:34:18 +0100
committerVinod Koul <vkoul@kernel.org>2025-05-14 15:30:40 +0100
commit22228b933ce2639d67168fd35423c1be196edab0 (patch)
treee8ac43dcff44e110403f2fdbdf5d027071bb48ff /tools/perf/scripts/python/exported-sql-viewer.py
parentec52f10a31dc69c1ded30812bd17335ac23b1c60 (diff)
dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs
Document the Renesas RZ/V2H(P) family of SoCs DMAC block. The Renesas RZ/V2H(P) DMAC is very similar to the one found on the Renesas RZ/G2L family of SoCs, but there are some differences: * It only uses one register area * It only uses one clock * It only uses one reset * Instead of using MID/IRD it uses REQ No * It is connected to the Interrupt Control Unit (ICU) Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250423143422.3747702-3-fabrizio.castro.jz@renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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