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| author | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2025-06-08 19:07:31 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-06-28 17:23:52 +0200 |
| commit | 246fef761a5734285ec2c1e61dd9a3d8943d33a8 (patch) | |
| tree | d38bb8f02152c3f1451d0cc113563170c931580f /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | ed7513dfb3e1a653346a7f8bbee862a4cfc165c4 (diff) | |
dt-bindings: usb: genesys,gl850g: add downstream facing ports
In order to describe connections between Genesys GL850G hub and
corresponding Type-C connectors, follow example of RTS5411 and describe
downstream facing ports. Unline normal case of ports being connected to
a USB device, hotplug ports use OF graph representation.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250608-genesys-ports-v1-2-09ca19f6838e@oss.qualcomm.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions