diff options
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/cv180x.dtsi | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/cv180x.dtsi b/arch/riscv/boot/dts/sophgo/cv180x.dtsi index 9e4559538cbc..56eb74c4a89e 100644 --- a/arch/riscv/boot/dts/sophgo/cv180x.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv180x.dtsi @@ -31,6 +31,33 @@ #reset-cells = <1>; }; + mdio: mdio@3009800 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + reg = <0x3009800 0x4>; + #address-cells = <1>; + #size-cells = <0>; + mdio-parent-bus = <&gmac0_mdio>; + mux-mask = <0x80>; + status = "disabled"; + + internal_mdio: mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + internal_ephy: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + }; + + external_mdio: mdio@80 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x80>; + }; + }; + gpio0: gpio@3020000 { compatible = "snps,dw-apb-gpio"; reg = <0x3020000 0x1000>; @@ -196,6 +223,8 @@ clock-names = "stmmaceth", "ptp_ref"; interrupts = <SOC_PERIPHERAL_IRQ(15) IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "macirq"; + phy-handle = <&internal_ephy>; + phy-mode = "internal"; resets = <&rst RST_ETH0>; reset-names = "stmmaceth"; rx-fifo-depth = <8192>; |