diff options
Diffstat (limited to 'Documentation/devicetree/bindings/dma')
14 files changed, 351 insertions, 143 deletions
diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml new file mode 100644 index 000000000000..429f682f15d8 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/arm,dma-350.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm CoreLink DMA-350 Controller + +maintainers: + - Robin Murphy <robin.murphy@arm.com> + +allOf: + - $ref: dma-controller.yaml# + +properties: + compatible: + const: arm,dma-350 + + reg: + items: + - description: Base and size of the full register map + + interrupts: + minItems: 1 + items: + - description: Channel 0 interrupt + - description: Channel 1 interrupt + - description: Channel 2 interrupt + - description: Channel 3 interrupt + - description: Channel 4 interrupt + - description: Channel 5 interrupt + - description: Channel 6 interrupt + - description: Channel 7 interrupt + + "#dma-cells": + const: 1 + description: The cell is the trigger input number + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/dma/brcm,iproc-sba.txt b/Documentation/devicetree/bindings/dma/brcm,iproc-sba.txt deleted file mode 100644 index 092913a28457..000000000000 --- a/Documentation/devicetree/bindings/dma/brcm,iproc-sba.txt +++ /dev/null @@ -1,29 +0,0 @@ -* Broadcom SBA RAID engine - -Required properties: -- compatible: Should be one of the following - "brcm,iproc-sba" - "brcm,iproc-sba-v2" - The "brcm,iproc-sba" has support for only 6 PQ coefficients - The "brcm,iproc-sba-v2" has support for only 30 PQ coefficients -- mboxes: List of phandle and mailbox channel specifiers - -Example: - -raid_mbox: mbox@67400000 { - ... - #mbox-cells = <3>; - ... -}; - -raid0 { - compatible = "brcm,iproc-sba-v2"; - mboxes = <&raid_mbox 0 0x1 0xffff>, - <&raid_mbox 1 0x1 0xffff>, - <&raid_mbox 2 0x1 0xffff>, - <&raid_mbox 3 0x1 0xffff>, - <&raid_mbox 4 0x1 0xffff>, - <&raid_mbox 5 0x1 0xffff>, - <&raid_mbox 6 0x1 0xffff>, - <&raid_mbox 7 0x1 0xffff>; -}; diff --git a/Documentation/devicetree/bindings/dma/brcm,iproc-sba.yaml b/Documentation/devicetree/bindings/dma/brcm,iproc-sba.yaml new file mode 100644 index 000000000000..f3fed576cacf --- /dev/null +++ b/Documentation/devicetree/bindings/dma/brcm,iproc-sba.yaml @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/brcm,iproc-sba.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom SBA RAID engine + +maintainers: + - Ray Jui <rjui@broadcom.com> + - Scott Branden <sbranden@broadcom.com> + +properties: + compatible: + enum: + - brcm,iproc-sba + - brcm,iproc-sba-v2 + + mboxes: + minItems: 1 + maxItems: 8 + +required: + - compatible + - mboxes + +additionalProperties: false + +examples: + - | + raid0 { + compatible = "brcm,iproc-sba-v2"; + mboxes = <&raid_mbox 0 0x1 0xffff>, + <&raid_mbox 1 0x1 0xffff>, + <&raid_mbox 2 0x1 0xffff>, + <&raid_mbox 3 0x1 0xffff>, + <&raid_mbox 4 0x1 0xffff>, + <&raid_mbox 5 0x1 0xffff>, + <&raid_mbox 6 0x1 0xffff>, + <&raid_mbox 7 0x1 0xffff>; + }; diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml index 950e8fa4f4ab..fa4248e2f1b9 100644 --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml @@ -48,11 +48,11 @@ properties: interrupts: minItems: 1 - maxItems: 64 + maxItems: 65 interrupt-names: minItems: 1 - maxItems: 64 + maxItems: 65 "#dma-cells": description: | diff --git a/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml b/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml index 75a7d9556699..9102b615dbd6 100644 --- a/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml +++ b/Documentation/devicetree/bindings/dma/fsl,mxs-dma.yaml @@ -23,6 +23,35 @@ allOf: properties: power-domains: false + - if: + properties: + compatible: + contains: + const: fsl,imx23-dma-apbx + then: + properties: + interrupt-names: + items: + - const: audio-adc + - const: audio-dac + - const: spdif-tx + - const: i2c + - const: saif0 + - const: empty0 + - const: auart0-rx + - const: auart0-tx + - const: auart1-rx + - const: auart1-tx + - const: saif1 + - const: empty1 + - const: empty2 + - const: empty3 + - const: empty4 + - const: empty5 + else: + properties: + interrupt-names: false + properties: compatible: oneOf: @@ -54,6 +83,10 @@ properties: minItems: 4 maxItems: 16 + interrupt-names: + minItems: 4 + maxItems: 16 + "#dma-cells": const: 1 diff --git a/Documentation/devicetree/bindings/dma/lpc1850-dmamux.txt b/Documentation/devicetree/bindings/dma/lpc1850-dmamux.txt deleted file mode 100644 index 87740adb2995..000000000000 --- a/Documentation/devicetree/bindings/dma/lpc1850-dmamux.txt +++ /dev/null @@ -1,54 +0,0 @@ -NXP LPC18xx/43xx DMA MUX (DMA request router) - -Required properties: -- compatible: "nxp,lpc1850-dmamux" -- reg: Memory map for accessing module -- #dma-cells: Should be set to <3>. - * 1st cell contain the master dma request signal - * 2nd cell contain the mux value (0-3) for the peripheral - * 3rd cell contain either 1 or 2 depending on the AHB - master used. -- dma-requests: Number of DMA requests for the mux -- dma-masters: phandle pointing to the DMA controller - -The DMA controller node need to have the following poroperties: -- dma-requests: Number of DMA requests the controller can handle - -Example: - -dmac: dma@40002000 { - compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell"; - arm,primecell-periphid = <0x00041080>; - reg = <0x40002000 0x1000>; - interrupts = <2>; - clocks = <&ccu1 CLK_CPU_DMA>; - clock-names = "apb_pclk"; - #dma-cells = <2>; - dma-channels = <8>; - dma-requests = <16>; - lli-bus-interface-ahb1; - lli-bus-interface-ahb2; - mem-bus-interface-ahb1; - mem-bus-interface-ahb2; - memcpy-burst-size = <256>; - memcpy-bus-width = <32>; -}; - -dmamux: dma-mux { - compatible = "nxp,lpc1850-dmamux"; - #dma-cells = <3>; - dma-requests = <64>; - dma-masters = <&dmac>; -}; - -uart0: serial@40081000 { - compatible = "nxp,lpc1850-uart", "ns16550a"; - reg = <0x40081000 0x1000>; - reg-shift = <2>; - interrupts = <24>; - clocks = <&ccu2 CLK_APB0_UART0>, <&ccu1 CLK_CPU_UART0>; - clock-names = "uartclk", "reg"; - dmas = <&dmamux 1 1 2 - &dmamux 2 1 2>; - dma-names = "tx", "rx"; -}; diff --git a/Documentation/devicetree/bindings/dma/marvell,orion-xor.yaml b/Documentation/devicetree/bindings/dma/marvell,orion-xor.yaml new file mode 100644 index 000000000000..add08257ec59 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/marvell,orion-xor.yaml @@ -0,0 +1,84 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/marvell,orion-xor.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell XOR engine + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + - Gregory Clement <gregory.clement@bootlin.com> + +properties: + compatible: + oneOf: + - items: + - const: marvell,armada-380-xor + - const: marvell,orion-xor + - enum: + - marvell,armada-3700-xor + - marvell,orion-xor + + reg: + items: + - description: Low registers for the XOR engine + - description: High registers for the XOR engine + + clocks: + maxItems: 1 + +patternProperties: + "^(channel|xor)[0-9]+$": + description: XOR channel sub-node + type: object + additionalProperties: false + + properties: + interrupts: + description: Interrupt specifier for the XOR channel + items: + - description: Interrupt for this channel + + dmacap,memcpy: + type: boolean + deprecated: true + description: + Indicates that the XOR channel is capable of memcpy operations + + dmacap,memset: + type: boolean + deprecated: true + description: + Indicates that the XOR channel is capable of memset operations + + dmacap,xor: + type: boolean + deprecated: true + description: + Indicates that the XOR channel is capable of xor operations + + required: + - interrupts + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + xor@d0060900 { + compatible = "marvell,orion-xor"; + reg = <0xd0060900 0x100>, + <0xd0060b00 0x100>; + clocks = <&coreclk 0>; + + xor00 { + interrupts = <51>; + }; + xor01 { + interrupts = <52>; + }; + }; diff --git a/Documentation/devicetree/bindings/dma/mv-xor.txt b/Documentation/devicetree/bindings/dma/mv-xor.txt deleted file mode 100644 index 0ffb4d8766a8..000000000000 --- a/Documentation/devicetree/bindings/dma/mv-xor.txt +++ /dev/null @@ -1,40 +0,0 @@ -* Marvell XOR engines - -Required properties: -- compatible: Should be one of the following: - - "marvell,orion-xor" - - "marvell,armada-380-xor" - - "marvell,armada-3700-xor". -- reg: Should contain registers location and length (two sets) - the first set is the low registers, the second set the high - registers for the XOR engine. -- clocks: pointer to the reference clock - -The DT node must also contains sub-nodes for each XOR channel that the -XOR engine has. Those sub-nodes have the following required -properties: -- interrupts: interrupt of the XOR channel - -The sub-nodes used to contain one or several of the following -properties, but they are now deprecated: -- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations -- dmacap,memset to indicate that the XOR channel is capable of memset operations -- dmacap,xor to indicate that the XOR channel is capable of xor operations -- dmacap,interrupt to indicate that the XOR channel is capable of - generating interrupts - -Example: - -xor@d0060900 { - compatible = "marvell,orion-xor"; - reg = <0xd0060900 0x100 - 0xd0060b00 0x100>; - clocks = <&coreclk 0>; - - xor00 { - interrupts = <51>; - }; - xor01 { - interrupts = <52>; - }; -}; diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml index a790e5687844..0dabe9bbb219 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml @@ -24,6 +24,7 @@ properties: - const: nvidia,tegra186-gpcdma - items: - enum: + - nvidia,tegra264-gpcdma - nvidia,tegra234-gpcdma - nvidia,tegra194-gpcdma - const: nvidia,tegra186-gpcdma diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml index d3f8c269916c..da0235e451d6 100644 --- a/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml +++ b/Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.yaml @@ -19,6 +19,7 @@ properties: - enum: - nvidia,tegra210-adma - nvidia,tegra186-adma + - nvidia,tegra264-adma - items: - enum: - nvidia,tegra234-adma @@ -92,6 +93,7 @@ allOf: contains: enum: - nvidia,tegra186-adma + - nvidia,tegra264-adma then: anyOf: - properties: diff --git a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml index 3ad0d9b1fbc5..f2f87f0f545b 100644 --- a/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,bam-dma.yaml @@ -42,6 +42,8 @@ properties: interrupts: maxItems: 1 + dma-coherent: true + iommus: minItems: 1 maxItems: 6 diff --git a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml index 7052468b15c8..bbe4da2a1105 100644 --- a/Documentation/devicetree/bindings/dma/qcom,gpi.yaml +++ b/Documentation/devicetree/bindings/dma/qcom,gpi.yaml @@ -24,12 +24,14 @@ properties: - qcom,sm6350-gpi-dma - items: - enum: + - qcom,milos-gpi-dma - qcom,qcm2290-gpi-dma - qcom,qcs8300-gpi-dma - qcom,qdu1000-gpi-dma - qcom,sa8775p-gpi-dma - qcom,sar2130p-gpi-dma - qcom,sc7280-gpi-dma + - qcom,sc8280xp-gpi-dma - qcom,sdx75-gpi-dma - qcom,sm6115-gpi-dma - qcom,sm6375-gpi-dma diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index b356251de5a8..92b12762c472 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -11,19 +11,23 @@ maintainers: properties: compatible: - items: - - enum: - - renesas,r7s72100-dmac # RZ/A1H - - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five - - renesas,r9a07g044-dmac # RZ/G2{L,LC} - - renesas,r9a07g054-dmac # RZ/V2L - - renesas,r9a08g045-dmac # RZ/G3S - - const: renesas,rz-dmac + oneOf: + - items: + - enum: + - renesas,r7s72100-dmac # RZ/A1H + - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five + - renesas,r9a07g044-dmac # RZ/G2{L,LC} + - renesas,r9a07g054-dmac # RZ/V2L + - renesas,r9a08g045-dmac # RZ/G3S + - const: renesas,rz-dmac + + - const: renesas,r9a09g057-dmac # RZ/V2H(P) reg: items: - description: Control and channel register block - description: DMA extended resource selector block + minItems: 1 interrupts: maxItems: 17 @@ -52,6 +56,7 @@ properties: items: - description: DMA main clock - description: DMA register access clock + minItems: 1 clock-names: items: @@ -61,10 +66,10 @@ properties: '#dma-cells': const: 1 description: - The cell specifies the encoded MID/RID values of the DMAC port - connected to the DMA client and the slave channel configuration - parameters. - bits[0:9] - Specifies MID/RID value + The cell specifies the encoded MID/RID or the REQ No values of + the DMAC port connected to the DMA client and the slave channel + configuration parameters. + bits[0:9] - Specifies the MID/RID or the REQ No value bit[10] - Specifies DMA request high enable (HIEN) bit[11] - Specifies DMA request detection type (LVL) bits[12:14] - Specifies DMAACK output mode (AM) @@ -80,12 +85,26 @@ properties: items: - description: Reset for DMA ARESETN reset terminal - description: Reset for DMA RST_ASYNC reset terminal + minItems: 1 reset-names: items: - const: arst - const: rst_async + renesas,icu: + description: + It must contain the phandle to the ICU and the index of the DMAC as seen + from the ICU. + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the ICU node. + - description: + The number of the DMAC as seen from the ICU, i.e. parameter k from + register ICU_DMkSELy. This may differ from the actual DMAC instance + number. + required: - compatible - reg @@ -98,13 +117,25 @@ allOf: - $ref: dma-controller.yaml# - if: - not: - properties: - compatible: - contains: - enum: - - renesas,r7s72100-dmac + properties: + compatible: + contains: + enum: + - renesas,r9a07g043-dmac + - renesas,r9a07g044-dmac + - renesas,r9a07g054-dmac + - renesas,r9a08g045-dmac then: + properties: + reg: + minItems: 2 + clocks: + minItems: 2 + resets: + minItems: 2 + + renesas,icu: false + required: - clocks - clock-names @@ -112,6 +143,46 @@ allOf: - resets - reset-names + - if: + properties: + compatible: + contains: + const: renesas,r7s72100-dmac + then: + properties: + reg: + minItems: 2 + + clocks: false + clock-names: false + power-domains: false + resets: false + reset-names: false + renesas,icu: false + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g057-dmac + then: + properties: + reg: + maxItems: 1 + clocks: + maxItems: 1 + resets: + maxItems: 1 + + clock-names: false + reset-names: false + + required: + - clocks + - power-domains + - renesas,icu + - resets + additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/dma/sophgo,cv1800b-dmamux.yaml b/Documentation/devicetree/bindings/dma/sophgo,cv1800b-dmamux.yaml new file mode 100644 index 000000000000..011002942235 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/sophgo,cv1800b-dmamux.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/sophgo,cv1800b-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800/SG200 Series DMA multiplexer + +maintainers: + - Inochi Amaoto <inochiama@gmail.com> + +description: + The DMA multiplexer of CV1800 is a subdevice of the system + controller. It support mapping 8 channels, but each channel + can be mapped only once. + +allOf: + - $ref: dma-router.yaml# + +properties: + compatible: + const: sophgo,cv1800b-dmamux + + reg: + items: + - description: DMA channal remapping register + - description: DMA channel interrupt mapping register + + '#dma-cells': + const: 2 + description: + The first cells is device id. The second one is the cpu id. + + dma-masters: + maxItems: 1 + +required: + - reg + - '#dma-cells' + - dma-masters + +additionalProperties: false + +examples: + - | + dma-router@154 { + compatible = "sophgo,cv1800b-dmamux"; + reg = <0x154 0x8>, <0x298 0x4>; + #dma-cells = <2>; + dma-masters = <&dmac>; + }; |