diff options
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts | 188 |
1 files changed, 179 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts index f02c32def593..cf8cd37f5708 100644 --- a/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8395-genio-1200-evk.dts @@ -79,9 +79,21 @@ reg = <0 0x54600000 0x0 0x200000>; }; - snd_dma_mem: memory@60000000 { + adsp_mem: memory@60000000 { compatible = "shared-dma-pool"; - reg = <0 0x60000000 0 0x1100000>; + reg = <0 0x60000000 0 0xf00000>; + no-map; + }; + + afe_dma_mem: memory@60f00000 { + compatible = "shared-dma-pool"; + reg = <0 0x60f00000 0 0x100000>; + no-map; + }; + + adsp_dma_mem: memory@61000000 { + compatible = "shared-dma-pool"; + reg = <0 0x61000000 0 0x100000>; no-map; }; @@ -91,13 +103,12 @@ }; }; - backlight_lcd0: backlight-lcd0 { + backlight_lcm0: backlight-lcm0 { compatible = "pwm-backlight"; - pwms = <&disp_pwm0 0 500000>; - enable-gpios = <&pio 47 GPIO_ACTIVE_HIGH>; brightness-levels = <0 1023>; - num-interpolated-steps = <1023>; default-brightness-level = <576>; + num-interpolated-steps = <1023>; + pwms = <&disp_pwm0 0 500000>; }; backlight_lcd1: backlight-lcd1 { @@ -107,6 +118,7 @@ brightness-levels = <0 1023>; num-interpolated-steps = <1023>; default-brightness-level = <576>; + status = "disabled"; }; can_clk: can-clk { @@ -150,6 +162,24 @@ }; }; + lcm0_iovcc: regulator-vio18-lcm0 { + compatible = "regulator-fixed"; + regulator-name = "vio18_lcm0"; + enable-active-high; + gpio = <&pio 47 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&dsi0_vreg_en_pins>; + vin-supply = <&mt6360_ldo2>; + }; + + lcm0_vddp: regulator-vsys-lcm0 { + compatible = "regulator-fixed"; + regulator-name = "vsys_lcm0"; + regulator-always-on; + regulator-boot-on; + vin-supply = <&mt6360_ldo1>; + }; + wifi_fixed_3v3: regulator-2 { compatible = "regulator-fixed"; regulator-name = "wifi_3v3"; @@ -161,16 +191,77 @@ }; }; +&adsp { + memory-region = <&adsp_dma_mem>, <&adsp_mem>; + status = "okay"; +}; + +&afe { + memory-region = <&afe_dma_mem>; + status = "okay"; +}; + &disp_pwm0 { pinctrl-names = "default"; - pinctrl-0 = <&pwm0_default_pins>; + pinctrl-0 = <&disp_pwm0_pins>; status = "okay"; }; +&dither0_in { + remote-endpoint = <&gamma0_out>; +}; + +&dither0_out { + remote-endpoint = <&dsi0_in>; +}; + &dmic_codec { wakeup-delay-ms = <200>; }; +&dsi0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + panel@0 { + compatible = "startek,kd070fhfid078", "himax,hx8279"; + reg = <0>; + backlight = <&backlight_lcm0>; + enable-gpios = <&pio 48 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 108 GPIO_ACTIVE_HIGH>; + iovcc-supply = <&lcm0_iovcc>; + vdd-supply = <&lcm0_vddp>; + pinctrl-names = "default"; + pinctrl-0 = <&panel_default_pins>; + + port { + dsi_panel_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dsi0_in: endpoint { + remote-endpoint = <&dither0_out>; + }; + }; + + port@1 { + reg = <1>; + dsi0_out: endpoint { + remote-endpoint = <&dsi_panel_in>; + }; + }; + }; +}; + ð { phy-mode ="rgmii-rxid"; phy-handle = <ð_phy0>; @@ -194,6 +285,10 @@ }; }; +&gamma0_out { + remote-endpoint = <&dither0_in>; +}; + &gpu { mali-supply = <&mt6315_7_vbuck1>; status = "okay"; @@ -418,6 +513,10 @@ domain-supply = <&mt6359_vsram_others_ldo_reg>; }; +&mipi_tx0 { + status = "okay"; +}; + &mmc0 { status = "okay"; pinctrl-names = "default", "state_uhs"; @@ -500,6 +599,10 @@ mediatek,mic-type-2 = <1>; /* ACC */ }; +&ovl0_in { + remote-endpoint = <&vdosys0_ep_main>; +}; + &pcie0 { pinctrl-names = "default", "idle"; pinctrl-0 = <&pcie0_default_pins>; @@ -777,6 +880,25 @@ }; }; + dsi0_vreg_en_pins: dsi0-vreg-en-pins { + pins-pwr-en { + pinmux = <PINMUX_GPIO47__FUNC_GPIO47>; + output-low; + }; + }; + + panel_default_pins: panel-default-pins { + pins-rst { + pinmux = <PINMUX_GPIO108__FUNC_GPIO108>; + output-high; + }; + + pins-en { + pinmux = <PINMUX_GPIO48__FUNC_GPIO48>; + output-low; + }; + }; + pcie0_default_pins: pcie0-default-pins { pins { pinmux = <PINMUX_GPIO19__FUNC_WAKEN>, @@ -803,8 +925,8 @@ }; }; - pwm0_default_pins: pwm0-default-pins { - pins-cmd-dat { + disp_pwm0_pins: disp-pwm0-pins { + pins-disp-pwm { pinmux = <PINMUX_GPIO97__FUNC_DISP_PWM0>; }; }; @@ -868,13 +990,49 @@ &pmic { interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>; + + mt6359keys: keys { + compatible = "mediatek,mt6359-keys"; + mediatek,long-press-mode = <1>; + power-off-time-sec = <0>; + + power-key { + linux,keycodes = <KEY_POWER>; + wakeup-source; + }; + + home { + linux,keycodes = <KEY_HOME>; + }; + }; }; &scp { memory-region = <&scp_mem>; + firmware-name = "mediatek/mt8195/scp.img"; status = "okay"; }; +&sound { + compatible = "mediatek,mt8195_mt6359"; + model = "mt8395-evk"; + pinctrl-names = "default"; + pinctrl-0 = <&audio_default_pins>; + audio-routing = + "Headphone", "Headphone L", + "Headphone", "Headphone R"; + mediatek,adsp = <&adsp>; + status = "okay"; + + headphone-dai-link { + link-name = "DL_SRC_BE"; + + codec { + sound-dai = <&pmic 0>; + }; + }; +}; + &spi1 { pinctrl-0 = <&spi1_pins>; pinctrl-names = "default"; @@ -1014,6 +1172,18 @@ status = "okay"; }; +&vdosys0 { + port { + #address-cells = <1>; + #size-cells = <0>; + + vdosys0_ep_main: endpoint@0 { + reg = <0>; + remote-endpoint = <&ovl0_in>; + }; + }; +}; + &xhci0 { status = "okay"; }; |