summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/msm8998.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/qcom/msm8998.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/msm8998.dtsi43
1 files changed, 30 insertions, 13 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index c2caad85c668..0b0a9379cb05 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -2,6 +2,7 @@
/* Copyright (c) 2016, The Linux Foundation. All rights reserved. */
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
#include <dt-bindings/clock/qcom,gcc-msm8998.h>
#include <dt-bindings/clock/qcom,gpucc-msm8998.h>
#include <dt-bindings/clock/qcom,mmcc-msm8998.h>
@@ -935,8 +936,24 @@
<0x02000000 0x0 0x1b300000 0x1b300000 0x0 0xd00000>;
#interrupt-cells = <1>;
- interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
+ interrupts = <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 409 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 410 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 411 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 412 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi0",
+ "msi1",
+ "msi2",
+ "msi3",
+ "msi4",
+ "msi5",
+ "msi6",
+ "msi7",
+ "global";
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 0 135 IRQ_TYPE_LEVEL_HIGH>,
<0 0 0 2 &intc 0 0 136 IRQ_TYPE_LEVEL_HIGH>,
@@ -2790,11 +2807,11 @@
"gpll0_div";
clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
<&gcc GCC_MMSS_GPLL0_CLK>,
- <&mdss_dsi0_phy 1>,
- <&mdss_dsi0_phy 0>,
- <&mdss_dsi1_phy 1>,
- <&mdss_dsi1_phy 0>,
- <&mdss_hdmi_phy 0>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>,
+ <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_hdmi_phy>,
<0>,
<0>,
<&gcc GCC_MMSS_GPLL0_DIV_CLK>;
@@ -2829,8 +2846,8 @@
compatible = "qcom,msm8998-dpu";
reg = <0x0c901000 0x8f000>,
<0x0c9a8e00 0xf0>,
- <0x0c9b0000 0x2008>,
- <0x0c9b8000 0x1040>;
+ <0x0c9b0000 0x3000>,
+ <0x0c9b8000 0x3000>;
reg-names = "mdp",
"regdma",
"vbif",
@@ -2932,8 +2949,8 @@
"bus";
assigned-clocks = <&mmcc BYTE0_CLK_SRC>,
<&mmcc PCLK0_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi0_phy 0>,
- <&mdss_dsi0_phy 1>;
+ assigned-clock-parents = <&mdss_dsi0_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi0_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd MSM8998_VDDCX>;
@@ -3008,8 +3025,8 @@
"bus";
assigned-clocks = <&mmcc BYTE1_CLK_SRC>,
<&mmcc PCLK1_CLK_SRC>;
- assigned-clock-parents = <&mdss_dsi1_phy 0>,
- <&mdss_dsi1_phy 1>;
+ assigned-clock-parents = <&mdss_dsi1_phy DSI_BYTE_PLL_CLK>,
+ <&mdss_dsi1_phy DSI_PIXEL_PLL_CLK>;
operating-points-v2 = <&dsi_opp_table>;
power-domains = <&rpmpd MSM8998_VDDCX>;