diff options
Diffstat (limited to 'arch/m68k/include/asm/motorola_pgtable.h')
| -rw-r--r-- | arch/m68k/include/asm/motorola_pgtable.h | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/arch/m68k/include/asm/motorola_pgtable.h b/arch/m68k/include/asm/motorola_pgtable.h index 9866c7acdabe..dcf6829b3eab 100644 --- a/arch/m68k/include/asm/motorola_pgtable.h +++ b/arch/m68k/include/asm/motorola_pgtable.h @@ -44,7 +44,7 @@ /* We borrow bit 11 to store the exclusive marker in swap PTEs. */ #define _PAGE_SWP_EXCLUSIVE 0x800 -#ifndef __ASSEMBLY__ +#ifndef __ASSEMBLER__ /* This is the cache mode to be used for pages containing page descriptors for * processors >= '040. It is in pte_mknocache(), and the variable is defined @@ -81,12 +81,6 @@ extern unsigned long mm_cachebits; #define pmd_pgtable(pmd) ((pgtable_t)pmd_page_vaddr(pmd)) -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - */ -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) - static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) { pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot); @@ -191,7 +185,7 @@ extern pgd_t kernel_pg_dir[128]; #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) -static inline int pte_swp_exclusive(pte_t pte) +static inline bool pte_swp_exclusive(pte_t pte) { return pte_val(pte) & _PAGE_SWP_EXCLUSIVE; } @@ -208,5 +202,5 @@ static inline pte_t pte_swp_clear_exclusive(pte_t pte) return pte; } -#endif /* !__ASSEMBLY__ */ +#endif /* !__ASSEMBLER__ */ #endif /* _MOTOROLA_PGTABLE_H */ |