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path: root/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
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Diffstat (limited to 'drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h')
-rw-r--r--drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h25
1 files changed, 12 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h b/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
index 6f536159df4d..c661185753b4 100644
--- a/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
+++ b/drivers/gpu/drm/amd/pm/powerplay/inc/hwmgr.h
@@ -122,8 +122,8 @@ struct phm_acpclock_voltage_dependency_record {
};
struct phm_clock_voltage_dependency_table {
- uint32_t count; /* Number of entries. */
- struct phm_clock_voltage_dependency_record entries[]; /* Dynamically allocate count entries. */
+ uint32_t count;
+ struct phm_clock_voltage_dependency_record entries[];
};
struct phm_phase_shedding_limits_record {
@@ -160,28 +160,28 @@ struct phm_vce_clock_voltage_dependency_record {
};
struct phm_phase_shedding_limits_table {
- uint32_t count;
+ uint32_t count;
struct phm_phase_shedding_limits_record entries[];
};
struct phm_vceclock_voltage_dependency_table {
- uint8_t count; /* Number of entries. */
- struct phm_vceclock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
+ uint8_t count;
+ struct phm_vceclock_voltage_dependency_record entries[];
};
struct phm_uvdclock_voltage_dependency_table {
- uint8_t count; /* Number of entries. */
- struct phm_uvdclock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
+ uint8_t count;
+ struct phm_uvdclock_voltage_dependency_record entries[];
};
struct phm_samuclock_voltage_dependency_table {
- uint8_t count; /* Number of entries. */
- struct phm_samuclock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
+ uint8_t count;
+ struct phm_samuclock_voltage_dependency_record entries[];
};
struct phm_acpclock_voltage_dependency_table {
- uint32_t count; /* Number of entries. */
- struct phm_acpclock_voltage_dependency_record entries[1]; /* Dynamically allocate count entries. */
+ uint32_t count;
+ struct phm_acpclock_voltage_dependency_record entries[];
};
struct phm_vce_clock_voltage_dependency_table {
@@ -257,7 +257,6 @@ struct pp_hwmgr_func {
int (*get_pp_table_entry)(struct pp_hwmgr *hwmgr,
unsigned long, struct pp_power_state *);
int (*get_num_of_pp_table_entries)(struct pp_hwmgr *hwmgr);
- int (*powerdown_uvd)(struct pp_hwmgr *hwmgr);
void (*powergate_vce)(struct pp_hwmgr *hwmgr, bool bgate);
void (*powergate_uvd)(struct pp_hwmgr *hwmgr, bool bgate);
void (*powergate_acp)(struct pp_hwmgr *hwmgr, bool bgate);
@@ -351,7 +350,7 @@ struct pp_hwmgr_func {
int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
int (*set_hard_min_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
int (*set_soft_max_gfxclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
- bool (*get_asic_baco_capability)(struct pp_hwmgr *hwmgr);
+ int (*get_bamaco_support)(struct pp_hwmgr *hwmgr);
int (*get_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
int (*set_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
int (*get_ppfeature_status)(struct pp_hwmgr *hwmgr, char *buf);