diff options
Diffstat (limited to 'drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c')
| -rw-r--r-- | drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 50 |
1 files changed, 34 insertions, 16 deletions
diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c index 5c73a513f678..9413b76d0bfc 100644 --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c @@ -5,6 +5,7 @@ * Copyright (C) 2020 Renesas Electronics Corporation */ +#include <linux/bitfield.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/io.h> @@ -71,6 +72,7 @@ struct rcar_mipi_dsi { } clocks; enum mipi_dsi_pixel_format format; + unsigned long mode_flags; unsigned int num_data_lanes; unsigned int lanes; }; @@ -316,8 +318,8 @@ rcar_mipi_dsi_post_init_phtw_v4h(struct rcar_mipi_dsi *dsi, WRITE_PHTW(0x01020100, 0x00000180); ret = read_poll_timeout(rcar_mipi_dsi_read, status, - status & PHTR_TEST, 2000, 10000, false, - dsi, PHTR); + status & PHTR_TESTDOUT_TEST, + 2000, 10000, false, dsi, PHTR); if (ret < 0) { dev_err(dsi->dev, "failed to test PHTR\n"); return ret; @@ -457,29 +459,43 @@ static void rcar_mipi_dsi_set_display_timing(struct rcar_mipi_dsi *dsi, u32 vprmset4r; /* Configuration for Pixel Stream and Packet Header */ - if (mipi_dsi_pixel_format_to_bpp(dsi->format) == 24) + switch (mipi_dsi_pixel_format_to_bpp(dsi->format)) { + case 24: rcar_mipi_dsi_write(dsi, TXVMPSPHSETR, TXVMPSPHSETR_DT_RGB24); - else if (mipi_dsi_pixel_format_to_bpp(dsi->format) == 18) + break; + case 18: rcar_mipi_dsi_write(dsi, TXVMPSPHSETR, TXVMPSPHSETR_DT_RGB18); - else if (mipi_dsi_pixel_format_to_bpp(dsi->format) == 16) + break; + case 16: rcar_mipi_dsi_write(dsi, TXVMPSPHSETR, TXVMPSPHSETR_DT_RGB16); - else { + break; + default: dev_warn(dsi->dev, "unsupported format"); return; } /* Configuration for Blanking sequence and Input Pixel */ - setr = TXVMSETR_HSABPEN_EN | TXVMSETR_HBPBPEN_EN - | TXVMSETR_HFPBPEN_EN | TXVMSETR_SYNSEQ_PULSES - | TXVMSETR_PIXWDTH | TXVMSETR_VSTPM; + setr = TXVMSETR_PIXWDTH | TXVMSETR_VSTPM; + + if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) { + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)) + setr |= TXVMSETR_SYNSEQ_EVENTS; + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP)) + setr |= TXVMSETR_HFPBPEN; + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP)) + setr |= TXVMSETR_HBPBPEN; + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA)) + setr |= TXVMSETR_HSABPEN; + } + rcar_mipi_dsi_write(dsi, TXVMSETR, setr); - /* Configuration for Video Parameters */ - vprmset0r = (mode->flags & DRM_MODE_FLAG_PVSYNC ? - TXVMVPRMSET0R_VSPOL_HIG : TXVMVPRMSET0R_VSPOL_LOW) - | (mode->flags & DRM_MODE_FLAG_PHSYNC ? - TXVMVPRMSET0R_HSPOL_HIG : TXVMVPRMSET0R_HSPOL_LOW) - | TXVMVPRMSET0R_CSPC_RGB | TXVMVPRMSET0R_BPP_24; + /* Configuration for Video Parameters, input is always RGB888 */ + vprmset0r = TXVMVPRMSET0R_BPP_24; + if (mode->flags & DRM_MODE_FLAG_NVSYNC) + vprmset0r |= TXVMVPRMSET0R_VSPOL_LOW; + if (mode->flags & DRM_MODE_FLAG_NHSYNC) + vprmset0r |= TXVMVPRMSET0R_HSPOL_LOW; vprmset1r = TXVMVPRMSET1R_VACTIVE(mode->vdisplay) | TXVMVPRMSET1R_VSA(mode->vsync_end - mode->vsync_start); @@ -620,6 +636,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, vclkset = VCLKSET_CKEN; rcar_mipi_dsi_write(dsi, VCLKSET, vclkset); + /* Output is always RGB, never YCbCr */ if (dsi_format == 24) vclkset |= VCLKSET_BPP_24; else if (dsi_format == 18) @@ -631,7 +648,7 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi *dsi, return -EINVAL; } - vclkset |= VCLKSET_COLOR_RGB | VCLKSET_LANE(dsi->lanes - 1); + vclkset |= VCLKSET_LANE(dsi->lanes - 1); switch (dsi->info->model) { case RCAR_DSI_V3U: @@ -911,6 +928,7 @@ static int rcar_mipi_dsi_host_attach(struct mipi_dsi_host *host, dsi->lanes = device->lanes; dsi->format = device->format; + dsi->mode_flags = device->mode_flags; dsi->next_bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev->of_node, 1, 0); |