diff options
Diffstat (limited to 'drivers/net/ethernet/cadence/macb.h')
| -rw-r--r-- | drivers/net/ethernet/cadence/macb.h | 77 |
1 files changed, 40 insertions, 37 deletions
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index 0830c48973aa..87414a2ddf6e 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h @@ -15,10 +15,6 @@ #include <linux/phy/phy.h> #include <linux/workqueue.h> -#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) || defined(CONFIG_MACB_USE_HWSTAMP) -#define MACB_EXT_DESC -#endif - #define MACB_GREGS_NBR 16 #define MACB_GREGS_VERSION 2 #define MACB_MAX_QUEUES 8 @@ -541,6 +537,8 @@ /* Bitfields in DCFG6. */ #define GEM_PBUF_LSO_OFFSET 27 #define GEM_PBUF_LSO_SIZE 1 +#define GEM_PBUF_RSC_OFFSET 26 +#define GEM_PBUF_RSC_SIZE 1 #define GEM_PBUF_CUTTHRU_OFFSET 25 #define GEM_PBUF_CUTTHRU_SIZE 1 #define GEM_DAW64_OFFSET 23 @@ -756,27 +754,31 @@ #define MACB_MAN_C45_CODE 2 /* Capability mask bits */ -#define MACB_CAPS_ISR_CLEAR_ON_WRITE 0x00000001 -#define MACB_CAPS_USRIO_HAS_CLKEN 0x00000002 -#define MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII 0x00000004 -#define MACB_CAPS_NO_GIGABIT_HALF 0x00000008 -#define MACB_CAPS_USRIO_DISABLED 0x00000010 -#define MACB_CAPS_JUMBO 0x00000020 -#define MACB_CAPS_GEM_HAS_PTP 0x00000040 -#define MACB_CAPS_BD_RD_PREFETCH 0x00000080 -#define MACB_CAPS_NEEDS_RSTONUBR 0x00000100 -#define MACB_CAPS_MIIONRGMII 0x00000200 -#define MACB_CAPS_NEED_TSUCLK 0x00000400 -#define MACB_CAPS_QUEUE_DISABLE 0x00000800 -#define MACB_CAPS_QBV 0x00001000 -#define MACB_CAPS_PCS 0x01000000 -#define MACB_CAPS_HIGH_SPEED 0x02000000 -#define MACB_CAPS_CLK_HW_CHG 0x04000000 -#define MACB_CAPS_MACB_IS_EMAC 0x08000000 -#define MACB_CAPS_FIFO_MODE 0x10000000 -#define MACB_CAPS_GIGABIT_MODE_AVAILABLE 0x20000000 -#define MACB_CAPS_SG_DISABLED 0x40000000 -#define MACB_CAPS_MACB_IS_GEM 0x80000000 +#define MACB_CAPS_ISR_CLEAR_ON_WRITE BIT(0) +#define MACB_CAPS_USRIO_HAS_CLKEN BIT(1) +#define MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII BIT(2) +#define MACB_CAPS_NO_GIGABIT_HALF BIT(3) +#define MACB_CAPS_USRIO_DISABLED BIT(4) +#define MACB_CAPS_JUMBO BIT(5) +#define MACB_CAPS_GEM_HAS_PTP BIT(6) +#define MACB_CAPS_BD_RD_PREFETCH BIT(7) +#define MACB_CAPS_NEEDS_RSTONUBR BIT(8) +#define MACB_CAPS_MIIONRGMII BIT(9) +#define MACB_CAPS_NEED_TSUCLK BIT(10) +#define MACB_CAPS_QUEUE_DISABLE BIT(11) +#define MACB_CAPS_QBV BIT(12) +#define MACB_CAPS_PCS BIT(13) +#define MACB_CAPS_HIGH_SPEED BIT(14) +#define MACB_CAPS_CLK_HW_CHG BIT(15) +#define MACB_CAPS_MACB_IS_EMAC BIT(16) +#define MACB_CAPS_FIFO_MODE BIT(17) +#define MACB_CAPS_GIGABIT_MODE_AVAILABLE BIT(18) +#define MACB_CAPS_SG_DISABLED BIT(19) +#define MACB_CAPS_MACB_IS_GEM BIT(20) +#define MACB_CAPS_DMA_64B BIT(21) +#define MACB_CAPS_DMA_PTP BIT(22) +#define MACB_CAPS_RSC BIT(23) +#define MACB_CAPS_NO_LSO BIT(24) /* LSO settings */ #define MACB_LSO_UFO_ENABLE 0x01 @@ -853,12 +855,6 @@ struct macb_dma_desc { u32 ctrl; }; -#ifdef MACB_EXT_DESC -#define HW_DMA_CAP_32B 0 -#define HW_DMA_CAP_64B (1 << 0) -#define HW_DMA_CAP_PTP (1 << 1) -#define HW_DMA_CAP_64B_PTP (HW_DMA_CAP_64B | HW_DMA_CAP_PTP) - struct macb_dma_desc_64 { u32 addrh; u32 resvd; @@ -868,7 +864,6 @@ struct macb_dma_desc_ptp { u32 ts_1; u32 ts_2; }; -#endif /* DMA descriptor bitfields */ #define MACB_RX_USED_OFFSET 0 @@ -1299,7 +1294,6 @@ struct macb { unsigned int tx_ring_size; unsigned int num_queues; - unsigned int queue_mask; struct macb_queue queues[MACB_MAX_QUEUES]; spinlock_t lock; @@ -1347,11 +1341,8 @@ struct macb { struct macb_ptp_info *ptp_info; /* macb-ptp interface */ - struct phy *sgmii_phy; /* for ZynqMP SGMII mode */ + struct phy *phy; -#ifdef MACB_EXT_DESC - uint8_t hw_dma_cap; -#endif spinlock_t tsu_clk_lock; /* gem tsu clock locking */ unsigned int tsu_rate; struct ptp_clock *ptp_clock; @@ -1443,6 +1434,18 @@ static inline u64 enst_max_hw_interval(u32 speed_mbps) ENST_TIME_GRANULARITY_NS * 1000, (speed_mbps)); } +static inline bool macb_dma64(struct macb *bp) +{ + return IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT) && + bp->caps & MACB_CAPS_DMA_64B; +} + +static inline bool macb_dma_ptp(struct macb *bp) +{ + return IS_ENABLED(CONFIG_MACB_USE_HWSTAMP) && + bp->caps & MACB_CAPS_DMA_PTP; +} + /** * struct macb_platform_data - platform data for MACB Ethernet used for PCI registration * @pclk: platform clock |