diff options
Diffstat (limited to 'drivers/net/ethernet/freescale/fec.h')
| -rw-r--r-- | drivers/net/ethernet/freescale/fec.h | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/net/ethernet/freescale/fec.h b/drivers/net/ethernet/freescale/fec.h index c81f2ea588f2..5c8fdcef759b 100644 --- a/drivers/net/ethernet/freescale/fec.h +++ b/drivers/net/ethernet/freescale/fec.h @@ -14,14 +14,14 @@ #define FEC_H /****************************************************************************/ +#include <dt-bindings/firmware/imx/rsrc.h> +#include <linux/bpf.h> #include <linux/clocksource.h> +#include <linux/firmware/imx/sci.h> #include <linux/net_tstamp.h> #include <linux/pm_qos.h> -#include <linux/bpf.h> #include <linux/ptp_clock_kernel.h> #include <linux/timecounter.h> -#include <dt-bindings/firmware/imx/rsrc.h> -#include <linux/firmware/imx/sci.h> #include <net/xdp.h> #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ @@ -115,7 +115,7 @@ #define IEEE_T_MCOL 0x254 /* Frames tx'd with multiple collision */ #define IEEE_T_DEF 0x258 /* Frames tx'd after deferral delay */ #define IEEE_T_LCOL 0x25c /* Frames tx'd with late collision */ -#define IEEE_T_EXCOL 0x260 /* Frames tx'd with excesv collisions */ +#define IEEE_T_EXCOL 0x260 /* Frames tx'd with excessive collisions */ #define IEEE_T_MACERR 0x264 /* Frames tx'd with TX FIFO underrun */ #define IEEE_T_CSERR 0x268 /* Frames tx'd with carrier sense err */ #define IEEE_T_SQE 0x26c /* Frames tx'd with SQE err */ @@ -342,7 +342,7 @@ struct bufdesc_ex { #define FEC_TX_BD_FTYPE(X) (((X) & 0xf) << 20) /* The number of Tx and Rx buffers. These are allocated from the page - * pool. The code may assume these are power of two, so it it best + * pool. The code may assume these are power of two, so it is best * to keep them that size. * We don't need to allocate pages for the transmitter. We just use * the skbuffer directly. @@ -460,7 +460,7 @@ struct bufdesc_ex { #define FEC_QUIRK_SINGLE_MDIO (1 << 11) /* Controller supports RACC register */ #define FEC_QUIRK_HAS_RACC (1 << 12) -/* Controller supports interrupt coalesc */ +/* Controller supports interrupt coalesce */ #define FEC_QUIRK_HAS_COALESCE (1 << 13) /* Interrupt doesn't wake CPU from deep idle */ #define FEC_QUIRK_ERR006687 (1 << 14) @@ -495,7 +495,7 @@ struct bufdesc_ex { */ #define FEC_QUIRK_HAS_EEE (1 << 20) -/* i.MX8QM ENET IP version add new feture to generate delayed TXC/RXC +/* i.MX8QM ENET IP version add new feature to generate delayed TXC/RXC * as an alternative option to make sure it works well with various PHYs. * For the implementation of delayed clock, ENET takes synchronized 250MHz * clocks to generate 2ns delay. @@ -614,7 +614,6 @@ struct fec_enet_private { unsigned int num_tx_queues; unsigned int num_rx_queues; - /* The saved address of a sent-in-place packet/buffer, for skfree(). */ struct fec_enet_priv_tx_q *tx_queue[FEC_ENET_MAX_TX_QS]; struct fec_enet_priv_rx_q *rx_queue[FEC_ENET_MAX_RX_QS]; |