diff options
Diffstat (limited to 'sound/soc/mediatek')
78 files changed, 8809 insertions, 3673 deletions
diff --git a/sound/soc/mediatek/Kconfig b/sound/soc/mediatek/Kconfig index 296b434caf81..90e367586493 100644 --- a/sound/soc/mediatek/Kconfig +++ b/sound/soc/mediatek/Kconfig @@ -185,27 +185,11 @@ config SND_SOC_MT8186 Select Y if you have such device. If unsure select "N". -config SND_SOC_MT8186_MT6366_DA7219_MAX98357 - tristate "ASoC Audio driver for MT8186 with DA7219 MAX98357A codec" +config SND_SOC_MT8186_MT6366 + tristate "ASoC Audio driver for MT8186 with MT6366 and I2S codecs" depends on I2C && GPIOLIB depends on SND_SOC_MT8186 && MTK_PMIC_WRAP - select SND_SOC_MT6358 - select SND_SOC_MAX98357A select SND_SOC_DA7219 - select SND_SOC_BT_SCO - select SND_SOC_DMIC - select SND_SOC_HDMI_CODEC - help - This adds ASoC driver for Mediatek MT8186 boards - with the MT6366(MT6358) DA7219 MAX98357A codecs. - Select Y if you have such device. - If unsure select "N". - -config SND_SOC_MT8186_MT6366_RT1019_RT5682S - tristate "ASoC Audio driver for MT8186 with RT1019 RT5682S MAX98357A/MAX98360 codec" - depends on I2C && GPIOLIB - depends on SND_SOC_MT8186 && MTK_PMIC_WRAP - select SND_SOC_MAX98357A select SND_SOC_MT6358 select SND_SOC_MAX98357A select SND_SOC_RT1015P @@ -215,8 +199,8 @@ config SND_SOC_MT8186_MT6366_RT1019_RT5682S select SND_SOC_DMIC select SND_SOC_HDMI_CODEC help - This adds ASoC driver for Mediatek MT8186 boards - with the MT6366(MT6358) RT1019 RT5682S codecs. + This adds the ASoC machine driver for Mediatek MT8186 boards + with the MT6366(MT6358) and other I2S audio codecs. Select Y if you have such device. If unsure select "N". @@ -244,6 +228,7 @@ config SND_SOC_MT8188 config SND_SOC_MT8188_MT6359 tristate "ASoC Audio driver for MT8188 with MT6359 and I2S codecs" depends on SND_SOC_MT8188 && MTK_PMIC_WRAP + depends on SND_SOC_MT6359_ACCDET || !SND_SOC_MT6359_ACCDET depends on I2C select SND_SOC_MT6359 select SND_SOC_HDMI_CODEC @@ -314,3 +299,23 @@ config SND_SOC_MT8195_MT6359 boards with the MT6359 and other I2S audio codecs. Select Y if you have such device. If unsure select "N". + +config SND_SOC_MT8365 + tristate "ASoC support for MediaTek MT8365 chip" + depends on ARCH_MEDIATEK || COMPILE_TEST + select SND_SOC_MEDIATEK + help + This adds ASoC platform driver support for MediaTek MT8365 chip + that can be used with other codecs. + Select Y if you have such device. + If unsure select "N". + +config SND_SOC_MT8365_MT6357 + tristate "ASoC Audio driver for MT8365 with MT6357 codec" + depends on SND_SOC_MT8365 && MTK_PMIC_WRAP + select SND_SOC_MT6357 + help + This adds support for ASoC machine driver for MediaTek MT8365 + boards with the MT6357 PMIC codec. + Select Y if you have such device. + If unsure select "N". diff --git a/sound/soc/mediatek/Makefile b/sound/soc/mediatek/Makefile index 3938e7f75c2e..4b55434f2168 100644 --- a/sound/soc/mediatek/Makefile +++ b/sound/soc/mediatek/Makefile @@ -9,3 +9,4 @@ obj-$(CONFIG_SND_SOC_MT8186) += mt8186/ obj-$(CONFIG_SND_SOC_MT8188) += mt8188/ obj-$(CONFIG_SND_SOC_MT8192) += mt8192/ obj-$(CONFIG_SND_SOC_MT8195) += mt8195/ +obj-$(CONFIG_SND_SOC_MT8365) += mt8365/ diff --git a/sound/soc/mediatek/common/Makefile b/sound/soc/mediatek/common/Makefile index 42e636c10c1e..c90d276cf4ed 100644 --- a/sound/soc/mediatek/common/Makefile +++ b/sound/soc/mediatek/common/Makefile @@ -1,6 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mtk-common-objs := mtk-afe-platform-driver.o mtk-afe-fe-dai.o mtk-dsp-sof-common.o mtk-soundcard-driver.o +snd-soc-mtk-common-y := mtk-afe-platform-driver.o mtk-afe-fe-dai.o mtk-dsp-sof-common.o mtk-soundcard-driver.o +snd-soc-mtk-common-y += mtk-dai-adda-common.o + obj-$(CONFIG_SND_SOC_MEDIATEK) += snd-soc-mtk-common.o obj-$(CONFIG_SND_SOC_MTK_BTCVSD) += mtk-btcvsd.o diff --git a/sound/soc/mediatek/common/mtk-afe-fe-dai.c b/sound/soc/mediatek/common/mtk-afe-fe-dai.c index 3044d9ab3d4d..3809068f5620 100644 --- a/sound/soc/mediatek/common/mtk-afe-fe-dai.c +++ b/sound/soc/mediatek/common/mtk-afe-fe-dai.c @@ -500,26 +500,6 @@ static int mtk_memif_set_rate_fs(struct mtk_base_afe *afe, return 0; } -int mtk_memif_set_rate(struct mtk_base_afe *afe, - int id, unsigned int rate) -{ - int fs = 0; - - if (!afe->get_dai_fs) { - dev_err(afe->dev, "%s(), error, afe->get_dai_fs == NULL\n", - __func__); - return -EINVAL; - } - - fs = afe->get_dai_fs(afe, id, rate); - - if (fs < 0) - return -EINVAL; - - return mtk_memif_set_rate_fs(afe, id, fs); -} -EXPORT_SYMBOL_GPL(mtk_memif_set_rate); - int mtk_memif_set_rate_substream(struct snd_pcm_substream *substream, int id, unsigned int rate) { diff --git a/sound/soc/mediatek/common/mtk-afe-fe-dai.h b/sound/soc/mediatek/common/mtk-afe-fe-dai.h index 8cec90671827..b6d0f2b27e86 100644 --- a/sound/soc/mediatek/common/mtk-afe-fe-dai.h +++ b/sound/soc/mediatek/common/mtk-afe-fe-dai.h @@ -42,8 +42,6 @@ int mtk_memif_set_addr(struct mtk_base_afe *afe, int id, size_t dma_bytes); int mtk_memif_set_channel(struct mtk_base_afe *afe, int id, unsigned int channel); -int mtk_memif_set_rate(struct mtk_base_afe *afe, - int id, unsigned int rate); int mtk_memif_set_rate_substream(struct snd_pcm_substream *substream, int id, unsigned int rate); int mtk_memif_set_format(struct mtk_base_afe *afe, diff --git a/sound/soc/mediatek/common/mtk-afe-platform-driver.c b/sound/soc/mediatek/common/mtk-afe-platform-driver.c index 32edcb6d5219..6b6330583941 100644 --- a/sound/soc/mediatek/common/mtk-afe-platform-driver.c +++ b/sound/soc/mediatek/common/mtk-afe-platform-driver.c @@ -120,16 +120,34 @@ int mtk_afe_pcm_new(struct snd_soc_component *component, struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); size = afe->mtk_afe_hardware->buffer_bytes_max; - snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, - afe->dev, size, size); + snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, afe->dev, 0, size); + return 0; } EXPORT_SYMBOL_GPL(mtk_afe_pcm_new); +static int mtk_afe_component_probe(struct snd_soc_component *component) +{ + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); + int ret; + + snd_soc_component_init_regmap(component, afe->regmap); + + /* If the list was never initialized there are no sub-DAIs */ + if (afe->sub_dais.next && afe->sub_dais.prev) { + ret = mtk_afe_add_sub_dai_control(component); + if (ret) + return ret; + } + + return 0; +} + const struct snd_soc_component_driver mtk_afe_pcm_platform = { .name = AFE_PCM_NAME, .pointer = mtk_afe_pcm_pointer, .pcm_construct = mtk_afe_pcm_new, + .probe = mtk_afe_component_probe, }; EXPORT_SYMBOL_GPL(mtk_afe_pcm_platform); diff --git a/sound/soc/mediatek/common/mtk-btcvsd.c b/sound/soc/mediatek/common/mtk-btcvsd.c index c12d170fa1de..d07f288f9752 100644 --- a/sound/soc/mediatek/common/mtk-btcvsd.c +++ b/sound/soc/mediatek/common/mtk-btcvsd.c @@ -1400,7 +1400,7 @@ static struct platform_driver mtk_btcvsd_snd_driver = { .of_match_table = mtk_btcvsd_snd_dt_match, }, .probe = mtk_btcvsd_snd_probe, - .remove_new = mtk_btcvsd_snd_remove, + .remove = mtk_btcvsd_snd_remove, }; module_platform_driver(mtk_btcvsd_snd_driver); diff --git a/sound/soc/mediatek/common/mtk-dai-adda-common.c b/sound/soc/mediatek/common/mtk-dai-adda-common.c new file mode 100644 index 000000000000..4dc1412489d6 --- /dev/null +++ b/sound/soc/mediatek/common/mtk-dai-adda-common.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek ALSA SoC Audio DAI ADDA Common + * + * Copyright (c) 2021 MediaTek Inc. + * Copyright (c) 2024 Collabora Ltd. + * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + */ + +#include <linux/delay.h> +#include <linux/dev_printk.h> + +#include "mtk-base-afe.h" +#include "mtk-dai-adda-common.h" + +unsigned int mtk_adda_dl_rate_transform(struct mtk_base_afe *afe, u32 rate) +{ + switch (rate) { + case 8000: + return MTK_AFE_ADDA_DL_RATE_8K; + case 11025: + return MTK_AFE_ADDA_DL_RATE_11K; + case 12000: + return MTK_AFE_ADDA_DL_RATE_12K; + case 16000: + return MTK_AFE_ADDA_DL_RATE_16K; + case 22050: + return MTK_AFE_ADDA_DL_RATE_22K; + case 24000: + return MTK_AFE_ADDA_DL_RATE_24K; + case 32000: + return MTK_AFE_ADDA_DL_RATE_32K; + case 44100: + return MTK_AFE_ADDA_DL_RATE_44K; + case 48000: + return MTK_AFE_ADDA_DL_RATE_48K; + case 96000: + return MTK_AFE_ADDA_DL_RATE_96K; + case 192000: + return MTK_AFE_ADDA_DL_RATE_192K; + default: + dev_info(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", + __func__, rate); + return MTK_AFE_ADDA_DL_RATE_48K; + } +} +EXPORT_SYMBOL_GPL(mtk_adda_dl_rate_transform); + +unsigned int mtk_adda_ul_rate_transform(struct mtk_base_afe *afe, u32 rate) +{ + switch (rate) { + case 8000: + return MTK_AFE_ADDA_UL_RATE_8K; + case 16000: + return MTK_AFE_ADDA_UL_RATE_16K; + case 32000: + return MTK_AFE_ADDA_UL_RATE_32K; + case 48000: + return MTK_AFE_ADDA_UL_RATE_48K; + case 96000: + return MTK_AFE_ADDA_UL_RATE_96K; + case 192000: + return MTK_AFE_ADDA_UL_RATE_192K; + default: + dev_info(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", + __func__, rate); + return MTK_AFE_ADDA_UL_RATE_48K; + } +} +EXPORT_SYMBOL_GPL(mtk_adda_ul_rate_transform); diff --git a/sound/soc/mediatek/common/mtk-dai-adda-common.h b/sound/soc/mediatek/common/mtk-dai-adda-common.h new file mode 100644 index 000000000000..208b0dd89f57 --- /dev/null +++ b/sound/soc/mediatek/common/mtk-dai-adda-common.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2021 MediaTek Inc. + * Copyright (c) 2024 Collabora Ltd. + * AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> + */ + +#ifndef _MTK_DAI_ADDA_COMMON_H_ +#define _MTK_DAI_ADDA_COMMON_H_ + +struct mtk_base_afe; + +enum adda_input_mode_rate { + MTK_AFE_ADDA_DL_RATE_8K = 0, + MTK_AFE_ADDA_DL_RATE_11K = 1, + MTK_AFE_ADDA_DL_RATE_12K = 2, + MTK_AFE_ADDA_DL_RATE_16K = 3, + MTK_AFE_ADDA_DL_RATE_22K = 4, + MTK_AFE_ADDA_DL_RATE_24K = 5, + MTK_AFE_ADDA_DL_RATE_32K = 6, + MTK_AFE_ADDA_DL_RATE_44K = 7, + MTK_AFE_ADDA_DL_RATE_48K = 8, + MTK_AFE_ADDA_DL_RATE_96K = 9, + MTK_AFE_ADDA_DL_RATE_192K = 10, +}; + +enum adda_voice_mode_rate { + MTK_AFE_ADDA_UL_RATE_8K = 0, + MTK_AFE_ADDA_UL_RATE_16K = 1, + MTK_AFE_ADDA_UL_RATE_32K = 2, + MTK_AFE_ADDA_UL_RATE_48K = 3, + MTK_AFE_ADDA_UL_RATE_96K = 4, + MTK_AFE_ADDA_UL_RATE_192K = 5, + MTK_AFE_ADDA_UL_RATE_48K_HD = 6, +}; + +enum adda_rxif_delay_data { + DELAY_DATA_MISO1 = 0, + DELAY_DATA_MISO0 = 1, + DELAY_DATA_MISO2 = 1, +}; + +unsigned int mtk_adda_dl_rate_transform(struct mtk_base_afe *afe, u32 rate); +unsigned int mtk_adda_ul_rate_transform(struct mtk_base_afe *afe, u32 rate); +#endif diff --git a/sound/soc/mediatek/common/mtk-dsp-sof-common.c b/sound/soc/mediatek/common/mtk-dsp-sof-common.c index 7ec8965a70c0..bca758dca2c9 100644 --- a/sound/soc/mediatek/common/mtk-dsp-sof-common.c +++ b/sound/soc/mediatek/common/mtk-dsp-sof-common.c @@ -15,7 +15,7 @@ int mtk_sof_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, { struct snd_soc_card *card = rtd->card; struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); - struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; + const struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; int i, j, ret = 0; for (i = 0; i < sof_priv->num_streams; i++) { @@ -55,7 +55,6 @@ int mtk_sof_card_probe(struct snd_soc_card *card) int i; struct snd_soc_dai_link *dai_link; struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); - struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; /* Set stream_name to help sof bind widgets */ for_each_card_prelinks(card, i, dai_link) { @@ -63,7 +62,7 @@ int mtk_sof_card_probe(struct snd_soc_card *card) dai_link->stream_name = dai_link->name; } - INIT_LIST_HEAD(&sof_priv->dai_link_list); + INIT_LIST_HEAD(&soc_card_data->sof_dai_link_list); return 0; } @@ -73,7 +72,7 @@ static struct snd_soc_pcm_runtime *mtk_sof_find_tplg_be(struct snd_soc_pcm_runti { struct snd_soc_card *card = rtd->card; struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); - struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; + const struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; struct snd_soc_pcm_runtime *fe; struct snd_soc_pcm_runtime *be; struct snd_soc_dpcm *dpcm; @@ -113,7 +112,7 @@ static int mtk_sof_check_tplg_be_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, { struct snd_soc_card *card = rtd->card; struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); - struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; + const struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; struct snd_soc_pcm_runtime *sof_be; struct mtk_dai_link *dai_link; int ret = 0; @@ -125,7 +124,7 @@ static int mtk_sof_check_tplg_be_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, else if (sof_be->dai_link->be_hw_params_fixup) ret = sof_be->dai_link->be_hw_params_fixup(sof_be, params); } else { - list_for_each_entry(dai_link, &sof_priv->dai_link_list, list) { + list_for_each_entry(dai_link, &soc_card_data->sof_dai_link_list, list) { if (strcmp(dai_link->name, rtd->dai_link->name) == 0) { if (dai_link->be_hw_params_fixup) ret = dai_link->be_hw_params_fixup(rtd, params); @@ -144,7 +143,7 @@ int mtk_sof_card_late_probe(struct snd_soc_card *card) struct snd_soc_component *sof_comp = NULL; struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); - struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; + const struct mtk_sof_priv *sof_priv = soc_card_data->sof_priv; struct snd_soc_dai_link *dai_link; struct mtk_dai_link *mtk_dai_link; int i; @@ -173,7 +172,7 @@ int mtk_sof_card_late_probe(struct snd_soc_card *card) mtk_dai_link->be_hw_params_fixup = dai_link->be_hw_params_fixup; mtk_dai_link->name = dai_link->name; - list_add(&mtk_dai_link->list, &sof_priv->dai_link_list); + list_add(&mtk_dai_link->list, &soc_card_data->sof_dai_link_list); } if (dai_link->no_pcm) diff --git a/sound/soc/mediatek/common/mtk-dsp-sof-common.h b/sound/soc/mediatek/common/mtk-dsp-sof-common.h index 4bc5e1c0c8ed..8784ee471132 100644 --- a/sound/soc/mediatek/common/mtk-dsp-sof-common.h +++ b/sound/soc/mediatek/common/mtk-dsp-sof-common.h @@ -30,7 +30,6 @@ struct mtk_sof_priv { int num_streams; int (*sof_dai_link_fixup)(struct snd_soc_pcm_runtime *rtd, struct snd_pcm_hw_params *params); - struct list_head dai_link_list; }; int mtk_sof_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, diff --git a/sound/soc/mediatek/common/mtk-soc-card.h b/sound/soc/mediatek/common/mtk-soc-card.h index eeda79370049..a1d2794ac1f7 100644 --- a/sound/soc/mediatek/common/mtk-soc-card.h +++ b/sound/soc/mediatek/common/mtk-soc-card.h @@ -9,9 +9,15 @@ #ifndef _MTK_SOC_CARD_H_ #define _MTK_SOC_CARD_H_ +struct mtk_platform_card_data; +struct mtk_sof_priv; + struct mtk_soc_card_data { + const struct mtk_sof_priv *sof_priv; + struct list_head sof_dai_link_list; + struct mtk_platform_card_data *card_data; + struct snd_soc_component *accdet; void *mach_priv; - void *sof_priv; }; #endif diff --git a/sound/soc/mediatek/common/mtk-soundcard-driver.c b/sound/soc/mediatek/common/mtk-soundcard-driver.c index a58e1e3674de..95a083939f3e 100644 --- a/sound/soc/mediatek/common/mtk-soundcard-driver.c +++ b/sound/soc/mediatek/common/mtk-soundcard-driver.c @@ -8,8 +8,11 @@ #include <linux/module.h> #include <linux/of.h> +#include <linux/of_platform.h> #include <sound/soc.h> +#include "mtk-dsp-sof-common.h" +#include "mtk-soc-card.h" #include "mtk-soundcard-driver.h" static int set_card_codec_info(struct snd_soc_card *card, @@ -22,7 +25,11 @@ static int set_card_codec_info(struct snd_soc_card *card, codec_node = of_get_child_by_name(sub_node, "codec"); if (!codec_node) { - dev_dbg(dev, "%s no specified codec\n", dai_link->name); + dev_dbg(dev, "%s no specified codec: setting dummy.\n", dai_link->name); + + dai_link->codecs = &snd_soc_dummy_dlc; + dai_link->num_codecs = 1; + dai_link->dynamic = 1; return 0; } @@ -132,3 +139,220 @@ void clean_card_reference(struct snd_soc_card *card) snd_soc_of_put_dai_link_codecs(dai_link); } EXPORT_SYMBOL_GPL(clean_card_reference); + +int mtk_soundcard_startup(struct snd_pcm_substream *substream, + enum mtk_pcm_constraint_type ctype) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct mtk_soc_card_data *soc_card = snd_soc_card_get_drvdata(rtd->card); + const struct mtk_pcm_constraints_data *mpc = &soc_card->card_data->pcm_constraints[ctype]; + int ret; + + if (unlikely(!mpc)) + return -EINVAL; + + ret = snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_RATE, + mpc->rates); + if (ret < 0) { + dev_err(rtd->dev, "hw_constraint_list rate failed\n"); + return ret; + } + + ret = snd_pcm_hw_constraint_list(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_CHANNELS, + mpc->channels); + if (ret < 0) { + dev_err(rtd->dev, "hw_constraint_list channel failed\n"); + return ret; + } + + return 0; +} +EXPORT_SYMBOL_GPL(mtk_soundcard_startup); + +static int mtk_soundcard_playback_startup(struct snd_pcm_substream *substream) +{ + return mtk_soundcard_startup(substream, MTK_CONSTRAINT_PLAYBACK); +} + +const struct snd_soc_ops mtk_soundcard_common_playback_ops = { + .startup = mtk_soundcard_playback_startup, +}; +EXPORT_SYMBOL_GPL(mtk_soundcard_common_playback_ops); + +static int mtk_soundcard_capture_startup(struct snd_pcm_substream *substream) +{ + return mtk_soundcard_startup(substream, MTK_CONSTRAINT_CAPTURE); +} + +const struct snd_soc_ops mtk_soundcard_common_capture_ops = { + .startup = mtk_soundcard_capture_startup, +}; +EXPORT_SYMBOL_GPL(mtk_soundcard_common_capture_ops); + +int mtk_soundcard_common_probe(struct platform_device *pdev) +{ + struct device_node *platform_node, *adsp_node, *accdet_node; + struct snd_soc_component *accdet_comp; + struct platform_device *accdet_pdev; + const struct mtk_soundcard_pdata *pdata; + struct mtk_soc_card_data *soc_card_data; + struct snd_soc_dai_link *orig_dai_link, *dai_link; + struct snd_soc_jack *jacks; + struct snd_soc_card *card; + int i, orig_num_links, ret; + bool needs_legacy_probe; + + pdata = device_get_match_data(&pdev->dev); + if (!pdata) + return -EINVAL; + + card = pdata->card_data->card; + card->dev = &pdev->dev; + orig_dai_link = card->dai_link; + orig_num_links = card->num_links; + + ret = snd_soc_of_parse_card_name(card, "model"); + if (ret) + return ret; + + if (!card->name) { + if (!pdata->card_name) + return -EINVAL; + + card->name = pdata->card_name; + } + + needs_legacy_probe = !of_property_present(pdev->dev.of_node, "audio-routing"); + if (needs_legacy_probe) { + /* + * If we have no .soc_probe() callback there's no way of using + * any legacy probe mechanism, as that cannot not be generic. + */ + if (!pdata->soc_probe) + return -EINVAL; + + dev_info_once(&pdev->dev, "audio-routing not found: using legacy probe\n"); + } else { + ret = snd_soc_of_parse_audio_routing(card, "audio-routing"); + if (ret) + return ret; + } + + soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*soc_card_data), GFP_KERNEL); + if (!soc_card_data) + return -ENOMEM; + + soc_card_data->card_data = pdata->card_data; + + jacks = devm_kcalloc(card->dev, soc_card_data->card_data->num_jacks, + sizeof(*jacks), GFP_KERNEL); + if (!jacks) + return -ENOMEM; + + soc_card_data->card_data->jacks = jacks; + + accdet_node = of_parse_phandle(pdev->dev.of_node, "mediatek,accdet", 0); + if (accdet_node) { + accdet_pdev = of_find_device_by_node(accdet_node); + if (accdet_pdev) { + accdet_comp = snd_soc_lookup_component(&accdet_pdev->dev, NULL); + if (accdet_comp) + soc_card_data->accdet = accdet_comp; + else + dev_err(&pdev->dev, "No sound component found from mediatek,accdet property\n"); + + put_device(&accdet_pdev->dev); + } else { + dev_err(&pdev->dev, "No device found from mediatek,accdet property\n"); + } + + of_node_put(accdet_node); + } + + platform_node = of_parse_phandle(pdev->dev.of_node, "mediatek,platform", 0); + if (!platform_node) + return dev_err_probe(&pdev->dev, -EINVAL, + "Property mediatek,platform missing or invalid\n"); + + /* Check if this SoC has an Audio DSP */ + if (pdata->sof_priv) + adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); + else + adsp_node = NULL; + + if (adsp_node) { + if (of_property_present(pdev->dev.of_node, "mediatek,dai-link")) { + ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, + "mediatek,dai-link", + card->dai_link, card->num_links); + if (ret) { + of_node_put(adsp_node); + of_node_put(platform_node); + return dev_err_probe(&pdev->dev, ret, + "Cannot parse mediatek,dai-link\n"); + } + } + + soc_card_data->sof_priv = pdata->sof_priv; + card->probe = mtk_sof_card_probe; + card->late_probe = mtk_sof_card_late_probe; + if (!card->topology_shortname_created) { + snprintf(card->topology_shortname, 32, "sof-%s", card->name); + card->topology_shortname_created = true; + } + card->name = card->topology_shortname; + } + + /* + * Regardless of whether the ADSP is wanted and/or present in a machine + * specific device tree or not and regardless of whether any AFE_SOF + * link is present, we have to make sure that the platforms->of_node + * is not NULL, and set to either ADSP (adsp_node) or AFE (platform_node). + */ + for_each_card_prelinks(card, i, dai_link) { + if (adsp_node && !strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF"))) + dai_link->platforms->of_node = adsp_node; + else if (!dai_link->platforms->name && !dai_link->platforms->of_node) + dai_link->platforms->of_node = platform_node; + } + + if (!needs_legacy_probe) { + ret = parse_dai_link_info(card); + if (ret) + goto err_restore_dais; + } else { + if (adsp_node) + of_node_put(adsp_node); + of_node_put(platform_node); + } + + if (pdata->soc_probe) { + ret = pdata->soc_probe(soc_card_data, needs_legacy_probe); + if (ret) { + if (!needs_legacy_probe) + clean_card_reference(card); + goto err_restore_dais; + } + } + snd_soc_card_set_drvdata(card, soc_card_data); + + ret = devm_snd_soc_register_card(&pdev->dev, card); + + if (!needs_legacy_probe) + clean_card_reference(card); + + if (ret) { + dev_err_probe(&pdev->dev, ret, "Cannot register card\n"); + goto err_restore_dais; + } + + return 0; + +err_restore_dais: + card->dai_link = orig_dai_link; + card->num_links = orig_num_links; + return ret; +} +EXPORT_SYMBOL_GPL(mtk_soundcard_common_probe); diff --git a/sound/soc/mediatek/common/mtk-soundcard-driver.h b/sound/soc/mediatek/common/mtk-soundcard-driver.h index d92cac1d7b72..f6c275b54025 100644 --- a/sound/soc/mediatek/common/mtk-soundcard-driver.h +++ b/sound/soc/mediatek/common/mtk-soundcard-driver.h @@ -9,6 +9,48 @@ #ifndef _MTK_SOUNDCARD_DRIVER_H_ #define _MTK_SOUNDCARD_DRIVER_H_ +struct mtk_sof_priv; +struct mtk_soc_card_data; +struct snd_pcm_hw_constraint_list; + +enum mtk_pcm_constraint_type { + MTK_CONSTRAINT_PLAYBACK, + MTK_CONSTRAINT_CAPTURE, + MTK_CONSTRAINT_HDMIDP, + MTK_CONSTRAINT_MAX +}; + +struct mtk_pcm_constraints_data { + const struct snd_pcm_hw_constraint_list *channels; + const struct snd_pcm_hw_constraint_list *rates; +}; + +struct mtk_platform_card_data { + struct snd_soc_card *card; + struct snd_soc_jack *jacks; + const struct mtk_pcm_constraints_data *pcm_constraints; + u8 num_jacks; + u8 num_pcm_constraints; + u8 flags; +}; + +struct mtk_soundcard_pdata { + const char *card_name; + struct mtk_platform_card_data *card_data; + const struct mtk_sof_priv *sof_priv; + + int (*soc_probe)(struct mtk_soc_card_data *card_data, bool legacy); +}; + +/* Common playback/capture card startup ops */ +extern const struct snd_soc_ops mtk_soundcard_common_playback_ops; +extern const struct snd_soc_ops mtk_soundcard_common_capture_ops; + +/* Exported for custom/extended soundcard startup ops */ +int mtk_soundcard_startup(struct snd_pcm_substream *substream, + enum mtk_pcm_constraint_type ctype); + int parse_dai_link_info(struct snd_soc_card *card); void clean_card_reference(struct snd_soc_card *card); +int mtk_soundcard_common_probe(struct platform_device *pdev); #endif diff --git a/sound/soc/mediatek/mt2701/Makefile b/sound/soc/mediatek/mt2701/Makefile index 21d5e697cfa7..507fa26c3945 100644 --- a/sound/soc/mediatek/mt2701/Makefile +++ b/sound/soc/mediatek/mt2701/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt2701-afe-objs := mt2701-afe-pcm.o mt2701-afe-clock-ctrl.o +snd-soc-mt2701-afe-y := mt2701-afe-pcm.o mt2701-afe-clock-ctrl.o obj-$(CONFIG_SND_SOC_MT2701) += snd-soc-mt2701-afe.o # machine driver diff --git a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c index 6a17deb874df..fcae38135d93 100644 --- a/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c +++ b/sound/soc/mediatek/mt2701/mt2701-afe-pcm.c @@ -1462,18 +1462,18 @@ static const struct of_device_id mt2701_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt2701_afe_pcm_dt_match); static const struct dev_pm_ops mt2701_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt2701_afe_runtime_suspend, - mt2701_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt2701_afe_runtime_suspend, + mt2701_afe_runtime_resume, NULL) }; static struct platform_driver mt2701_afe_pcm_driver = { .driver = { .name = "mt2701-audio", .of_match_table = mt2701_afe_pcm_dt_match, - .pm = &mt2701_afe_pm_ops, + .pm = pm_ptr(&mt2701_afe_pm_ops), }, .probe = mt2701_afe_pcm_dev_probe, - .remove_new = mt2701_afe_pcm_dev_remove, + .remove = mt2701_afe_pcm_dev_remove, }; module_platform_driver(mt2701_afe_pcm_driver); diff --git a/sound/soc/mediatek/mt2701/mt2701-cs42448.c b/sound/soc/mediatek/mt2701/mt2701-cs42448.c index 1262e8a1bc9a..778a9dccfcaa 100644 --- a/sound/soc/mediatek/mt2701/mt2701-cs42448.c +++ b/sound/soc/mediatek/mt2701/mt2701-cs42448.c @@ -221,7 +221,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST}, .ops = &mt2701_cs42448_48k_fe_ops, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(fe_multi_ch_out), }, [DAI_LINK_FE_PCM0_IN] = { @@ -231,7 +231,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST}, .ops = &mt2701_cs42448_48k_fe_ops, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(fe_pcm0_in), }, [DAI_LINK_FE_PCM1_IN] = { @@ -241,7 +241,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST}, .ops = &mt2701_cs42448_48k_fe_ops, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(fe_pcm1_in), }, [DAI_LINK_FE_BT_OUT] = { @@ -250,7 +250,7 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(fe_bt_out), }, [DAI_LINK_FE_BT_IN] = { @@ -259,55 +259,45 @@ static struct snd_soc_dai_link mt2701_cs42448_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(fe_bt_in), }, /* BE */ [DAI_LINK_BE_I2S0] = { .name = "mt2701-cs42448-I2S0", .no_pcm = 1, - .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC | SND_SOC_DAIFMT_GATED, .ops = &mt2701_cs42448_be_ops, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(be_i2s0), }, [DAI_LINK_BE_I2S1] = { .name = "mt2701-cs42448-I2S1", .no_pcm = 1, - .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC | SND_SOC_DAIFMT_GATED, .ops = &mt2701_cs42448_be_ops, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(be_i2s1), }, [DAI_LINK_BE_I2S2] = { .name = "mt2701-cs42448-I2S2", .no_pcm = 1, - .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC | SND_SOC_DAIFMT_GATED, .ops = &mt2701_cs42448_be_ops, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(be_i2s2), }, [DAI_LINK_BE_I2S3] = { .name = "mt2701-cs42448-I2S3", .no_pcm = 1, - .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC | SND_SOC_DAIFMT_GATED, .ops = &mt2701_cs42448_be_ops, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(be_i2s3), }, [DAI_LINK_BE_MRG_BT] = { .name = "mt2701-cs42448-MRG-BT", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(be_mrg_bt), }, }; @@ -329,10 +319,10 @@ static int mt2701_cs42448_machine_probe(struct platform_device *pdev) int ret; int i; struct device_node *platform_node, *codec_node, *codec_node_bt_mrg; + struct device *dev = &pdev->dev; struct mt2701_cs42448_private *priv = - devm_kzalloc(&pdev->dev, sizeof(struct mt2701_cs42448_private), + devm_kzalloc(dev, sizeof(struct mt2701_cs42448_private), GFP_KERNEL); - struct device *dev = &pdev->dev; struct snd_soc_dai_link *dai_link; if (!priv) @@ -341,7 +331,7 @@ static int mt2701_cs42448_machine_probe(struct platform_device *pdev) platform_node = of_parse_phandle(pdev->dev.of_node, "mediatek,platform", 0); if (!platform_node) { - dev_err(&pdev->dev, "Property 'platform' missing or invalid\n"); + dev_err(dev, "Property 'platform' missing or invalid\n"); return -EINVAL; } for_each_card_prelinks(card, i, dai_link) { @@ -355,7 +345,7 @@ static int mt2701_cs42448_machine_probe(struct platform_device *pdev) codec_node = of_parse_phandle(pdev->dev.of_node, "mediatek,audio-codec", 0); if (!codec_node) { - dev_err(&pdev->dev, + dev_err(dev, "Property 'audio-codec' missing or invalid\n"); return -EINVAL; } @@ -368,7 +358,7 @@ static int mt2701_cs42448_machine_probe(struct platform_device *pdev) codec_node_bt_mrg = of_parse_phandle(pdev->dev.of_node, "mediatek,audio-codec-bt-mrg", 0); if (!codec_node_bt_mrg) { - dev_err(&pdev->dev, + dev_err(dev, "Property 'audio-codec-bt-mrg' missing or invalid\n"); return -EINVAL; } @@ -377,7 +367,7 @@ static int mt2701_cs42448_machine_probe(struct platform_device *pdev) ret = snd_soc_of_parse_audio_routing(card, "audio-routing"); if (ret) { - dev_err(&pdev->dev, "failed to parse audio-routing: %d\n", ret); + dev_err(dev, "failed to parse audio-routing: %d\n", ret); return ret; } @@ -395,10 +385,10 @@ static int mt2701_cs42448_machine_probe(struct platform_device *pdev) snd_soc_card_set_drvdata(card, priv); - ret = devm_snd_soc_register_card(&pdev->dev, card); + ret = devm_snd_soc_register_card(dev, card); if (ret) - dev_err(&pdev->dev, "%s snd_soc_register_card fail %d\n", + dev_err(dev, "%s snd_soc_register_card fail %d\n", __func__, ret); return ret; } diff --git a/sound/soc/mediatek/mt2701/mt2701-wm8960.c b/sound/soc/mediatek/mt2701/mt2701-wm8960.c index 8a6643bfe830..84b3d6cd77a5 100644 --- a/sound/soc/mediatek/mt2701/mt2701-wm8960.c +++ b/sound/soc/mediatek/mt2701/mt2701-wm8960.c @@ -67,7 +67,7 @@ static struct snd_soc_dai_link mt2701_wm8960_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback), }, { @@ -76,18 +76,16 @@ static struct snd_soc_dai_link mt2701_wm8960_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture), }, /* BE */ { .name = "wm8960-codec", .no_pcm = 1, - .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS + .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBC_CFC | SND_SOC_DAIFMT_GATED, .ops = &mt2701_wm8960_be_ops, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(codec), }, }; diff --git a/sound/soc/mediatek/mt6797/Makefile b/sound/soc/mediatek/mt6797/Makefile index bf6e179ea93f..150021495e94 100644 --- a/sound/soc/mediatek/mt6797/Makefile +++ b/sound/soc/mediatek/mt6797/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt6797-afe-objs := \ +snd-soc-mt6797-afe-y := \ mt6797-afe-pcm.o \ mt6797-afe-clk.o \ mt6797-dai-pcm.o \ diff --git a/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c b/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c index da7267c684b1..f62a32f2f2b6 100644 --- a/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c +++ b/sound/soc/mediatek/mt6797/mt6797-afe-pcm.c @@ -704,18 +704,6 @@ static int mt6797_afe_runtime_resume(struct device *dev) return 0; } -static int mt6797_afe_component_probe(struct snd_soc_component *component) -{ - return mtk_afe_add_sub_dai_control(component); -} - -static const struct snd_soc_component_driver mt6797_afe_component = { - .name = AFE_PCM_NAME, - .probe = mt6797_afe_component_probe, - .pointer = mtk_afe_pcm_pointer, - .pcm_construct = mtk_afe_pcm_new, -}; - static int mt6797_dai_memif_register(struct mtk_base_afe *afe) { struct mtk_base_afe_dai *dai; @@ -852,7 +840,7 @@ static int mt6797_afe_pcm_dev_probe(struct platform_device *pdev) pm_runtime_get_sync(&pdev->dev); /* register component */ - ret = devm_snd_soc_register_component(dev, &mt6797_afe_component, + ret = devm_snd_soc_register_component(dev, &mtk_afe_pcm_platform, NULL, 0); if (ret) { dev_warn(dev, "err_platform\n"); @@ -891,18 +879,18 @@ static const struct of_device_id mt6797_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt6797_afe_pcm_dt_match); static const struct dev_pm_ops mt6797_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt6797_afe_runtime_suspend, - mt6797_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt6797_afe_runtime_suspend, + mt6797_afe_runtime_resume, NULL) }; static struct platform_driver mt6797_afe_pcm_driver = { .driver = { .name = "mt6797-audio", .of_match_table = mt6797_afe_pcm_dt_match, - .pm = &mt6797_afe_pm_ops, + .pm = pm_ptr(&mt6797_afe_pm_ops), }, .probe = mt6797_afe_pcm_dev_probe, - .remove_new = mt6797_afe_pcm_dev_remove, + .remove = mt6797_afe_pcm_dev_remove, }; module_platform_driver(mt6797_afe_pcm_driver); diff --git a/sound/soc/mediatek/mt6797/mt6797-dai-adda.c b/sound/soc/mediatek/mt6797/mt6797-dai-adda.c index 0ac6409c6d61..78f3ad758c12 100644 --- a/sound/soc/mediatek/mt6797/mt6797-dai-adda.c +++ b/sound/soc/mediatek/mt6797/mt6797-dai-adda.c @@ -10,86 +10,7 @@ #include "mt6797-afe-common.h" #include "mt6797-interconnection.h" #include "mt6797-reg.h" - -enum { - MTK_AFE_ADDA_DL_RATE_8K = 0, - MTK_AFE_ADDA_DL_RATE_11K = 1, - MTK_AFE_ADDA_DL_RATE_12K = 2, - MTK_AFE_ADDA_DL_RATE_16K = 3, - MTK_AFE_ADDA_DL_RATE_22K = 4, - MTK_AFE_ADDA_DL_RATE_24K = 5, - MTK_AFE_ADDA_DL_RATE_32K = 6, - MTK_AFE_ADDA_DL_RATE_44K = 7, - MTK_AFE_ADDA_DL_RATE_48K = 8, - MTK_AFE_ADDA_DL_RATE_96K = 9, - MTK_AFE_ADDA_DL_RATE_192K = 10, -}; - -enum { - MTK_AFE_ADDA_UL_RATE_8K = 0, - MTK_AFE_ADDA_UL_RATE_16K = 1, - MTK_AFE_ADDA_UL_RATE_32K = 2, - MTK_AFE_ADDA_UL_RATE_48K = 3, - MTK_AFE_ADDA_UL_RATE_96K = 4, - MTK_AFE_ADDA_UL_RATE_192K = 5, - MTK_AFE_ADDA_UL_RATE_48K_HD = 6, -}; - -static unsigned int adda_dl_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_DL_RATE_8K; - case 11025: - return MTK_AFE_ADDA_DL_RATE_11K; - case 12000: - return MTK_AFE_ADDA_DL_RATE_12K; - case 16000: - return MTK_AFE_ADDA_DL_RATE_16K; - case 22050: - return MTK_AFE_ADDA_DL_RATE_22K; - case 24000: - return MTK_AFE_ADDA_DL_RATE_24K; - case 32000: - return MTK_AFE_ADDA_DL_RATE_32K; - case 44100: - return MTK_AFE_ADDA_DL_RATE_44K; - case 48000: - return MTK_AFE_ADDA_DL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_DL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_DL_RATE_192K; - default: - dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_DL_RATE_48K; - } -} - -static unsigned int adda_ul_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_UL_RATE_8K; - case 16000: - return MTK_AFE_ADDA_UL_RATE_16K; - case 32000: - return MTK_AFE_ADDA_UL_RATE_32K; - case 48000: - return MTK_AFE_ADDA_UL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_UL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_UL_RATE_192K; - default: - dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_UL_RATE_48K; - } -} +#include "../common/mtk-dai-adda-common.h" /* dai component */ static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = { @@ -246,7 +167,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON1, 0); /* set input sampling rate */ - dl_src2_con0 = adda_dl_rate_transform(afe, rate) << 28; + dl_src2_con0 = mtk_adda_dl_rate_transform(afe, rate) << 28; /* set output mode */ switch (rate) { @@ -296,7 +217,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, 0x1 << 0, 0x0 << 0); - voice_mode = adda_ul_rate_transform(afe, rate); + voice_mode = mtk_adda_ul_rate_transform(afe, rate); ul_src_con0 |= (voice_mode << 17) & (0x7 << 17); diff --git a/sound/soc/mediatek/mt6797/mt6797-mt6351.c b/sound/soc/mediatek/mt6797/mt6797-mt6351.c index 784c201b8fd4..daad9544a8d4 100644 --- a/sound/soc/mediatek/mt6797/mt6797-mt6351.c +++ b/sound/soc/mediatek/mt6797/mt6797-mt6351.c @@ -78,7 +78,7 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback_1), }, { @@ -87,7 +87,7 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback_2), }, { @@ -96,7 +96,7 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback_3), }, { @@ -105,7 +105,7 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_1), }, { @@ -114,7 +114,7 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_2), }, { @@ -123,7 +123,7 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_3), }, { @@ -132,7 +132,7 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_mono_1), }, { @@ -141,8 +141,6 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_lpbk), }, @@ -152,8 +150,6 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_speech), }, @@ -161,24 +157,18 @@ static struct snd_soc_dai_link mt6797_mt6351_dai_links[] = { { .name = "Primary Codec", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(primary_codec), }, { .name = "PCM 1", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm1), }, { .name = "PCM 2", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm2), }, diff --git a/sound/soc/mediatek/mt7986/Makefile b/sound/soc/mediatek/mt7986/Makefile index fc4c82559b29..4b54bbe88683 100644 --- a/sound/soc/mediatek/mt7986/Makefile +++ b/sound/soc/mediatek/mt7986/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt7986-afe-objs := \ +snd-soc-mt7986-afe-y := \ mt7986-afe-pcm.o \ mt7986-dai-etdm.o diff --git a/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c b/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c index d497e1129889..7a6ad9116e55 100644 --- a/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c +++ b/sound/soc/mediatek/mt7986/mt7986-afe-pcm.c @@ -106,7 +106,7 @@ static const struct snd_pcm_hardware mt7986_afe_hardware = { static int mt7986_memif_fs(struct snd_pcm_substream *substream, unsigned int rate) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); @@ -116,7 +116,7 @@ static int mt7986_memif_fs(struct snd_pcm_substream *substream, static int mt7986_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); @@ -429,18 +429,6 @@ static int mt7986_afe_runtime_resume(struct device *dev) return 0; } -static int mt7986_afe_component_probe(struct snd_soc_component *component) -{ - return mtk_afe_add_sub_dai_control(component); -} - -static const struct snd_soc_component_driver mt7986_afe_component = { - .name = AFE_PCM_NAME, - .probe = mt7986_afe_component_probe, - .pointer = mtk_afe_pcm_pointer, - .pcm_construct = mtk_afe_pcm_new, -}; - static int mt7986_dai_memif_register(struct mtk_base_afe *afe) { struct mtk_base_afe_dai *dai; @@ -541,10 +529,9 @@ static int mt7986_afe_pcm_dev_probe(struct platform_device *pdev) /* request irq */ irq_id = platform_get_irq(pdev, 0); - if (irq_id < 0) { - ret = irq_id; - return dev_err_probe(dev, ret, "No irq found\n"); - } + if (irq_id < 0) + return irq_id; + ret = devm_request_irq(dev, irq_id, mt7986_afe_irq_handler, IRQF_TRIGGER_NONE, "asys-isr", (void *)afe); if (ret) @@ -573,7 +560,7 @@ static int mt7986_afe_pcm_dev_probe(struct platform_device *pdev) /* register component */ ret = devm_snd_soc_register_component(&pdev->dev, - &mt7986_afe_component, + &mtk_afe_pcm_platform, NULL, 0); if (ret) return dev_err_probe(dev, ret, "Cannot register AFE component\n"); @@ -602,18 +589,18 @@ static const struct of_device_id mt7986_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt7986_afe_pcm_dt_match); static const struct dev_pm_ops mt7986_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt7986_afe_runtime_suspend, - mt7986_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt7986_afe_runtime_suspend, + mt7986_afe_runtime_resume, NULL) }; static struct platform_driver mt7986_afe_pcm_driver = { .driver = { .name = "mt7986-audio", .of_match_table = mt7986_afe_pcm_dt_match, - .pm = &mt7986_afe_pm_ops, + .pm = pm_ptr(&mt7986_afe_pm_ops), }, .probe = mt7986_afe_pcm_dev_probe, - .remove_new = mt7986_afe_pcm_dev_remove, + .remove = mt7986_afe_pcm_dev_remove, }; module_platform_driver(mt7986_afe_pcm_driver); diff --git a/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c b/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c index d57971413a04..fc55ff47b7bc 100644 --- a/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c +++ b/sound/soc/mediatek/mt7986/mt7986-dai-etdm.c @@ -348,10 +348,10 @@ static int mtk_dai_etdm_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) } switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { - case SND_SOC_DAIFMT_CBM_CFM: + case SND_SOC_DAIFMT_CBP_CFP: etdm_data->slave_mode = true; break; - case SND_SOC_DAIFMT_CBS_CFS: + case SND_SOC_DAIFMT_CBC_CFC: etdm_data->slave_mode = false; break; default: diff --git a/sound/soc/mediatek/mt7986/mt7986-wm8960.c b/sound/soc/mediatek/mt7986/mt7986-wm8960.c index 6982e833421d..f1dc18222be7 100644 --- a/sound/soc/mediatek/mt7986/mt7986-wm8960.c +++ b/sound/soc/mediatek/mt7986/mt7986-wm8960.c @@ -45,7 +45,7 @@ static struct snd_soc_dai_link mt7986_wm8960_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback), }, { @@ -54,7 +54,7 @@ static struct snd_soc_dai_link mt7986_wm8960_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture), }, /* BE */ @@ -63,10 +63,8 @@ static struct snd_soc_dai_link mt7986_wm8960_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS | + SND_SOC_DAIFMT_CBC_CFC | SND_SOC_DAIFMT_GATED, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(codec), }, }; diff --git a/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c b/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c index b6291b7c811e..04ed0cfec174 100644 --- a/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c +++ b/sound/soc/mediatek/mt8173/mt8173-afe-pcm.c @@ -1212,18 +1212,18 @@ static const struct of_device_id mt8173_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt8173_afe_pcm_dt_match); static const struct dev_pm_ops mt8173_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt8173_afe_runtime_suspend, - mt8173_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt8173_afe_runtime_suspend, + mt8173_afe_runtime_resume, NULL) }; static struct platform_driver mt8173_afe_pcm_driver = { .driver = { .name = "mt8173-afe-pcm", .of_match_table = mt8173_afe_pcm_dt_match, - .pm = &mt8173_afe_pm_ops, + .pm = pm_ptr(&mt8173_afe_pm_ops), }, .probe = mt8173_afe_pcm_dev_probe, - .remove_new = mt8173_afe_pcm_dev_remove, + .remove = mt8173_afe_pcm_dev_remove, }; module_platform_driver(mt8173_afe_pcm_driver); diff --git a/sound/soc/mediatek/mt8173/mt8173-max98090.c b/sound/soc/mediatek/mt8173/mt8173-max98090.c index 0557a287c641..49ebb67c818a 100644 --- a/sound/soc/mediatek/mt8173/mt8173-max98090.c +++ b/sound/soc/mediatek/mt8173/mt8173-max98090.c @@ -104,7 +104,7 @@ static struct snd_soc_dai_link mt8173_max98090_dais[] = { .stream_name = "MAX98090 Playback", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback), }, { @@ -112,7 +112,7 @@ static struct snd_soc_dai_link mt8173_max98090_dais[] = { .stream_name = "MAX98090 Capture", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture), }, /* Back End DAI links */ @@ -122,9 +122,7 @@ static struct snd_soc_dai_link mt8173_max98090_dais[] = { .init = mt8173_max98090_init, .ops = &mt8173_max98090_ops, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, - .dpcm_playback = 1, - .dpcm_capture = 1, + SND_SOC_DAIFMT_CBC_CFC, SND_SOC_DAILINK_REG(hifi), }, }; diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c index 4ed06c269065..dc063d85e62f 100644 --- a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c +++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5514.c @@ -139,7 +139,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5514_dais[] = { .stream_name = "rt5650_rt5514 Playback", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback), }, [DAI_LINK_CAPTURE] = { @@ -147,7 +147,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5514_dais[] = { .stream_name = "rt5650_rt5514 Capture", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture), }, /* Back End DAI links */ @@ -156,11 +156,9 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5514_dais[] = { .no_pcm = 1, .init = mt8173_rt5650_rt5514_init, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, + SND_SOC_DAIFMT_CBC_CFC, .ops = &mt8173_rt5650_rt5514_ops, .ignore_pmdown_time = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(codec), }, }; diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c index 763067c21153..a1ba5df87e1e 100644 --- a/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c +++ b/sound/soc/mediatek/mt8173/mt8173-rt5650-rt5676.c @@ -171,7 +171,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { .stream_name = "rt5650_rt5676 Playback", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback), }, [DAI_LINK_CAPTURE] = { @@ -179,7 +179,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { .stream_name = "rt5650_rt5676 Capture", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture), }, [DAI_LINK_HDMI] = { @@ -187,7 +187,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { .stream_name = "HDMI PCM", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(hdmi_pcm), }, @@ -197,17 +197,15 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { .no_pcm = 1, .init = mt8173_rt5650_rt5676_init, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, + SND_SOC_DAIFMT_CBC_CFC, .ops = &mt8173_rt5650_rt5676_ops, .ignore_pmdown_time = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(codec), }, [DAI_LINK_HDMI_I2S] = { .name = "HDMI BE", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(hdmi_be), }, /* rt5676 <-> rt5650 intercodec link: Sets rt5676 I2S2 as master */ @@ -216,7 +214,7 @@ static struct snd_soc_dai_link mt8173_rt5650_rt5676_dais[] = { .stream_name = "rt5650_rt5676 intercodec", .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBM_CFM, + SND_SOC_DAIFMT_CBP_CFP, SND_SOC_DAILINK_REG(intercodec), }, }; diff --git a/sound/soc/mediatek/mt8173/mt8173-rt5650.c b/sound/soc/mediatek/mt8173/mt8173-rt5650.c index 466f176f8e94..7d6a3586cdd5 100644 --- a/sound/soc/mediatek/mt8173/mt8173-rt5650.c +++ b/sound/soc/mediatek/mt8173/mt8173-rt5650.c @@ -210,7 +210,7 @@ static struct snd_soc_dai_link mt8173_rt5650_dais[] = { .stream_name = "rt5650 Playback", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback), }, [DAI_LINK_CAPTURE] = { @@ -218,7 +218,7 @@ static struct snd_soc_dai_link mt8173_rt5650_dais[] = { .stream_name = "rt5650 Capture", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture), }, [DAI_LINK_HDMI] = { @@ -226,7 +226,7 @@ static struct snd_soc_dai_link mt8173_rt5650_dais[] = { .stream_name = "HDMI PCM", .trigger = {SND_SOC_DPCM_TRIGGER_POST, SND_SOC_DPCM_TRIGGER_POST}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(hdmi_pcm), }, /* Back End DAI links */ @@ -235,17 +235,15 @@ static struct snd_soc_dai_link mt8173_rt5650_dais[] = { .no_pcm = 1, .init = mt8173_rt5650_init, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, + SND_SOC_DAIFMT_CBC_CFC, .ops = &mt8173_rt5650_ops, .ignore_pmdown_time = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(codec), }, [DAI_LINK_HDMI_I2S] = { .name = "HDMI BE", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .init = mt8173_rt5650_hdmi_init, SND_SOC_DAILINK_REG(hdmi_be), }, diff --git a/sound/soc/mediatek/mt8183/Makefile b/sound/soc/mediatek/mt8183/Makefile index c0a3bbc2c1f6..0d0dcdde00fc 100644 --- a/sound/soc/mediatek/mt8183/Makefile +++ b/sound/soc/mediatek/mt8183/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt8183-afe-objs := \ +snd-soc-mt8183-afe-y := \ mt8183-afe-pcm.o \ mt8183-afe-clk.o \ mt8183-dai-i2s.o \ diff --git a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c index 9e432ed9124b..e8884354995c 100644 --- a/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c +++ b/sound/soc/mediatek/mt8183/mt8183-afe-pcm.c @@ -424,342 +424,97 @@ static const struct snd_soc_component_driver mt8183_afe_pcm_dai_component = { .name = "mt8183-afe-pcm-dai", }; +#define MT8183_MEMIF_BASE(_id, _en_reg, _fs_reg, _mono_reg) \ + [MT8183_MEMIF_##_id] = { \ + .name = #_id, \ + .id = MT8183_MEMIF_##_id, \ + .reg_ofs_base = AFE_##_id##_BASE, \ + .reg_ofs_cur = AFE_##_id##_CUR, \ + .reg_ofs_end = AFE_##_id##_END, \ + .fs_reg = (_fs_reg), \ + .fs_shift = _id##_MODE_SFT, \ + .fs_maskbit = _id##_MODE_MASK, \ + .mono_reg = (_mono_reg), \ + .mono_shift = _id##_DATA_SFT, \ + .enable_reg = (_en_reg), \ + .enable_shift = _id##_ON_SFT, \ + .hd_reg = AFE_MEMIF_HD_MODE, \ + .hd_align_reg = AFE_MEMIF_HDALIGN, \ + .hd_shift = _id##_HD_SFT, \ + .hd_align_mshift = _id##_HD_ALIGN_SFT, \ + .agent_disable_reg = -1, \ + .agent_disable_shift = -1, \ + .msb_reg = -1, \ + .msb_shift = -1, \ + } + +#define MT8183_MEMIF(_id, _fs_reg, _mono_reg) \ + MT8183_MEMIF_BASE(_id, AFE_DAC_CON0, _fs_reg, _mono_reg) + +/* For convenience with macros: missing register fields */ +#define MOD_DAI_DATA_SFT -1 +#define HDMI_MODE_SFT -1 +#define HDMI_MODE_MASK -1 +#define HDMI_DATA_SFT -1 +#define HDMI_ON_SFT -1 + +/* For convenience with macros: register name differences */ +#define AFE_VUL12_BASE AFE_VUL_D2_BASE +#define AFE_VUL12_CUR AFE_VUL_D2_CUR +#define AFE_VUL12_END AFE_VUL_D2_END +#define AWB2_HD_ALIGN_SFT AWB2_ALIGN_SFT +#define VUL12_DATA_SFT VUL12_MONO_SFT +#define AFE_HDMI_BASE AFE_HDMI_OUT_BASE +#define AFE_HDMI_CUR AFE_HDMI_OUT_CUR +#define AFE_HDMI_END AFE_HDMI_OUT_END + static const struct mtk_base_memif_data memif_data[MT8183_MEMIF_NUM] = { - [MT8183_MEMIF_DL1] = { - .name = "DL1", - .id = MT8183_MEMIF_DL1, - .reg_ofs_base = AFE_DL1_BASE, - .reg_ofs_cur = AFE_DL1_CUR, - .fs_reg = AFE_DAC_CON1, - .fs_shift = DL1_MODE_SFT, - .fs_maskbit = DL1_MODE_MASK, - .mono_reg = AFE_DAC_CON1, - .mono_shift = DL1_DATA_SFT, - .enable_reg = AFE_DAC_CON0, - .enable_shift = DL1_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = DL1_HD_SFT, - .hd_align_mshift = DL1_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_DL2] = { - .name = "DL2", - .id = MT8183_MEMIF_DL2, - .reg_ofs_base = AFE_DL2_BASE, - .reg_ofs_cur = AFE_DL2_CUR, - .fs_reg = AFE_DAC_CON1, - .fs_shift = DL2_MODE_SFT, - .fs_maskbit = DL2_MODE_MASK, - .mono_reg = AFE_DAC_CON1, - .mono_shift = DL2_DATA_SFT, - .enable_reg = AFE_DAC_CON0, - .enable_shift = DL2_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = DL2_HD_SFT, - .hd_align_mshift = DL2_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_DL3] = { - .name = "DL3", - .id = MT8183_MEMIF_DL3, - .reg_ofs_base = AFE_DL3_BASE, - .reg_ofs_cur = AFE_DL3_CUR, - .fs_reg = AFE_DAC_CON2, - .fs_shift = DL3_MODE_SFT, - .fs_maskbit = DL3_MODE_MASK, - .mono_reg = AFE_DAC_CON1, - .mono_shift = DL3_DATA_SFT, - .enable_reg = AFE_DAC_CON0, - .enable_shift = DL3_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = DL3_HD_SFT, - .hd_align_mshift = DL3_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_VUL2] = { - .name = "VUL2", - .id = MT8183_MEMIF_VUL2, - .reg_ofs_base = AFE_VUL2_BASE, - .reg_ofs_cur = AFE_VUL2_CUR, - .fs_reg = AFE_DAC_CON2, - .fs_shift = VUL2_MODE_SFT, - .fs_maskbit = VUL2_MODE_MASK, - .mono_reg = AFE_DAC_CON2, - .mono_shift = VUL2_DATA_SFT, - .enable_reg = AFE_DAC_CON0, - .enable_shift = VUL2_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = VUL2_HD_SFT, - .hd_align_mshift = VUL2_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_AWB] = { - .name = "AWB", - .id = MT8183_MEMIF_AWB, - .reg_ofs_base = AFE_AWB_BASE, - .reg_ofs_cur = AFE_AWB_CUR, - .fs_reg = AFE_DAC_CON1, - .fs_shift = AWB_MODE_SFT, - .fs_maskbit = AWB_MODE_MASK, - .mono_reg = AFE_DAC_CON1, - .mono_shift = AWB_DATA_SFT, - .enable_reg = AFE_DAC_CON0, - .enable_shift = AWB_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = AWB_HD_SFT, - .hd_align_mshift = AWB_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_AWB2] = { - .name = "AWB2", - .id = MT8183_MEMIF_AWB2, - .reg_ofs_base = AFE_AWB2_BASE, - .reg_ofs_cur = AFE_AWB2_CUR, - .fs_reg = AFE_DAC_CON2, - .fs_shift = AWB2_MODE_SFT, - .fs_maskbit = AWB2_MODE_MASK, - .mono_reg = AFE_DAC_CON2, - .mono_shift = AWB2_DATA_SFT, - .enable_reg = AFE_DAC_CON0, - .enable_shift = AWB2_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = AWB2_HD_SFT, - .hd_align_mshift = AWB2_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_VUL12] = { - .name = "VUL12", - .id = MT8183_MEMIF_VUL12, - .reg_ofs_base = AFE_VUL_D2_BASE, - .reg_ofs_cur = AFE_VUL_D2_CUR, - .fs_reg = AFE_DAC_CON0, - .fs_shift = VUL12_MODE_SFT, - .fs_maskbit = VUL12_MODE_MASK, - .mono_reg = AFE_DAC_CON0, - .mono_shift = VUL12_MONO_SFT, - .enable_reg = AFE_DAC_CON0, - .enable_shift = VUL12_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = VUL12_HD_SFT, - .hd_align_mshift = VUL12_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_MOD_DAI] = { - .name = "MOD_DAI", - .id = MT8183_MEMIF_MOD_DAI, - .reg_ofs_base = AFE_MOD_DAI_BASE, - .reg_ofs_cur = AFE_MOD_DAI_CUR, - .fs_reg = AFE_DAC_CON1, - .fs_shift = MOD_DAI_MODE_SFT, - .fs_maskbit = MOD_DAI_MODE_MASK, - .mono_reg = -1, - .mono_shift = 0, - .enable_reg = AFE_DAC_CON0, - .enable_shift = MOD_DAI_ON_SFT, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = MOD_DAI_HD_SFT, - .hd_align_mshift = MOD_DAI_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, - [MT8183_MEMIF_HDMI] = { - .name = "HDMI", - .id = MT8183_MEMIF_HDMI, - .reg_ofs_base = AFE_HDMI_OUT_BASE, - .reg_ofs_cur = AFE_HDMI_OUT_CUR, - .fs_reg = -1, - .fs_shift = -1, - .fs_maskbit = -1, - .mono_reg = -1, - .mono_shift = -1, - .enable_reg = -1, /* control in tdm for sync start */ - .enable_shift = -1, - .hd_reg = AFE_MEMIF_HD_MODE, - .hd_align_reg = AFE_MEMIF_HDALIGN, - .hd_shift = HDMI_HD_SFT, - .hd_align_mshift = HDMI_HD_ALIGN_SFT, - .agent_disable_reg = -1, - .agent_disable_shift = -1, - .msb_reg = -1, - .msb_shift = -1, - }, + MT8183_MEMIF(DL1, AFE_DAC_CON1, AFE_DAC_CON1), + MT8183_MEMIF(DL2, AFE_DAC_CON1, AFE_DAC_CON1), + MT8183_MEMIF(DL3, AFE_DAC_CON2, AFE_DAC_CON1), + MT8183_MEMIF(VUL2, AFE_DAC_CON2, AFE_DAC_CON2), + MT8183_MEMIF(AWB, AFE_DAC_CON1, AFE_DAC_CON1), + MT8183_MEMIF(AWB2, AFE_DAC_CON2, AFE_DAC_CON2), + MT8183_MEMIF(VUL12, AFE_DAC_CON0, AFE_DAC_CON0), + MT8183_MEMIF(MOD_DAI, AFE_DAC_CON1, -1), + /* enable control in tdm for sync start */ + MT8183_MEMIF_BASE(HDMI, -1, -1, -1), }; +#define MT8183_AFE_IRQ_BASE(_id, _fs_reg, _fs_shift, _fs_maskbit) \ + [MT8183_IRQ_##_id] = { \ + .id = MT8183_IRQ_##_id, \ + .irq_cnt_reg = AFE_IRQ_MCU_CNT##_id, \ + .irq_cnt_shift = 0, \ + .irq_cnt_maskbit = 0x3ffff, \ + .irq_fs_reg = _fs_reg, \ + .irq_fs_shift = _fs_shift, \ + .irq_fs_maskbit = _fs_maskbit, \ + .irq_en_reg = AFE_IRQ_MCU_CON0, \ + .irq_en_shift = IRQ##_id##_MCU_ON_SFT, \ + .irq_clr_reg = AFE_IRQ_MCU_CLR, \ + .irq_clr_shift = IRQ##_id##_MCU_CLR_SFT, \ + } + +#define MT8183_AFE_IRQ(_id) \ + MT8183_AFE_IRQ_BASE(_id, AFE_IRQ_MCU_CON1 + _id / 8 * 4, \ + IRQ##_id##_MCU_MODE_SFT, \ + IRQ##_id##_MCU_MODE_MASK) + +#define MT8183_AFE_IRQ_NOFS(_id) MT8183_AFE_IRQ_BASE(_id, -1, -1, -1) + static const struct mtk_base_irq_data irq_data[MT8183_IRQ_NUM] = { - [MT8183_IRQ_0] = { - .id = MT8183_IRQ_0, - .irq_cnt_reg = AFE_IRQ_MCU_CNT0, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ0_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ0_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ0_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ0_MCU_CLR_SFT, - }, - [MT8183_IRQ_1] = { - .id = MT8183_IRQ_1, - .irq_cnt_reg = AFE_IRQ_MCU_CNT1, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ1_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ1_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ1_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ1_MCU_CLR_SFT, - }, - [MT8183_IRQ_2] = { - .id = MT8183_IRQ_2, - .irq_cnt_reg = AFE_IRQ_MCU_CNT2, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ2_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ2_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ2_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ2_MCU_CLR_SFT, - }, - [MT8183_IRQ_3] = { - .id = MT8183_IRQ_3, - .irq_cnt_reg = AFE_IRQ_MCU_CNT3, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ3_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ3_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ3_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ3_MCU_CLR_SFT, - }, - [MT8183_IRQ_4] = { - .id = MT8183_IRQ_4, - .irq_cnt_reg = AFE_IRQ_MCU_CNT4, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ4_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ4_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ4_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ4_MCU_CLR_SFT, - }, - [MT8183_IRQ_5] = { - .id = MT8183_IRQ_5, - .irq_cnt_reg = AFE_IRQ_MCU_CNT5, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ5_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ5_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ5_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ5_MCU_CLR_SFT, - }, - [MT8183_IRQ_6] = { - .id = MT8183_IRQ_6, - .irq_cnt_reg = AFE_IRQ_MCU_CNT6, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ6_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ6_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ6_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ6_MCU_CLR_SFT, - }, - [MT8183_IRQ_7] = { - .id = MT8183_IRQ_7, - .irq_cnt_reg = AFE_IRQ_MCU_CNT7, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON1, - .irq_fs_shift = IRQ7_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ7_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ7_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ7_MCU_CLR_SFT, - }, - [MT8183_IRQ_8] = { - .id = MT8183_IRQ_8, - .irq_cnt_reg = AFE_IRQ_MCU_CNT8, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = -1, - .irq_fs_shift = -1, - .irq_fs_maskbit = -1, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ8_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ8_MCU_CLR_SFT, - }, - [MT8183_IRQ_11] = { - .id = MT8183_IRQ_11, - .irq_cnt_reg = AFE_IRQ_MCU_CNT11, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON2, - .irq_fs_shift = IRQ11_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ11_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ11_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ11_MCU_CLR_SFT, - }, - [MT8183_IRQ_12] = { - .id = MT8183_IRQ_12, - .irq_cnt_reg = AFE_IRQ_MCU_CNT12, - .irq_cnt_shift = 0, - .irq_cnt_maskbit = 0x3ffff, - .irq_fs_reg = AFE_IRQ_MCU_CON2, - .irq_fs_shift = IRQ12_MCU_MODE_SFT, - .irq_fs_maskbit = IRQ12_MCU_MODE_MASK, - .irq_en_reg = AFE_IRQ_MCU_CON0, - .irq_en_shift = IRQ12_MCU_ON_SFT, - .irq_clr_reg = AFE_IRQ_MCU_CLR, - .irq_clr_shift = IRQ12_MCU_CLR_SFT, - }, + MT8183_AFE_IRQ(0), + MT8183_AFE_IRQ(1), + MT8183_AFE_IRQ(2), + MT8183_AFE_IRQ(3), + MT8183_AFE_IRQ(4), + MT8183_AFE_IRQ(5), + MT8183_AFE_IRQ(6), + MT8183_AFE_IRQ(7), + MT8183_AFE_IRQ_NOFS(8), + MT8183_AFE_IRQ(11), + MT8183_AFE_IRQ(12), }; static bool mt8183_is_volatile_reg(struct device *dev, unsigned int reg) @@ -767,86 +522,46 @@ static bool mt8183_is_volatile_reg(struct device *dev, unsigned int reg) /* these auto-gen reg has read-only bit, so put it as volatile */ /* volatile reg cannot be cached, so cannot be set when power off */ switch (reg) { - case AUDIO_TOP_CON0: /* reg bit controlled by CCF */ - case AUDIO_TOP_CON1: /* reg bit controlled by CCF */ + case AUDIO_TOP_CON0 ... AUDIO_TOP_CON1: /* reg bit controlled by CCF */ case AUDIO_TOP_CON3: - case AFE_DL1_CUR: - case AFE_DL1_END: - case AFE_DL2_CUR: - case AFE_DL2_END: - case AFE_AWB_END: - case AFE_AWB_CUR: - case AFE_VUL_END: - case AFE_VUL_CUR: - case AFE_MEMIF_MON0: - case AFE_MEMIF_MON1: - case AFE_MEMIF_MON2: - case AFE_MEMIF_MON3: - case AFE_MEMIF_MON4: - case AFE_MEMIF_MON5: - case AFE_MEMIF_MON6: - case AFE_MEMIF_MON7: - case AFE_MEMIF_MON8: - case AFE_MEMIF_MON9: - case AFE_ADDA_SRC_DEBUG_MON0: - case AFE_ADDA_SRC_DEBUG_MON1: - case AFE_ADDA_UL_SRC_MON0: - case AFE_ADDA_UL_SRC_MON1: + case AFE_DL1_CUR ... AFE_DL1_END: + case AFE_DL2_CUR ... AFE_DL2_END: + case AFE_AWB_END ... AFE_AWB_CUR: + case AFE_VUL_END ... AFE_VUL_CUR: + case AFE_MEMIF_MON0 ... AFE_MEMIF_MON9: + case AFE_ADDA_SRC_DEBUG_MON0 ... AFE_ADDA_SRC_DEBUG_MON1: + case AFE_ADDA_UL_SRC_MON0 ... AFE_ADDA_UL_SRC_MON1: case AFE_SIDETONE_MON: - case AFE_SIDETONE_CON0: - case AFE_SIDETONE_COEFF: + case AFE_SIDETONE_CON0 ... AFE_SIDETONE_COEFF: case AFE_BUS_MON0: - case AFE_MRGIF_MON0: - case AFE_MRGIF_MON1: - case AFE_MRGIF_MON2: - case AFE_I2S_MON: + case AFE_MRGIF_MON0 ... AFE_I2S_MON: case AFE_DAC_MON: - case AFE_VUL2_END: - case AFE_VUL2_CUR: - case AFE_IRQ0_MCU_CNT_MON: - case AFE_IRQ6_MCU_CNT_MON: - case AFE_MOD_DAI_END: - case AFE_MOD_DAI_CUR: - case AFE_VUL_D2_END: - case AFE_VUL_D2_CUR: - case AFE_DL3_CUR: - case AFE_DL3_END: + case AFE_VUL2_END ... AFE_VUL2_CUR: + case AFE_IRQ0_MCU_CNT_MON ... AFE_IRQ6_MCU_CNT_MON: + case AFE_MOD_DAI_END ... AFE_MOD_DAI_CUR: + case AFE_VUL_D2_END ... AFE_VUL_D2_CUR: + case AFE_DL3_CUR ... AFE_DL3_END: case AFE_HDMI_OUT_CON0: - case AFE_HDMI_OUT_CUR: - case AFE_HDMI_OUT_END: - case AFE_IRQ3_MCU_CNT_MON: - case AFE_IRQ4_MCU_CNT_MON: - case AFE_IRQ_MCU_STATUS: - case AFE_IRQ_MCU_CLR: + case AFE_HDMI_OUT_CUR ... AFE_HDMI_OUT_END: + case AFE_IRQ3_MCU_CNT_MON... AFE_IRQ4_MCU_CNT_MON: + case AFE_IRQ_MCU_STATUS ... AFE_IRQ_MCU_CLR: case AFE_IRQ_MCU_MON2: - case AFE_IRQ1_MCU_CNT_MON: - case AFE_IRQ2_MCU_CNT_MON: - case AFE_IRQ1_MCU_EN_CNT_MON: - case AFE_IRQ5_MCU_CNT_MON: + case AFE_IRQ1_MCU_CNT_MON ... AFE_IRQ5_MCU_CNT_MON: case AFE_IRQ7_MCU_CNT_MON: case AFE_GAIN1_CUR: case AFE_GAIN2_CUR: case AFE_SRAM_DELSEL_CON0: - case AFE_SRAM_DELSEL_CON2: - case AFE_SRAM_DELSEL_CON3: - case AFE_ASRC_2CH_CON12: - case AFE_ASRC_2CH_CON13: + case AFE_SRAM_DELSEL_CON2 ... AFE_SRAM_DELSEL_CON3: + case AFE_ASRC_2CH_CON12 ... AFE_ASRC_2CH_CON13: case PCM_INTF_CON2: - case FPGA_CFG0: - case FPGA_CFG1: - case FPGA_CFG2: - case FPGA_CFG3: - case AUDIO_TOP_DBG_MON0: - case AUDIO_TOP_DBG_MON1: - case AFE_IRQ8_MCU_CNT_MON: - case AFE_IRQ11_MCU_CNT_MON: - case AFE_IRQ12_MCU_CNT_MON: + case FPGA_CFG0 ... FPGA_CFG1: + case FPGA_CFG2 ... FPGA_CFG3: + case AUDIO_TOP_DBG_MON0 ... AUDIO_TOP_DBG_MON1: + case AFE_IRQ8_MCU_CNT_MON ... AFE_IRQ12_MCU_CNT_MON: case AFE_CBIP_MON0: - case AFE_CBIP_SLV_MUX_MON0: - case AFE_CBIP_SLV_DECODER_MON0: + case AFE_CBIP_SLV_MUX_MON0 ... AFE_CBIP_SLV_DECODER_MON0: case AFE_ADDA6_SRC_DEBUG_MON0: - case AFE_ADD6A_UL_SRC_MON0: - case AFE_ADDA6_UL_SRC_MON1: + case AFE_ADD6A_UL_SRC_MON0... AFE_ADDA6_UL_SRC_MON1: case AFE_DL1_CUR_MSB: case AFE_DL2_CUR_MSB: case AFE_AWB_CUR_MSB: @@ -856,55 +571,23 @@ static bool mt8183_is_volatile_reg(struct device *dev, unsigned int reg) case AFE_VUL_D2_CUR_MSB: case AFE_DL3_CUR_MSB: case AFE_HDMI_OUT_CUR_MSB: - case AFE_AWB2_END: - case AFE_AWB2_CUR: + case AFE_AWB2_END ... AFE_AWB2_CUR: case AFE_AWB2_CUR_MSB: - case AFE_ADDA_DL_SDM_FIFO_MON: - case AFE_ADDA_DL_SRC_LCH_MON: - case AFE_ADDA_DL_SRC_RCH_MON: - case AFE_ADDA_DL_SDM_OUT_MON: - case AFE_CONNSYS_I2S_MON: - case AFE_ASRC_2CH_CON0: - case AFE_ASRC_2CH_CON2: - case AFE_ASRC_2CH_CON3: - case AFE_ASRC_2CH_CON4: - case AFE_ASRC_2CH_CON5: - case AFE_ASRC_2CH_CON7: - case AFE_ASRC_2CH_CON8: - case AFE_MEMIF_MON12: - case AFE_MEMIF_MON13: - case AFE_MEMIF_MON14: - case AFE_MEMIF_MON15: - case AFE_MEMIF_MON16: - case AFE_MEMIF_MON17: - case AFE_MEMIF_MON18: - case AFE_MEMIF_MON19: - case AFE_MEMIF_MON20: - case AFE_MEMIF_MON21: - case AFE_MEMIF_MON22: - case AFE_MEMIF_MON23: - case AFE_MEMIF_MON24: - case AFE_ADDA_MTKAIF_MON0: - case AFE_ADDA_MTKAIF_MON1: + case AFE_ADDA_DL_SDM_FIFO_MON ... AFE_ADDA_DL_SDM_OUT_MON: + case AFE_CONNSYS_I2S_MON ... AFE_ASRC_2CH_CON0: + case AFE_ASRC_2CH_CON2 ... AFE_ASRC_2CH_CON5: + case AFE_ASRC_2CH_CON7 ... AFE_ASRC_2CH_CON8: + case AFE_MEMIF_MON12 ... AFE_MEMIF_MON24: + case AFE_ADDA_MTKAIF_MON0 ... AFE_ADDA_MTKAIF_MON1: case AFE_AUD_PAD_TOP: case AFE_GENERAL1_ASRC_2CH_CON0: - case AFE_GENERAL1_ASRC_2CH_CON2: - case AFE_GENERAL1_ASRC_2CH_CON3: - case AFE_GENERAL1_ASRC_2CH_CON4: - case AFE_GENERAL1_ASRC_2CH_CON5: - case AFE_GENERAL1_ASRC_2CH_CON7: - case AFE_GENERAL1_ASRC_2CH_CON8: - case AFE_GENERAL1_ASRC_2CH_CON12: - case AFE_GENERAL1_ASRC_2CH_CON13: + case AFE_GENERAL1_ASRC_2CH_CON2 ... AFE_GENERAL1_ASRC_2CH_CON5: + case AFE_GENERAL1_ASRC_2CH_CON7 ... AFE_GENERAL1_ASRC_2CH_CON8: + case AFE_GENERAL1_ASRC_2CH_CON12 ... AFE_GENERAL1_ASRC_2CH_CON13: case AFE_GENERAL2_ASRC_2CH_CON0: - case AFE_GENERAL2_ASRC_2CH_CON2: - case AFE_GENERAL2_ASRC_2CH_CON3: - case AFE_GENERAL2_ASRC_2CH_CON4: - case AFE_GENERAL2_ASRC_2CH_CON5: - case AFE_GENERAL2_ASRC_2CH_CON7: - case AFE_GENERAL2_ASRC_2CH_CON8: - case AFE_GENERAL2_ASRC_2CH_CON12: - case AFE_GENERAL2_ASRC_2CH_CON13: + case AFE_GENERAL2_ASRC_2CH_CON2 ... AFE_GENERAL2_ASRC_2CH_CON5: + case AFE_GENERAL2_ASRC_2CH_CON7 ... AFE_GENERAL2_ASRC_2CH_CON8: + case AFE_GENERAL2_ASRC_2CH_CON12 ... AFE_GENERAL2_ASRC_2CH_CON13: return true; default: return false; @@ -1042,18 +725,6 @@ skip_regmap: return 0; } -static int mt8183_afe_component_probe(struct snd_soc_component *component) -{ - return mtk_afe_add_sub_dai_control(component); -} - -static const struct snd_soc_component_driver mt8183_afe_component = { - .name = AFE_PCM_NAME, - .probe = mt8183_afe_component_probe, - .pointer = mtk_afe_pcm_pointer, - .pcm_construct = mtk_afe_pcm_new, -}; - static int mt8183_dai_memif_register(struct mtk_base_afe *afe) { struct mtk_base_afe_dai *dai; @@ -1232,7 +903,7 @@ static int mt8183_afe_pcm_dev_probe(struct platform_device *pdev) /* register component */ ret = devm_snd_soc_register_component(&pdev->dev, - &mt8183_afe_component, + &mtk_afe_pcm_platform, NULL, 0); if (ret) { dev_warn(dev, "err_platform\n"); @@ -1269,18 +940,18 @@ static const struct of_device_id mt8183_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt8183_afe_pcm_dt_match); static const struct dev_pm_ops mt8183_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt8183_afe_runtime_suspend, - mt8183_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt8183_afe_runtime_suspend, + mt8183_afe_runtime_resume, NULL) }; static struct platform_driver mt8183_afe_pcm_driver = { .driver = { .name = "mt8183-audio", .of_match_table = mt8183_afe_pcm_dt_match, - .pm = &mt8183_afe_pm_ops, + .pm = pm_ptr(&mt8183_afe_pm_ops), }, .probe = mt8183_afe_pcm_dev_probe, - .remove_new = mt8183_afe_pcm_dev_remove, + .remove = mt8183_afe_pcm_dev_remove, }; module_platform_driver(mt8183_afe_pcm_driver); diff --git a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c index acaf81fd6c9b..3388e076ccc9 100644 --- a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c +++ b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c @@ -31,7 +31,7 @@ struct mt8183_da7219_max98357_priv { static struct snd_soc_jack_pin mt8183_da7219_max98357_jack_pins[] = { { - .pin = "Headphone", + .pin = "Headphones", .mask = SND_JACK_HEADPHONE, }, { @@ -425,7 +425,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8183_da7219_max98357_ops, SND_SOC_DAILINK_REG(playback1), }, @@ -435,7 +435,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8183_da7219_max98357_bt_sco_ops, SND_SOC_DAILINK_REG(playback2), }, @@ -445,7 +445,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback3), }, { @@ -454,7 +454,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8183_da7219_max98357_bt_sco_ops, SND_SOC_DAILINK_REG(capture1), }, @@ -464,7 +464,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture2), }, { @@ -473,7 +473,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8183_da7219_max98357_ops, SND_SOC_DAILINK_REG(capture3), }, @@ -483,7 +483,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_mono), }, { @@ -492,38 +492,32 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback_hdmi), }, /* BE */ { .name = "Primary Codec", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(primary_codec), }, { .name = "PCM 1", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm1), }, { .name = "PCM 2", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm2), }, { .name = "I2S0", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_i2s_ops, @@ -532,7 +526,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { { .name = "I2S1", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_i2s_ops, @@ -541,7 +535,7 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { { .name = "I2S2", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_da7219_i2s_ops, @@ -551,13 +545,13 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { { .name = "I2S3", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, }, { .name = "I2S5", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_i2s_ops, @@ -569,8 +563,8 @@ static struct snd_soc_dai_link mt8183_da7219_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_IB_IF | - SND_SOC_DAIFMT_CBM_CFM, - .dpcm_playback = 1, + SND_SOC_DAIFMT_CBP_CFP, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ignore = 1, @@ -626,7 +620,7 @@ static struct snd_soc_codec_conf mt6358_codec_conf[] = { }; static const struct snd_kcontrol_new mt8183_da7219_max98357_snd_controls[] = { - SOC_DAPM_PIN_SWITCH("Headphone"), + SOC_DAPM_PIN_SWITCH("Headphones"), SOC_DAPM_PIN_SWITCH("Headset Mic"), SOC_DAPM_PIN_SWITCH("Speakers"), SOC_DAPM_PIN_SWITCH("Line Out"), @@ -634,7 +628,7 @@ static const struct snd_kcontrol_new mt8183_da7219_max98357_snd_controls[] = { static const struct snd_soc_dapm_widget mt8183_da7219_max98357_dapm_widgets[] = { - SND_SOC_DAPM_HP("Headphone", NULL), + SND_SOC_DAPM_HP("Headphones", NULL), SND_SOC_DAPM_MIC("Headset Mic", NULL), SND_SOC_DAPM_SPK("Speakers", NULL), SND_SOC_DAPM_SPK("Line Out", NULL), @@ -680,7 +674,7 @@ static struct snd_soc_codec_conf mt8183_da7219_rt1015_codec_conf[] = { }; static const struct snd_kcontrol_new mt8183_da7219_rt1015_snd_controls[] = { - SOC_DAPM_PIN_SWITCH("Headphone"), + SOC_DAPM_PIN_SWITCH("Headphones"), SOC_DAPM_PIN_SWITCH("Headset Mic"), SOC_DAPM_PIN_SWITCH("Left Spk"), SOC_DAPM_PIN_SWITCH("Right Spk"), @@ -689,7 +683,7 @@ static const struct snd_kcontrol_new mt8183_da7219_rt1015_snd_controls[] = { static const struct snd_soc_dapm_widget mt8183_da7219_rt1015_dapm_widgets[] = { - SND_SOC_DAPM_HP("Headphone", NULL), + SND_SOC_DAPM_HP("Headphones", NULL), SND_SOC_DAPM_MIC("Headset Mic", NULL), SND_SOC_DAPM_SPK("Left Spk", NULL), SND_SOC_DAPM_SPK("Right Spk", NULL), diff --git a/sound/soc/mediatek/mt8183/mt8183-dai-adda.c b/sound/soc/mediatek/mt8183/mt8183-dai-adda.c index 5b8a274419ed..be69bcea2a78 100644 --- a/sound/soc/mediatek/mt8183/mt8183-dai-adda.c +++ b/sound/soc/mediatek/mt8183/mt8183-dai-adda.c @@ -10,6 +10,7 @@ #include "mt8183-afe-common.h" #include "mt8183-interconnection.h" #include "mt8183-reg.h" +#include "../common/mtk-dai-adda-common.h" enum { AUDIO_SDM_LEVEL_MUTE = 0, @@ -18,91 +19,6 @@ enum { /* you need to change formula of hp impedance and dc trim too */ }; -enum { - DELAY_DATA_MISO1 = 0, - DELAY_DATA_MISO2, -}; - -enum { - MTK_AFE_ADDA_DL_RATE_8K = 0, - MTK_AFE_ADDA_DL_RATE_11K = 1, - MTK_AFE_ADDA_DL_RATE_12K = 2, - MTK_AFE_ADDA_DL_RATE_16K = 3, - MTK_AFE_ADDA_DL_RATE_22K = 4, - MTK_AFE_ADDA_DL_RATE_24K = 5, - MTK_AFE_ADDA_DL_RATE_32K = 6, - MTK_AFE_ADDA_DL_RATE_44K = 7, - MTK_AFE_ADDA_DL_RATE_48K = 8, - MTK_AFE_ADDA_DL_RATE_96K = 9, - MTK_AFE_ADDA_DL_RATE_192K = 10, -}; - -enum { - MTK_AFE_ADDA_UL_RATE_8K = 0, - MTK_AFE_ADDA_UL_RATE_16K = 1, - MTK_AFE_ADDA_UL_RATE_32K = 2, - MTK_AFE_ADDA_UL_RATE_48K = 3, - MTK_AFE_ADDA_UL_RATE_96K = 4, - MTK_AFE_ADDA_UL_RATE_192K = 5, - MTK_AFE_ADDA_UL_RATE_48K_HD = 6, -}; - -static unsigned int adda_dl_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_DL_RATE_8K; - case 11025: - return MTK_AFE_ADDA_DL_RATE_11K; - case 12000: - return MTK_AFE_ADDA_DL_RATE_12K; - case 16000: - return MTK_AFE_ADDA_DL_RATE_16K; - case 22050: - return MTK_AFE_ADDA_DL_RATE_22K; - case 24000: - return MTK_AFE_ADDA_DL_RATE_24K; - case 32000: - return MTK_AFE_ADDA_DL_RATE_32K; - case 44100: - return MTK_AFE_ADDA_DL_RATE_44K; - case 48000: - return MTK_AFE_ADDA_DL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_DL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_DL_RATE_192K; - default: - dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_DL_RATE_48K; - } -} - -static unsigned int adda_ul_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_UL_RATE_8K; - case 16000: - return MTK_AFE_ADDA_UL_RATE_16K; - case 32000: - return MTK_AFE_ADDA_UL_RATE_32K; - case 48000: - return MTK_AFE_ADDA_UL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_UL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_UL_RATE_192K; - default: - dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_UL_RATE_48K; - } -} - /* dai component */ static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN3, I_DL1_CH1, 1, 0), @@ -369,7 +285,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, regmap_write(afe->regmap, AFE_ADDA_PREDIS_CON1, 0); /* set sampling rate */ - dl_src2_con0 = adda_dl_rate_transform(afe, rate) << 28; + dl_src2_con0 = mtk_adda_dl_rate_transform(afe, rate) << 28; /* set output mode */ switch (rate) { @@ -420,7 +336,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, 0x1 << 0, 0x0 << 0); - voice_mode = adda_ul_rate_transform(afe, rate); + voice_mode = mtk_adda_ul_rate_transform(afe, rate); ul_src_con0 |= (voice_mode << 17) & (0x7 << 17); diff --git a/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c b/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c index 65e46ebe7be6..5cf5592336d3 100644 --- a/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c +++ b/sound/soc/mediatek/mt8183/mt8183-dai-i2s.c @@ -1036,7 +1036,6 @@ static int mt8183_dai_i2s_set_priv(struct mtk_base_afe *afe) int mt8183_dai_i2s_register(struct mtk_base_afe *afe) { struct mtk_base_afe_dai *dai; - int ret; dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); if (!dai) @@ -1055,9 +1054,5 @@ int mt8183_dai_i2s_register(struct mtk_base_afe *afe) dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_i2s_routes); /* set all dai i2s private data */ - ret = mt8183_dai_i2s_set_priv(afe); - if (ret) - return ret; - - return 0; + return mt8183_dai_i2s_set_priv(afe); } diff --git a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c index bb6df056a878..497a9043be7b 100644 --- a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c +++ b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c @@ -430,7 +430,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8183_mt6358_ops, SND_SOC_DAILINK_REG(playback1), }, @@ -440,7 +440,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8183_mt6358_ts3a227_max98357_bt_sco_ops, SND_SOC_DAILINK_REG(playback2), }, @@ -450,7 +450,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback3), }, { @@ -459,7 +459,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8183_mt6358_ts3a227_max98357_bt_sco_ops, SND_SOC_DAILINK_REG(capture1), }, @@ -469,7 +469,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture2), }, { @@ -478,7 +478,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8183_mt6358_ops, SND_SOC_DAILINK_REG(capture3), }, @@ -488,7 +488,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_mono), }, { @@ -497,7 +497,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback_hdmi), }, { @@ -513,31 +513,25 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { { .name = "Primary Codec", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(primary_codec), }, { .name = "PCM 1", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm1), }, { .name = "PCM 2", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm2), }, { .name = "I2S0", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .ops = &mt8183_mt6358_i2s_ops, SND_SOC_DAILINK_REG(i2s0), @@ -545,7 +539,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { { .name = "I2S1", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_i2s_ops, @@ -554,7 +548,7 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { { .name = "I2S2", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_i2s_ops, @@ -564,13 +558,13 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { { .name = "I2S3", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, }, { .name = "I2S5", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .ops = &mt8183_mt6358_i2s_ops, .init = &mt8183_bt_init, @@ -581,8 +575,8 @@ static struct snd_soc_dai_link mt8183_mt6358_ts3a227_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_IB_IF | - SND_SOC_DAIFMT_CBM_CFM, - .dpcm_playback = 1, + SND_SOC_DAIFMT_CBP_CFP, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8183_i2s_hw_params_fixup, .ops = &mt8183_mt6358_tdm_ops, @@ -789,7 +783,7 @@ mt8183_mt6358_ts3a227_max98357_dev_probe(struct platform_device *pdev) strcmp(dai_link->name, "I2S3") == 0) dai_link->dai_fmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBM_CFM; + SND_SOC_DAIFMT_CBP_CFP; } if (hdmi_codec && strcmp(dai_link->name, "TDM") == 0) { diff --git a/sound/soc/mediatek/mt8186/Makefile b/sound/soc/mediatek/mt8186/Makefile index 49b0026628a0..ab3f5b763df8 100644 --- a/sound/soc/mediatek/mt8186/Makefile +++ b/sound/soc/mediatek/mt8186/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt8186-afe-objs := \ +snd-soc-mt8186-afe-y := \ mt8186-afe-pcm.o \ mt8186-audsys-clk.o \ mt8186-afe-clk.o \ @@ -18,5 +18,4 @@ snd-soc-mt8186-afe-objs := \ mt8186-mt6366-common.o obj-$(CONFIG_SND_SOC_MT8186) += snd-soc-mt8186-afe.o -obj-$(CONFIG_SND_SOC_MT8186_MT6366_DA7219_MAX98357) += mt8186-mt6366-da7219-max98357.o -obj-$(CONFIG_SND_SOC_MT8186_MT6366_RT1019_RT5682S) += mt8186-mt6366-rt1019-rt5682s.o +obj-$(CONFIG_SND_SOC_MT8186_MT6366) += mt8186-mt6366.o diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-clk.c b/sound/soc/mediatek/mt8186/mt8186-afe-clk.c index 70ec101890d3..daaca36a2d08 100644 --- a/sound/soc/mediatek/mt8186/mt8186-afe-clk.c +++ b/sound/soc/mediatek/mt8186/mt8186-afe-clk.c @@ -329,61 +329,6 @@ void mt8186_afe_disable_clock(struct mtk_base_afe *afe) clk_disable_unprepare(afe_priv->clk[CLK_INFRA_SYS_AUDIO]); } -int mt8186_afe_suspend_clock(struct mtk_base_afe *afe) -{ - struct mt8186_afe_private *afe_priv = afe->platform_priv; - int ret; - - /* set audio int bus to 26M */ - ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); - if (ret) { - dev_info(afe->dev, "%s clk_prepare_enable %s fail %d\n", - __func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret); - goto clk_mux_audio_intbus_err; - } - ret = mt8186_set_audio_int_bus_parent(afe, CLK_CLK26M); - if (ret) - goto clk_mux_audio_intbus_parent_err; - - clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); - - return 0; - -clk_mux_audio_intbus_parent_err: - mt8186_set_audio_int_bus_parent(afe, CLK_TOP_MAINPLL_D2_D4); -clk_mux_audio_intbus_err: - clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); - return ret; -} - -int mt8186_afe_resume_clock(struct mtk_base_afe *afe) -{ - struct mt8186_afe_private *afe_priv = afe->platform_priv; - int ret; - - /* set audio int bus to normal working clock */ - ret = clk_prepare_enable(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); - if (ret) { - dev_info(afe->dev, "%s clk_prepare_enable %s fail %d\n", - __func__, aud_clks[CLK_MUX_AUDIOINTBUS], ret); - goto clk_mux_audio_intbus_err; - } - ret = mt8186_set_audio_int_bus_parent(afe, - CLK_TOP_MAINPLL_D2_D4); - if (ret) - goto clk_mux_audio_intbus_parent_err; - - clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); - - return 0; - -clk_mux_audio_intbus_parent_err: - mt8186_set_audio_int_bus_parent(afe, CLK_CLK26M); -clk_mux_audio_intbus_err: - clk_disable_unprepare(afe_priv->clk[CLK_MUX_AUDIOINTBUS]); - return ret; -} - int mt8186_apll1_enable(struct mtk_base_afe *afe) { struct mt8186_afe_private *afe_priv = afe->platform_priv; diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-clk.h b/sound/soc/mediatek/mt8186/mt8186-afe-clk.h index a9d59e506d9a..e524833ce780 100644 --- a/sound/soc/mediatek/mt8186/mt8186-afe-clk.h +++ b/sound/soc/mediatek/mt8186/mt8186-afe-clk.h @@ -85,8 +85,6 @@ int mt8186_afe_enable_cgs(struct mtk_base_afe *afe); void mt8186_afe_disable_cgs(struct mtk_base_afe *afe); int mt8186_afe_enable_clock(struct mtk_base_afe *afe); void mt8186_afe_disable_clock(struct mtk_base_afe *afe); -int mt8186_afe_suspend_clock(struct mtk_base_afe *afe); -int mt8186_afe_resume_clock(struct mtk_base_afe *afe); int mt8186_apll1_enable(struct mtk_base_afe *afe); void mt8186_apll1_disable(struct mtk_base_afe *afe); diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c b/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c index bfcfc68ac64d..db7c93401bee 100644 --- a/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c +++ b/sound/soc/mediatek/mt8186/mt8186-afe-pcm.c @@ -40,7 +40,7 @@ static const struct snd_pcm_hardware mt8186_afe_hardware = { static int mt8186_fe_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); struct snd_pcm_runtime *runtime = substream->runtime; int id = snd_soc_rtd_to_cpu(rtd, 0)->id; @@ -82,7 +82,7 @@ static int mt8186_fe_startup(struct snd_pcm_substream *substream, static void mt8186_fe_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); struct mt8186_afe_private *afe_priv = afe->platform_priv; int id = snd_soc_rtd_to_cpu(rtd, 0)->id; @@ -104,7 +104,7 @@ static int mt8186_fe_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); int id = snd_soc_rtd_to_cpu(rtd, 0)->id; unsigned int channels = params_channels(params); @@ -153,7 +153,7 @@ static int mt8186_fe_hw_free(struct snd_pcm_substream *substream, static int mt8186_fe_trigger(struct snd_pcm_substream *substream, int cmd, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_pcm_runtime * const runtime = substream->runtime; struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); struct mt8186_afe_private *afe_priv = afe->platform_priv; @@ -252,7 +252,7 @@ static int mt8186_fe_trigger(struct snd_pcm_substream *substream, int cmd, static int mt8186_memif_fs(struct snd_pcm_substream *substream, unsigned int rate) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); @@ -269,7 +269,7 @@ static int mt8186_get_dai_fs(struct mtk_base_afe *afe, static int mt8186_irq_fs(struct snd_pcm_substream *substream, unsigned int rate) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); @@ -290,7 +290,7 @@ static int mt8186_get_memif_pbuf_size(struct snd_pcm_substream *substream) static int mt8186_fe_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_pcm_runtime * const runtime = substream->runtime; struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); int id = snd_soc_rtd_to_cpu(rtd, 0)->id; @@ -2978,15 +2978,15 @@ static const struct of_device_id mt8186_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt8186_afe_pcm_dt_match); static const struct dev_pm_ops mt8186_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt8186_afe_runtime_suspend, - mt8186_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt8186_afe_runtime_suspend, + mt8186_afe_runtime_resume, NULL) }; static struct platform_driver mt8186_afe_pcm_driver = { .driver = { .name = "mt8186-audio", .of_match_table = mt8186_afe_pcm_dt_match, - .pm = &mt8186_afe_pm_ops, + .pm = pm_ptr(&mt8186_afe_pm_ops), }, .probe = mt8186_afe_pcm_dev_probe, }; diff --git a/sound/soc/mediatek/mt8186/mt8186-dai-adda.c b/sound/soc/mediatek/mt8186/mt8186-dai-adda.c index ad6d4b5cf697..dbd157d1a1ea 100644 --- a/sound/soc/mediatek/mt8186/mt8186-dai-adda.c +++ b/sound/soc/mediatek/mt8186/mt8186-dai-adda.c @@ -11,6 +11,7 @@ #include "mt8186-afe-common.h" #include "mt8186-afe-gpio.h" #include "mt8186-interconnection.h" +#include "../common/mtk-dai-adda-common.h" enum { UL_IIR_SW = 0, @@ -33,35 +34,6 @@ enum { AUDIO_SDM_3RD, }; -enum { - DELAY_DATA_MISO1 = 0, - DELAY_DATA_MISO2, -}; - -enum { - MTK_AFE_ADDA_DL_RATE_8K = 0, - MTK_AFE_ADDA_DL_RATE_11K = 1, - MTK_AFE_ADDA_DL_RATE_12K = 2, - MTK_AFE_ADDA_DL_RATE_16K = 3, - MTK_AFE_ADDA_DL_RATE_22K = 4, - MTK_AFE_ADDA_DL_RATE_24K = 5, - MTK_AFE_ADDA_DL_RATE_32K = 6, - MTK_AFE_ADDA_DL_RATE_44K = 7, - MTK_AFE_ADDA_DL_RATE_48K = 8, - MTK_AFE_ADDA_DL_RATE_96K = 9, - MTK_AFE_ADDA_DL_RATE_192K = 10, -}; - -enum { - MTK_AFE_ADDA_UL_RATE_8K = 0, - MTK_AFE_ADDA_UL_RATE_16K = 1, - MTK_AFE_ADDA_UL_RATE_32K = 2, - MTK_AFE_ADDA_UL_RATE_48K = 3, - MTK_AFE_ADDA_UL_RATE_96K = 4, - MTK_AFE_ADDA_UL_RATE_192K = 5, - MTK_AFE_ADDA_UL_RATE_48K_HD = 6, -}; - #define SDM_AUTO_RESET_THRESHOLD 0x190000 struct mtk_afe_adda_priv { @@ -83,64 +55,6 @@ static struct mtk_afe_adda_priv *get_adda_priv_by_name(struct mtk_base_afe *afe, return afe_priv->dai_priv[dai_id]; } -static unsigned int adda_dl_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_DL_RATE_8K; - case 11025: - return MTK_AFE_ADDA_DL_RATE_11K; - case 12000: - return MTK_AFE_ADDA_DL_RATE_12K; - case 16000: - return MTK_AFE_ADDA_DL_RATE_16K; - case 22050: - return MTK_AFE_ADDA_DL_RATE_22K; - case 24000: - return MTK_AFE_ADDA_DL_RATE_24K; - case 32000: - return MTK_AFE_ADDA_DL_RATE_32K; - case 44100: - return MTK_AFE_ADDA_DL_RATE_44K; - case 48000: - return MTK_AFE_ADDA_DL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_DL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_DL_RATE_192K; - default: - dev_dbg(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - } - - return MTK_AFE_ADDA_DL_RATE_48K; -} - -static unsigned int adda_ul_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_UL_RATE_8K; - case 16000: - return MTK_AFE_ADDA_UL_RATE_16K; - case 32000: - return MTK_AFE_ADDA_UL_RATE_32K; - case 48000: - return MTK_AFE_ADDA_UL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_UL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_UL_RATE_192K; - default: - dev_dbg(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - } - - return MTK_AFE_ADDA_UL_RATE_48K; -} - /* dai component */ static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1 Switch", AFE_CONN3, I_DL1_CH1, 1, 0), @@ -658,7 +572,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, adda_priv->dl_rate = rate; /* set sampling rate */ - dl_src2_con0 = adda_dl_rate_transform(afe, rate) << + dl_src2_con0 = mtk_adda_dl_rate_transform(afe, rate) << DL_2_INPUT_MODE_CTL_SFT; /* set output mode, UP_SAMPLING_RATE_X8 */ @@ -721,7 +635,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, } } else { unsigned int ul_src_con0 = 0; - unsigned int voice_mode = adda_ul_rate_transform(afe, rate); + unsigned int voice_mode = mtk_adda_ul_rate_transform(afe, rate); adda_priv->ul_rate = rate; ul_src_con0 |= (voice_mode << 17) & (0x7 << 17); diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c deleted file mode 100644 index d86dc45be30c..000000000000 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c +++ /dev/null @@ -1,1189 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// mt8186-mt6366-da7219-max98357.c -// -- MT8186-MT6366-DA7219-MAX98357 ALSA SoC machine driver -// -// Copyright (c) 2022 MediaTek Inc. -// Author: Jiaxin Yu <jiaxin.yu@mediatek.com> -// - -#include <linux/input.h> -#include <linux/module.h> -#include <linux/of.h> -#include <sound/jack.h> -#include <sound/pcm_params.h> -#include <sound/soc.h> - -#include "../../codecs/da7219.h" -#include "../../codecs/mt6358.h" -#include "../common/mtk-afe-platform-driver.h" -#include "../common/mtk-dsp-sof-common.h" -#include "../common/mtk-soc-card.h" -#include "mt8186-afe-common.h" -#include "mt8186-afe-clk.h" -#include "mt8186-afe-gpio.h" -#include "mt8186-mt6366-common.h" - -#define DA7219_CODEC_DAI "da7219-hifi" -#define DA7219_DEV_NAME "da7219.5-001a" - -#define SOF_DMA_DL1 "SOF_DMA_DL1" -#define SOF_DMA_DL2 "SOF_DMA_DL2" -#define SOF_DMA_UL1 "SOF_DMA_UL1" -#define SOF_DMA_UL2 "SOF_DMA_UL2" - -struct mt8186_mt6366_da7219_max98357_priv { - struct snd_soc_jack headset_jack, hdmi_jack; -}; - -/* Headset jack detection DAPM pins */ -static struct snd_soc_jack_pin mt8186_jack_pins[] = { - { - .pin = "Headphones", - .mask = SND_JACK_HEADPHONE, - }, - { - .pin = "Headset Mic", - .mask = SND_JACK_MICROPHONE, - }, - { - .pin = "Line Out", - .mask = SND_JACK_LINEOUT, - }, -}; - -static struct snd_soc_codec_conf mt8186_mt6366_da7219_max98357_codec_conf[] = { - { - .dlc = COMP_CODEC_CONF("mt6358-sound"), - .name_prefix = "Mt6366", - }, - { - .dlc = COMP_CODEC_CONF("bt-sco"), - .name_prefix = "Mt8186 bt", - }, - { - .dlc = COMP_CODEC_CONF("hdmi-audio-codec"), - .name_prefix = "Mt8186 hdmi", - }, -}; - -static int mt8186_da7219_init(struct snd_soc_pcm_runtime *rtd) -{ - struct snd_soc_component *cmpnt_afe = - snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); - struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); - struct mtk_soc_card_data *soc_card_data = - snd_soc_card_get_drvdata(rtd->card); - struct mt8186_mt6366_da7219_max98357_priv *priv = soc_card_data->mach_priv; - struct snd_soc_jack *jack = &priv->headset_jack; - struct snd_soc_component *cmpnt_codec = - snd_soc_rtd_to_codec(rtd, 0)->component; - int ret; - - ret = mt8186_dai_i2s_set_share(afe, "I2S1", "I2S0"); - if (ret) { - dev_err(rtd->dev, "Failed to set up shared clocks\n"); - return ret; - } - - /* Enable Headset and 4 Buttons Jack detection */ - ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack", - SND_JACK_HEADSET | SND_JACK_BTN_0 | - SND_JACK_BTN_1 | SND_JACK_BTN_2 | - SND_JACK_BTN_3 | SND_JACK_LINEOUT, - jack, mt8186_jack_pins, - ARRAY_SIZE(mt8186_jack_pins)); - if (ret) { - dev_err(rtd->dev, "Headset Jack creation failed: %d\n", ret); - return ret; - } - - snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); - snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP); - snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); - snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOICECOMMAND); - - snd_soc_component_set_jack(cmpnt_codec, &priv->headset_jack, NULL); - - return 0; -} - -static int mt8186_da7219_i2s_hw_params(struct snd_pcm_substream *substream, - struct snd_pcm_hw_params *params) -{ - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_soc_dai *codec_dai; - unsigned int rate = params_rate(params); - unsigned int mclk_fs_ratio = 256; - unsigned int mclk_fs = rate * mclk_fs_ratio; - unsigned int freq; - int ret, j; - - ret = snd_soc_dai_set_sysclk(snd_soc_rtd_to_cpu(rtd, 0), 0, - mclk_fs, SND_SOC_CLOCK_OUT); - if (ret < 0) { - dev_err(rtd->dev, "failed to set cpu dai sysclk: %d\n", ret); - return ret; - } - - for_each_rtd_codec_dais(rtd, j, codec_dai) { - if (!strcmp(codec_dai->component->name, DA7219_DEV_NAME)) { - ret = snd_soc_dai_set_sysclk(codec_dai, - DA7219_CLKSRC_MCLK, - mclk_fs, - SND_SOC_CLOCK_IN); - if (ret < 0) { - dev_err(rtd->dev, "failed to set sysclk: %d\n", - ret); - return ret; - } - - if ((rate % 8000) == 0) - freq = DA7219_PLL_FREQ_OUT_98304; - else - freq = DA7219_PLL_FREQ_OUT_90316; - - ret = snd_soc_dai_set_pll(codec_dai, 0, - DA7219_SYSCLK_PLL_SRM, - 0, freq); - if (ret) { - dev_err(rtd->dev, "failed to start PLL: %d\n", - ret); - return ret; - } - } - } - - return 0; -} - -static int mt8186_da7219_i2s_hw_free(struct snd_pcm_substream *substream) -{ - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_soc_dai *codec_dai; - int ret = 0, j; - - for_each_rtd_codec_dais(rtd, j, codec_dai) { - if (!strcmp(codec_dai->component->name, DA7219_DEV_NAME)) { - ret = snd_soc_dai_set_pll(codec_dai, - 0, DA7219_SYSCLK_MCLK, 0, 0); - if (ret < 0) { - dev_err(rtd->dev, "failed to stop PLL: %d\n", - ret); - return ret; - } - } - } - - return 0; -} - -static const struct snd_soc_ops mt8186_da7219_i2s_ops = { - .hw_params = mt8186_da7219_i2s_hw_params, - .hw_free = mt8186_da7219_i2s_hw_free, -}; - -static int mt8186_mt6366_da7219_max98357_hdmi_init(struct snd_soc_pcm_runtime *rtd) -{ - struct snd_soc_component *cmpnt_afe = - snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); - struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); - struct snd_soc_component *cmpnt_codec = - snd_soc_rtd_to_codec(rtd, 0)->component; - struct mtk_soc_card_data *soc_card_data = - snd_soc_card_get_drvdata(rtd->card); - struct mt8186_mt6366_da7219_max98357_priv *priv = soc_card_data->mach_priv; - int ret; - - ret = mt8186_dai_i2s_set_share(afe, "I2S2", "I2S3"); - if (ret) { - dev_err(rtd->dev, "Failed to set up shared clocks\n"); - return ret; - } - - ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, &priv->hdmi_jack); - if (ret) { - dev_err(rtd->dev, "HDMI Jack creation failed: %d\n", ret); - return ret; - } - - return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); -} - -static int mt8186_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, - struct snd_pcm_hw_params *params, - snd_pcm_format_t fmt) -{ - struct snd_interval *channels = hw_param_interval(params, - SNDRV_PCM_HW_PARAM_CHANNELS); - - dev_dbg(rtd->dev, "%s(), fix format to %d\n", __func__, fmt); - - /* fix BE i2s channel to 2 channel */ - channels->min = 2; - channels->max = 2; - - /* clean param mask first */ - snd_mask_reset_range(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), - 0, (__force unsigned int)SNDRV_PCM_FORMAT_LAST); - - params_set_format(params, fmt); - - return 0; -} - -static int mt8186_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, - struct snd_pcm_hw_params *params) -{ - return mt8186_hw_params_fixup(rtd, params, SNDRV_PCM_FORMAT_S32_LE); -} - -static int mt8186_anx7625_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, - struct snd_pcm_hw_params *params) -{ - return mt8186_hw_params_fixup(rtd, params, SNDRV_PCM_FORMAT_S24_LE); -} - -/* fixup the BE DAI link to match any values from topology */ -static int mt8186_sof_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, - struct snd_pcm_hw_params *params) -{ - int ret; - - ret = mtk_sof_dai_link_fixup(rtd, params); - - if (!strcmp(rtd->dai_link->name, "I2S0") || - !strcmp(rtd->dai_link->name, "I2S1") || - !strcmp(rtd->dai_link->name, "I2S2")) - mt8186_i2s_hw_params_fixup(rtd, params); - else if (!strcmp(rtd->dai_link->name, "I2S3")) - mt8186_anx7625_i2s_hw_params_fixup(rtd, params); - - return ret; -} - -static int mt8186_mt6366_da7219_max98357_playback_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int rates[] = { - 48000 - }; - static const unsigned int channels[] = { - 2 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channel failed\n"); - return ret; - } - - return 0; -} - -static const struct snd_soc_ops mt8186_mt6366_da7219_max98357_playback_ops = { - .startup = mt8186_mt6366_da7219_max98357_playback_startup, -}; - -static int mt8186_mt6366_da7219_max98357_capture_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int rates[] = { - 48000 - }; - static const unsigned int channels[] = { - 1, 2 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channel failed\n"); - return ret; - } - - return 0; -} - -static const struct snd_soc_ops mt8186_mt6366_da7219_max98357_capture_ops = { - .startup = mt8186_mt6366_da7219_max98357_capture_startup, -}; - -/* FE */ -SND_SOC_DAILINK_DEFS(playback1, - DAILINK_COMP_ARRAY(COMP_CPU("DL1")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback12, - DAILINK_COMP_ARRAY(COMP_CPU("DL12")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback2, - DAILINK_COMP_ARRAY(COMP_CPU("DL2")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback3, - DAILINK_COMP_ARRAY(COMP_CPU("DL3")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback4, - DAILINK_COMP_ARRAY(COMP_CPU("DL4")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback5, - DAILINK_COMP_ARRAY(COMP_CPU("DL5")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback6, - DAILINK_COMP_ARRAY(COMP_CPU("DL6")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback7, - DAILINK_COMP_ARRAY(COMP_CPU("DL7")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(playback8, - DAILINK_COMP_ARRAY(COMP_CPU("DL8")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(capture1, - DAILINK_COMP_ARRAY(COMP_CPU("UL1")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(capture2, - DAILINK_COMP_ARRAY(COMP_CPU("UL2")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(capture3, - DAILINK_COMP_ARRAY(COMP_CPU("UL3")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(capture4, - DAILINK_COMP_ARRAY(COMP_CPU("UL4")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(capture5, - DAILINK_COMP_ARRAY(COMP_CPU("UL5")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(capture6, - DAILINK_COMP_ARRAY(COMP_CPU("UL6")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(capture7, - DAILINK_COMP_ARRAY(COMP_CPU("UL7")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -/* hostless */ -SND_SOC_DAILINK_DEFS(hostless_lpbk, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless LPBK DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_fm, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless FM DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_src1, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless_SRC_1_DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_src_bargein, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless_SRC_Bargein_DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -/* BE */ -SND_SOC_DAILINK_DEFS(adda, - DAILINK_COMP_ARRAY(COMP_CPU("ADDA")), - DAILINK_COMP_ARRAY(COMP_CODEC("mt6358-sound", - "mt6358-snd-codec-aif1"), - COMP_CODEC("dmic-codec", - "dmic-hifi")), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(i2s0, - DAILINK_COMP_ARRAY(COMP_CPU("I2S0")), - DAILINK_COMP_ARRAY(COMP_EMPTY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(i2s1, - DAILINK_COMP_ARRAY(COMP_CPU("I2S1")), - DAILINK_COMP_ARRAY(COMP_EMPTY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(i2s2, - DAILINK_COMP_ARRAY(COMP_CPU("I2S2")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(i2s3, - DAILINK_COMP_ARRAY(COMP_CPU("I2S3")), - DAILINK_COMP_ARRAY(COMP_EMPTY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hw_gain1, - DAILINK_COMP_ARRAY(COMP_CPU("HW Gain 1")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hw_gain2, - DAILINK_COMP_ARRAY(COMP_CPU("HW Gain 2")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hw_src1, - DAILINK_COMP_ARRAY(COMP_CPU("HW_SRC_1")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hw_src2, - DAILINK_COMP_ARRAY(COMP_CPU("HW_SRC_2")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(connsys_i2s, - DAILINK_COMP_ARRAY(COMP_CPU("CONNSYS_I2S")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(pcm1, - DAILINK_COMP_ARRAY(COMP_CPU("PCM 1")), - DAILINK_COMP_ARRAY(COMP_CODEC("bt-sco", "bt-sco-pcm-wb")), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(tdm_in, - DAILINK_COMP_ARRAY(COMP_CPU("TDM IN")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -/* hostless */ -SND_SOC_DAILINK_DEFS(hostless_ul1, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless_UL1 DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_ul2, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless_UL2 DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_ul3, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless_UL3 DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_ul5, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless_UL5 DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_ul6, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless_UL6 DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_hw_gain_aaudio, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless HW Gain AAudio DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(hostless_src_aaudio, - DAILINK_COMP_ARRAY(COMP_CPU("Hostless SRC AAudio DAI")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); -SND_SOC_DAILINK_DEFS(AFE_SOF_DL1, - DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL1")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(AFE_SOF_DL2, - DAILINK_COMP_ARRAY(COMP_CPU("SOF_DL2")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(AFE_SOF_UL1, - DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL1")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -SND_SOC_DAILINK_DEFS(AFE_SOF_UL2, - DAILINK_COMP_ARRAY(COMP_CPU("SOF_UL2")), - DAILINK_COMP_ARRAY(COMP_DUMMY()), - DAILINK_COMP_ARRAY(COMP_EMPTY())); - -static const struct sof_conn_stream g_sof_conn_streams[] = { - { "I2S1", "AFE_SOF_DL1", SOF_DMA_DL1, SNDRV_PCM_STREAM_PLAYBACK}, - { "I2S3", "AFE_SOF_DL2", SOF_DMA_DL2, SNDRV_PCM_STREAM_PLAYBACK}, - { "Primary Codec", "AFE_SOF_UL1", SOF_DMA_UL1, SNDRV_PCM_STREAM_CAPTURE}, - { "I2S0", "AFE_SOF_UL2", SOF_DMA_UL2, SNDRV_PCM_STREAM_CAPTURE}, -}; - -static struct snd_soc_dai_link mt8186_mt6366_da7219_max98357_dai_links[] = { - /* Front End DAI links */ - { - .name = "Playback_1", - .stream_name = "Playback_1", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_merged_format = 1, - .dpcm_merged_chan = 1, - .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_da7219_max98357_playback_ops, - SND_SOC_DAILINK_REG(playback1), - }, - { - .name = "Playback_12", - .stream_name = "Playback_12", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(playback12), - }, - { - .name = "Playback_2", - .stream_name = "Playback_2", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_merged_format = 1, - .dpcm_merged_chan = 1, - .dpcm_merged_rate = 1, - SND_SOC_DAILINK_REG(playback2), - }, - { - .name = "Playback_3", - .stream_name = "Playback_3", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_merged_format = 1, - .dpcm_merged_chan = 1, - .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_da7219_max98357_playback_ops, - SND_SOC_DAILINK_REG(playback3), - }, - { - .name = "Playback_4", - .stream_name = "Playback_4", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(playback4), - }, - { - .name = "Playback_5", - .stream_name = "Playback_5", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(playback5), - }, - { - .name = "Playback_6", - .stream_name = "Playback_6", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(playback6), - }, - { - .name = "Playback_7", - .stream_name = "Playback_7", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(playback7), - }, - { - .name = "Playback_8", - .stream_name = "Playback_8", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(playback8), - }, - { - .name = "Capture_1", - .stream_name = "Capture_1", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - SND_SOC_DAILINK_REG(capture1), - }, - { - .name = "Capture_2", - .stream_name = "Capture_2", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - .dpcm_merged_format = 1, - .dpcm_merged_chan = 1, - .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_da7219_max98357_capture_ops, - SND_SOC_DAILINK_REG(capture2), - }, - { - .name = "Capture_3", - .stream_name = "Capture_3", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - SND_SOC_DAILINK_REG(capture3), - }, - { - .name = "Capture_4", - .stream_name = "Capture_4", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - .dpcm_merged_format = 1, - .dpcm_merged_chan = 1, - .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_da7219_max98357_capture_ops, - SND_SOC_DAILINK_REG(capture4), - }, - { - .name = "Capture_5", - .stream_name = "Capture_5", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - SND_SOC_DAILINK_REG(capture5), - }, - { - .name = "Capture_6", - .stream_name = "Capture_6", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - .dpcm_merged_format = 1, - .dpcm_merged_chan = 1, - .dpcm_merged_rate = 1, - SND_SOC_DAILINK_REG(capture6), - }, - { - .name = "Capture_7", - .stream_name = "Capture_7", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - SND_SOC_DAILINK_REG(capture7), - }, - { - .name = "Hostless_LPBK", - .stream_name = "Hostless_LPBK", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_lpbk), - }, - { - .name = "Hostless_FM", - .stream_name = "Hostless_FM", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_fm), - }, - { - .name = "Hostless_SRC_1", - .stream_name = "Hostless_SRC_1", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_src1), - }, - { - .name = "Hostless_SRC_Bargein", - .stream_name = "Hostless_SRC_Bargein", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_src_bargein), - }, - { - .name = "Hostless_HW_Gain_AAudio", - .stream_name = "Hostless_HW_Gain_AAudio", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_hw_gain_aaudio), - }, - { - .name = "Hostless_SRC_AAudio", - .stream_name = "Hostless_SRC_AAudio", - .trigger = {SND_SOC_DPCM_TRIGGER_PRE, - SND_SOC_DPCM_TRIGGER_PRE}, - .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_src_aaudio), - }, - /* Back End DAI links */ - { - .name = "Primary Codec", - .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - .init = mt8186_mt6366_init, - SND_SOC_DAILINK_REG(adda), - }, - { - .name = "I2S3", - .no_pcm = 1, - .dai_fmt = SND_SOC_DAIFMT_I2S | - SND_SOC_DAIFMT_IB_IF | - SND_SOC_DAIFMT_CBM_CFM, - .dpcm_playback = 1, - .ignore_suspend = 1, - .init = mt8186_mt6366_da7219_max98357_hdmi_init, - .be_hw_params_fixup = mt8186_anx7625_i2s_hw_params_fixup, - SND_SOC_DAILINK_REG(i2s3), - }, - { - .name = "I2S0", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - .be_hw_params_fixup = mt8186_i2s_hw_params_fixup, - .ops = &mt8186_da7219_i2s_ops, - SND_SOC_DAILINK_REG(i2s0), - }, - { - .name = "I2S1", - .no_pcm = 1, - .dpcm_playback = 1, - .ignore_suspend = 1, - .be_hw_params_fixup = mt8186_i2s_hw_params_fixup, - .init = mt8186_da7219_init, - .ops = &mt8186_da7219_i2s_ops, - SND_SOC_DAILINK_REG(i2s1), - }, - { - .name = "I2S2", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - .be_hw_params_fixup = mt8186_i2s_hw_params_fixup, - SND_SOC_DAILINK_REG(i2s2), - }, - { - .name = "HW Gain 1", - .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hw_gain1), - }, - { - .name = "HW Gain 2", - .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hw_gain2), - }, - { - .name = "HW_SRC_1", - .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hw_src1), - }, - { - .name = "HW_SRC_2", - .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hw_src2), - }, - { - .name = "CONNSYS_I2S", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(connsys_i2s), - }, - { - .name = "PCM 1", - .dai_fmt = SND_SOC_DAIFMT_I2S | - SND_SOC_DAIFMT_NB_IF, - .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(pcm1), - }, - { - .name = "TDM IN", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(tdm_in), - }, - /* dummy BE for ul memif to record from dl memif */ - { - .name = "Hostless_UL1", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_ul1), - }, - { - .name = "Hostless_UL2", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_ul2), - }, - { - .name = "Hostless_UL3", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_ul3), - }, - { - .name = "Hostless_UL5", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_ul5), - }, - { - .name = "Hostless_UL6", - .no_pcm = 1, - .dpcm_capture = 1, - .ignore_suspend = 1, - SND_SOC_DAILINK_REG(hostless_ul6), - }, - /* SOF BE */ - { - .name = "AFE_SOF_DL1", - .no_pcm = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(AFE_SOF_DL1), - }, - { - .name = "AFE_SOF_DL2", - .no_pcm = 1, - .dpcm_playback = 1, - SND_SOC_DAILINK_REG(AFE_SOF_DL2), - }, - { - .name = "AFE_SOF_UL1", - .no_pcm = 1, - .dpcm_capture = 1, - SND_SOC_DAILINK_REG(AFE_SOF_UL1), - }, - { - .name = "AFE_SOF_UL2", - .no_pcm = 1, - .dpcm_capture = 1, - SND_SOC_DAILINK_REG(AFE_SOF_UL2), - }, -}; - -static const struct snd_soc_dapm_widget -mt8186_mt6366_da7219_max98357_widgets[] = { - SND_SOC_DAPM_SPK("Speakers", NULL), - SND_SOC_DAPM_HP("Headphones", NULL), - SND_SOC_DAPM_MIC("Headset Mic", NULL), - SND_SOC_DAPM_LINE("Line Out", NULL), - SND_SOC_DAPM_OUTPUT("HDMI1"), - SND_SOC_DAPM_MIXER(SOF_DMA_DL1, SND_SOC_NOPM, 0, 0, NULL, 0), - SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), - SND_SOC_DAPM_MIXER(SOF_DMA_UL1, SND_SOC_NOPM, 0, 0, NULL, 0), - SND_SOC_DAPM_MIXER(SOF_DMA_UL2, SND_SOC_NOPM, 0, 0, NULL, 0), -}; - -static const struct snd_soc_dapm_route -mt8186_mt6366_da7219_max98357_routes[] = { - /* SPK */ - { "Speakers", NULL, "Speaker"}, - /* Headset */ - { "Headphones", NULL, "HPL" }, - { "Headphones", NULL, "HPR" }, - { "MIC", NULL, "Headset Mic" }, - /* HDMI */ - { "HDMI1", NULL, "TX"}, - /* SOF Uplink */ - {SOF_DMA_UL1, NULL, "UL1_CH1"}, - {SOF_DMA_UL1, NULL, "UL1_CH2"}, - {SOF_DMA_UL2, NULL, "UL2_CH1"}, - {SOF_DMA_UL2, NULL, "UL2_CH2"}, - /* SOF Downlink */ - {"DSP_DL1_VIRT", NULL, SOF_DMA_DL1}, - {"DSP_DL2_VIRT", NULL, SOF_DMA_DL2}, -}; - -static const struct snd_kcontrol_new -mt8186_mt6366_da7219_max98357_controls[] = { - SOC_DAPM_PIN_SWITCH("Speakers"), - SOC_DAPM_PIN_SWITCH("Headphones"), - SOC_DAPM_PIN_SWITCH("Headset Mic"), - SOC_DAPM_PIN_SWITCH("Line Out"), - SOC_DAPM_PIN_SWITCH("HDMI1"), -}; - -static struct snd_soc_card mt8186_mt6366_da7219_max98357_soc_card = { - .name = "mt8186_da7219_max98357", - .owner = THIS_MODULE, - .dai_link = mt8186_mt6366_da7219_max98357_dai_links, - .num_links = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_dai_links), - .controls = mt8186_mt6366_da7219_max98357_controls, - .num_controls = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_controls), - .dapm_widgets = mt8186_mt6366_da7219_max98357_widgets, - .num_dapm_widgets = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_widgets), - .dapm_routes = mt8186_mt6366_da7219_max98357_routes, - .num_dapm_routes = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_routes), - .codec_conf = mt8186_mt6366_da7219_max98357_codec_conf, - .num_configs = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_codec_conf), -}; - -static int mt8186_mt6366_da7219_max98357_dev_probe(struct platform_device *pdev) -{ - struct snd_soc_card *card; - struct snd_soc_dai_link *dai_link; - struct mtk_soc_card_data *soc_card_data; - struct mt8186_mt6366_da7219_max98357_priv *mach_priv; - struct device_node *platform_node, *headset_codec, *playback_codec, *adsp_node; - int sof_on = 0; - int ret, i; - - card = (struct snd_soc_card *)device_get_match_data(&pdev->dev); - if (!card) - return -EINVAL; - card->dev = &pdev->dev; - - soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*soc_card_data), GFP_KERNEL); - if (!soc_card_data) - return -ENOMEM; - mach_priv = devm_kzalloc(&pdev->dev, sizeof(*mach_priv), GFP_KERNEL); - if (!mach_priv) - return -ENOMEM; - - soc_card_data->mach_priv = mach_priv; - - adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); - if (adsp_node) { - struct mtk_sof_priv *sof_priv; - - sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL); - if (!sof_priv) { - ret = -ENOMEM; - goto err_adsp_node; - } - sof_priv->conn_streams = g_sof_conn_streams; - sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams); - sof_priv->sof_dai_link_fixup = mt8186_sof_dai_link_fixup; - soc_card_data->sof_priv = sof_priv; - card->probe = mtk_sof_card_probe; - card->late_probe = mtk_sof_card_late_probe; - if (!card->topology_shortname_created) { - snprintf(card->topology_shortname, 32, "sof-%s", card->name); - card->topology_shortname_created = true; - } - card->name = card->topology_shortname; - sof_on = 1; - } else { - dev_dbg(&pdev->dev, "Probe without adsp\n"); - } - - if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) { - ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, - "mediatek,dai-link", - mt8186_mt6366_da7219_max98357_dai_links, - ARRAY_SIZE(mt8186_mt6366_da7219_max98357_dai_links)); - if (ret) { - dev_dbg(&pdev->dev, "Parse dai-link fail\n"); - goto err_adsp_node; - } - } else { - if (!sof_on) - card->num_links = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_dai_links) - - ARRAY_SIZE(g_sof_conn_streams); - } - - platform_node = of_parse_phandle(pdev->dev.of_node, "mediatek,platform", 0); - if (!platform_node) { - ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'platform' missing or invalid\n"); - goto err_platform_node; - } - - playback_codec = of_get_child_by_name(pdev->dev.of_node, "playback-codecs"); - if (!playback_codec) { - ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'speaker-codecs' missing or invalid\n"); - goto err_playback_codec; - } - - headset_codec = of_get_child_by_name(pdev->dev.of_node, "headset-codec"); - if (!headset_codec) { - ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'headset-codec' missing or invalid\n"); - goto err_headset_codec; - } - - for_each_card_prelinks(card, i, dai_link) { - ret = mt8186_mt6366_card_set_be_link(card, dai_link, playback_codec, "I2S3"); - if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set speaker_codec fail\n", - dai_link->name); - goto err_probe; - } - - ret = mt8186_mt6366_card_set_be_link(card, dai_link, headset_codec, "I2S0"); - if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set headset_codec fail\n", - dai_link->name); - goto err_probe; - } - - ret = mt8186_mt6366_card_set_be_link(card, dai_link, headset_codec, "I2S1"); - if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set headset_codec fail\n", - dai_link->name); - goto err_probe; - } - - if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && sof_on) - dai_link->platforms->of_node = adsp_node; - - if (!dai_link->platforms->name && !dai_link->platforms->of_node) - dai_link->platforms->of_node = platform_node; - } - - snd_soc_card_set_drvdata(card, soc_card_data); - - ret = mt8186_afe_gpio_init(&pdev->dev); - if (ret) { - dev_err_probe(&pdev->dev, ret, "%s init gpio error\n", __func__); - goto err_probe; - } - - ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) - dev_err_probe(&pdev->dev, ret, "%s snd_soc_register_card fail\n", __func__); - -err_probe: - of_node_put(headset_codec); -err_headset_codec: - of_node_put(playback_codec); -err_playback_codec: - of_node_put(platform_node); -err_platform_node: -err_adsp_node: - of_node_put(adsp_node); - - return ret; -} - -#if IS_ENABLED(CONFIG_OF) -static const struct of_device_id mt8186_mt6366_da7219_max98357_dt_match[] = { - { .compatible = "mediatek,mt8186-mt6366-da7219-max98357-sound", - .data = &mt8186_mt6366_da7219_max98357_soc_card, - }, - {} -}; -MODULE_DEVICE_TABLE(of, mt8186_mt6366_da7219_max98357_dt_match); -#endif - -static struct platform_driver mt8186_mt6366_da7219_max98357_driver = { - .driver = { - .name = "mt8186_mt6366_da7219_max98357", -#if IS_ENABLED(CONFIG_OF) - .of_match_table = mt8186_mt6366_da7219_max98357_dt_match, -#endif - .pm = &snd_soc_pm_ops, - }, - .probe = mt8186_mt6366_da7219_max98357_dev_probe, -}; - -module_platform_driver(mt8186_mt6366_da7219_max98357_driver); - -/* Module information */ -MODULE_DESCRIPTION("MT8186-MT6366-DA7219-MAX98357 ALSA SoC machine driver"); -MODULE_AUTHOR("Jiaxin Yu <jiaxin.yu@mediatek.com>"); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("mt8186_mt6366_da7219_max98357 soc card"); diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c b/sound/soc/mediatek/mt8186/mt8186-mt6366.c index f78197c8e582..43546012cf61 100644 --- a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c +++ b/sound/soc/mediatek/mt8186/mt8186-mt6366.c @@ -1,11 +1,14 @@ // SPDX-License-Identifier: GPL-2.0 // -// mt8186-mt6366-rt1019-rt5682s.c -// -- MT8186-MT6366-RT1019-RT5682S ALSA SoC machine driver +// mt8186-mt6366.c +// -- MT8186-MT6366 ALSA SoC machine driver // // Copyright (c) 2022 MediaTek Inc. // Author: Jiaxin Yu <jiaxin.yu@mediatek.com> // +// Copyright (c) 2024 Collabora Ltd. +// AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> +// #include <linux/gpio/consumer.h> #include <linux/input.h> @@ -16,11 +19,13 @@ #include <sound/rt5682.h> #include <sound/soc.h> +#include "../../codecs/da7219.h" #include "../../codecs/mt6358.h" #include "../../codecs/rt5682.h" #include "../common/mtk-afe-platform-driver.h" #include "../common/mtk-dsp-sof-common.h" #include "../common/mtk-soc-card.h" +#include "../common/mtk-soundcard-driver.h" #include "mt8186-afe-common.h" #include "mt8186-afe-clk.h" #include "mt8186-afe-gpio.h" @@ -32,17 +37,27 @@ #define RT5682S_CODEC_DAI "rt5682s-aif1" #define RT5682S_DEV0_NAME "rt5682s.5-001a" +#define DA7219_CODEC_DAI "da7219-hifi" +#define DA7219_DEV_NAME "da7219.5-001a" + #define SOF_DMA_DL1 "SOF_DMA_DL1" #define SOF_DMA_DL2 "SOF_DMA_DL2" #define SOF_DMA_UL1 "SOF_DMA_UL1" #define SOF_DMA_UL2 "SOF_DMA_UL2" +#define DA7219_CODEC_PRESENT BIT(0) + struct mt8186_mt6366_rt1019_rt5682s_priv { - struct snd_soc_jack headset_jack, hdmi_jack; struct gpio_desc *dmic_sel; int dmic_switch; }; +enum mt8186_jacks { + MT8186_JACK_HEADSET, + MT8186_JACK_HDMI, + MT8186_JACK_MAX, +}; + /* Headset jack detection DAPM pins */ static struct snd_soc_jack_pin mt8186_jack_pins[] = { { @@ -158,17 +173,23 @@ static int primary_codec_init(struct snd_soc_pcm_runtime *rtd) return ret; } -static int mt8186_rt5682s_init(struct snd_soc_pcm_runtime *rtd) +static int mt8186_headset_codec_init(struct snd_soc_pcm_runtime *rtd) { struct snd_soc_component *cmpnt_afe = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); - struct mt8186_mt6366_rt1019_rt5682s_priv *priv = soc_card_data->mach_priv; - struct snd_soc_jack *jack = &priv->headset_jack; + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8186_JACK_HEADSET]; struct snd_soc_component *cmpnt_codec = snd_soc_rtd_to_codec(rtd, 0)->component; + const int hs_keys_rt5682[] = { + KEY_PLAYPAUSE, KEY_VOLUMEUP, KEY_VOLUMEDOWN, KEY_VOICECOMMAND + }; + const int hs_keys_da7219[] = { + KEY_PLAYPAUSE, KEY_VOICECOMMAND, KEY_VOLUMEUP, KEY_VOLUMEDOWN + }; + const int *hs_keys; int ret; int type; @@ -189,19 +210,94 @@ static int mt8186_rt5682s_init(struct snd_soc_pcm_runtime *rtd) return ret; } - snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); - snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); - snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); - snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); + if (soc_card_data->card_data->flags & DA7219_CODEC_PRESENT) + hs_keys = hs_keys_da7219; + else + hs_keys = hs_keys_rt5682; + + snd_jack_set_key(jack->jack, SND_JACK_BTN_0, hs_keys[0]); + snd_jack_set_key(jack->jack, SND_JACK_BTN_1, hs_keys[1]); + snd_jack_set_key(jack->jack, SND_JACK_BTN_2, hs_keys[2]); + snd_jack_set_key(jack->jack, SND_JACK_BTN_3, hs_keys[3]); type = SND_JACK_HEADSET | SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2 | SND_JACK_BTN_3; return snd_soc_component_set_jack(cmpnt_codec, jack, (void *)&type); } +static int mt8186_da7219_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); + struct snd_soc_dai *codec_dai; + unsigned int rate = params_rate(params); + unsigned int mclk_fs_ratio = 256; + unsigned int mclk_fs = rate * mclk_fs_ratio; + unsigned int freq; + int ret, j; + + ret = snd_soc_dai_set_sysclk(cpu_dai, 0, mclk_fs, SND_SOC_CLOCK_OUT); + if (ret < 0) { + dev_err(rtd->dev, "failed to set cpu dai sysclk: %d\n", ret); + return ret; + } + + for_each_rtd_codec_dais(rtd, j, codec_dai) { + if (strcmp(codec_dai->component->name, DA7219_DEV_NAME)) + continue; + + ret = snd_soc_dai_set_sysclk(codec_dai, DA7219_CLKSRC_MCLK, + mclk_fs, SND_SOC_CLOCK_IN); + if (ret < 0) { + dev_err(rtd->dev, "failed to set sysclk: %d\n", ret); + return ret; + } + + if ((rate % 8000) == 0) + freq = DA7219_PLL_FREQ_OUT_98304; + else + freq = DA7219_PLL_FREQ_OUT_90316; + + ret = snd_soc_dai_set_pll(codec_dai, 0, DA7219_SYSCLK_PLL_SRM, + 0, freq); + if (ret) { + dev_err(rtd->dev, "failed to start PLL: %d\n", ret); + return ret; + } + } + + return 0; +} + +static int mt8186_da7219_i2s_hw_free(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct snd_soc_dai *codec_dai; + int j, ret; + + for_each_rtd_codec_dais(rtd, j, codec_dai) { + if (strcmp(codec_dai->component->name, DA7219_DEV_NAME)) + continue; + + ret = snd_soc_dai_set_pll(codec_dai, 0, DA7219_SYSCLK_MCLK, 0, 0); + if (ret < 0) { + dev_err(rtd->dev, "failed to stop PLL: %d\n", ret); + return ret; + } + } + + return 0; +} + +static const struct snd_soc_ops mt8186_da7219_i2s_ops = { + .hw_params = mt8186_da7219_i2s_hw_params, + .hw_free = mt8186_da7219_i2s_hw_free, +}; + static int mt8186_rt5682s_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_card *card = rtd->card; struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0); @@ -257,7 +353,7 @@ static int mt8186_mt6366_rt1019_rt5682s_hdmi_init(struct snd_soc_pcm_runtime *rt snd_soc_rtd_to_codec(rtd, 0)->component; struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); - struct mt8186_mt6366_rt1019_rt5682s_priv *priv = soc_card_data->mach_priv; + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8186_JACK_HDMI]; int ret; ret = mt8186_dai_i2s_set_share(afe, "I2S2", "I2S3"); @@ -266,13 +362,13 @@ static int mt8186_mt6366_rt1019_rt5682s_hdmi_init(struct snd_soc_pcm_runtime *rt return ret; } - ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, &priv->hdmi_jack); + ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, jack); if (ret) { dev_err(rtd->dev, "HDMI Jack creation failed: %d\n", ret); return ret; } - return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); + return snd_soc_component_set_jack(cmpnt_codec, jack, NULL); } static int mt8186_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, @@ -297,14 +393,14 @@ static int mt8186_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, return 0; } -static int mt8186_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, - struct snd_pcm_hw_params *params) +static int mt8186_i2s_hw_params_24le_fixup(struct snd_soc_pcm_runtime *rtd, + struct snd_pcm_hw_params *params) { return mt8186_hw_params_fixup(rtd, params, SNDRV_PCM_FORMAT_S24_LE); } -static int mt8186_it6505_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, - struct snd_pcm_hw_params *params) +static int mt8186_i2s_hw_params_32le_fixup(struct snd_soc_pcm_runtime *rtd, + struct snd_pcm_hw_params *params) { return mt8186_hw_params_fixup(rtd, params, SNDRV_PCM_FORMAT_S32_LE); } @@ -313,112 +409,28 @@ static int mt8186_it6505_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, static int mt8186_sof_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, struct snd_pcm_hw_params *params) { + struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); int ret; ret = mtk_sof_dai_link_fixup(rtd, params); if (!strcmp(rtd->dai_link->name, "I2S0") || !strcmp(rtd->dai_link->name, "I2S1") || - !strcmp(rtd->dai_link->name, "I2S2")) - mt8186_i2s_hw_params_fixup(rtd, params); - else if (!strcmp(rtd->dai_link->name, "I2S3")) - mt8186_it6505_i2s_hw_params_fixup(rtd, params); - - return ret; -} - -static int mt8186_mt6366_rt1019_rt5682s_playback_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int rates[] = { - 48000 - }; - static const unsigned int channels[] = { - 2 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channel failed\n"); - return ret; - } - - return 0; -} - -static const struct snd_soc_ops mt8186_mt6366_rt1019_rt5682s_playback_ops = { - .startup = mt8186_mt6366_rt1019_rt5682s_playback_startup, -}; - -static int mt8186_mt6366_rt1019_rt5682s_capture_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int rates[] = { - 48000 - }; - static const unsigned int channels[] = { - 1, 2 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; + !strcmp(rtd->dai_link->name, "I2S2")) { + if (soc_card_data->card_data->flags & DA7219_CODEC_PRESENT) + mt8186_i2s_hw_params_32le_fixup(rtd, params); + else + mt8186_i2s_hw_params_24le_fixup(rtd, params); + } else if (!strcmp(rtd->dai_link->name, "I2S3")) { + if (soc_card_data->card_data->flags & DA7219_CODEC_PRESENT) + mt8186_i2s_hw_params_24le_fixup(rtd, params); + else + mt8186_i2s_hw_params_32le_fixup(rtd, params); } - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channel failed\n"); - return ret; - } - - return 0; + return ret; } -static const struct snd_soc_ops mt8186_mt6366_rt1019_rt5682s_capture_ops = { - .startup = mt8186_mt6366_rt1019_rt5682s_capture_startup, -}; - /* FE */ SND_SOC_DAILINK_DEFS(playback1, DAILINK_COMP_ARRAY(COMP_CPU("DL1")), @@ -635,11 +647,11 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .dpcm_merged_format = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_rt1019_rt5682s_playback_ops, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(playback1), }, { @@ -648,7 +660,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback12), }, { @@ -657,7 +669,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .dpcm_merged_format = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, @@ -669,11 +681,11 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .dpcm_merged_format = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_rt1019_rt5682s_playback_ops, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(playback3), }, { @@ -682,7 +694,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback4), }, { @@ -691,7 +703,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback5), }, { @@ -700,7 +712,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback6), }, { @@ -709,7 +721,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback7), }, { @@ -718,7 +730,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback8), }, { @@ -727,7 +739,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture1), }, { @@ -736,11 +748,11 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .dpcm_merged_format = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_rt1019_rt5682s_capture_ops, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(capture2), }, { @@ -749,7 +761,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture3), }, { @@ -758,11 +770,11 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .dpcm_merged_format = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, - .ops = &mt8186_mt6366_rt1019_rt5682s_capture_ops, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(capture4), }, { @@ -771,7 +783,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture5), }, { @@ -780,7 +792,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .dpcm_merged_format = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, @@ -792,7 +804,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture7), }, { @@ -801,8 +813,6 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_lpbk), }, @@ -812,8 +822,6 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_fm), }, @@ -823,8 +831,6 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_src1), }, @@ -834,8 +840,6 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_src_bargein), }, @@ -845,7 +849,7 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_hw_gain_aaudio), }, @@ -855,8 +859,6 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_src_aaudio), }, @@ -864,8 +866,6 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { { .name = "Primary Codec", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, .init = primary_codec_init, SND_SOC_DAILINK_REG(adda), @@ -875,76 +875,63 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_IB_IF | - SND_SOC_DAIFMT_CBM_CFM, - .dpcm_playback = 1, + SND_SOC_DAIFMT_CBP_CFP, + .playback_only = 1, .ignore_suspend = 1, .init = mt8186_mt6366_rt1019_rt5682s_hdmi_init, - .be_hw_params_fixup = mt8186_it6505_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s3), }, { .name = "I2S0", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, - .be_hw_params_fixup = mt8186_i2s_hw_params_fixup, .ops = &mt8186_rt5682s_i2s_ops, SND_SOC_DAILINK_REG(i2s0), }, { .name = "I2S1", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, - .be_hw_params_fixup = mt8186_i2s_hw_params_fixup, - .init = mt8186_rt5682s_init, - .ops = &mt8186_rt5682s_i2s_ops, + .init = mt8186_headset_codec_init, SND_SOC_DAILINK_REG(i2s1), }, { .name = "I2S2", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, - .be_hw_params_fixup = mt8186_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s2), }, { .name = "HW Gain 1", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hw_gain1), }, { .name = "HW Gain 2", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hw_gain2), }, { .name = "HW_SRC_1", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hw_src1), }, { .name = "HW_SRC_2", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hw_src2), }, { .name = "CONNSYS_I2S", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(connsys_i2s), }, @@ -953,15 +940,13 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_IF, .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm1), }, { .name = "TDM IN", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(tdm_in), }, @@ -969,35 +954,35 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { { .name = "Hostless_UL1", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_ul1), }, { .name = "Hostless_UL2", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_ul2), }, { .name = "Hostless_UL3", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_ul3), }, { .name = "Hostless_UL5", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_ul5), }, { .name = "Hostless_UL6", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(hostless_ul6), }, @@ -1005,30 +990,43 @@ static struct snd_soc_dai_link mt8186_mt6366_rt1019_rt5682s_dai_links[] = { { .name = "AFE_SOF_DL1", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(AFE_SOF_DL1), }, { .name = "AFE_SOF_DL2", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(AFE_SOF_DL2), }, { .name = "AFE_SOF_UL1", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(AFE_SOF_UL1), }, { .name = "AFE_SOF_UL2", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(AFE_SOF_UL2), }, }; static const struct snd_soc_dapm_widget +mt8186_mt6366_da7219_max98357_widgets[] = { + SND_SOC_DAPM_SPK("Speakers", NULL), + SND_SOC_DAPM_HP("Headphones", NULL), + SND_SOC_DAPM_MIC("Headset Mic", NULL), + SND_SOC_DAPM_LINE("Line Out", NULL), + SND_SOC_DAPM_LINE("HDMI1", NULL), + SND_SOC_DAPM_MIXER(SOF_DMA_DL1, SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER(SOF_DMA_UL1, SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER(SOF_DMA_UL2, SND_SOC_NOPM, 0, 0, NULL, 0), +}; + +static const struct snd_soc_dapm_widget mt8186_mt6366_rt1019_rt5682s_widgets[] = { SND_SOC_DAPM_SPK("Speakers", NULL), SND_SOC_DAPM_HP("Headphone", NULL), @@ -1081,6 +1079,14 @@ static const struct snd_soc_dapm_route mt8186_mt6366_rt5650_routes[] = { {"DSP_DL2_VIRT", NULL, SOF_DMA_DL2}, }; +static const struct snd_kcontrol_new mt8186_mt6366_da7219_max98357_controls[] = { + SOC_DAPM_PIN_SWITCH("Speakers"), + SOC_DAPM_PIN_SWITCH("Headphones"), + SOC_DAPM_PIN_SWITCH("Headset Mic"), + SOC_DAPM_PIN_SWITCH("Line Out"), + SOC_DAPM_PIN_SWITCH("HDMI1"), +}; + static const struct snd_kcontrol_new mt8186_mt6366_rt1019_rt5682s_controls[] = { SOC_DAPM_PIN_SWITCH("Speakers"), @@ -1089,6 +1095,21 @@ mt8186_mt6366_rt1019_rt5682s_controls[] = { SOC_DAPM_PIN_SWITCH("HDMI1"), }; +static struct snd_soc_card mt8186_mt6366_da7219_max98357_soc_card = { + .name = "mt8186_da7219_max98357", + .owner = THIS_MODULE, + .dai_link = mt8186_mt6366_rt1019_rt5682s_dai_links, + .num_links = ARRAY_SIZE(mt8186_mt6366_rt1019_rt5682s_dai_links), + .controls = mt8186_mt6366_da7219_max98357_controls, + .num_controls = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_controls), + .dapm_widgets = mt8186_mt6366_da7219_max98357_widgets, + .num_dapm_widgets = ARRAY_SIZE(mt8186_mt6366_da7219_max98357_widgets), + .dapm_routes = mt8186_mt6366_rt1019_rt5682s_routes, + .num_dapm_routes = ARRAY_SIZE(mt8186_mt6366_rt1019_rt5682s_routes), + .codec_conf = mt8186_mt6366_rt1019_rt5682s_codec_conf, + .num_configs = ARRAY_SIZE(mt8186_mt6366_rt1019_rt5682s_codec_conf), +}; + static struct snd_soc_card mt8186_mt6366_rt1019_rt5682s_soc_card = { .name = "mt8186_rt1019_rt5682s", .owner = THIS_MODULE, @@ -1134,187 +1155,222 @@ static struct snd_soc_card mt8186_mt6366_rt5650_soc_card = { .num_configs = ARRAY_SIZE(mt8186_mt6366_rt1019_rt5682s_codec_conf), }; -static int mt8186_mt6366_rt1019_rt5682s_dev_probe(struct platform_device *pdev) +static int mt8186_mt6366_legacy_probe(struct mtk_soc_card_data *soc_card_data) { - struct snd_soc_card *card; + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = card_data->card; + struct device *dev = card->dev; struct snd_soc_dai_link *dai_link; - struct mtk_soc_card_data *soc_card_data; - struct mt8186_mt6366_rt1019_rt5682s_priv *mach_priv; - struct device_node *platform_node, *headset_codec, *playback_codec, *adsp_node; - int sof_on = 0; + struct device_node *headset_codec, *playback_codec; int ret, i; - card = (struct snd_soc_card *)device_get_match_data(&pdev->dev); - if (!card) - return -EINVAL; - card->dev = &pdev->dev; - - soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*soc_card_data), GFP_KERNEL); - if (!soc_card_data) - return -ENOMEM; - mach_priv = devm_kzalloc(&pdev->dev, sizeof(*mach_priv), GFP_KERNEL); - if (!mach_priv) - return -ENOMEM; - - soc_card_data->mach_priv = mach_priv; - - mach_priv->dmic_sel = devm_gpiod_get_optional(&pdev->dev, - "dmic", GPIOD_OUT_LOW); - if (IS_ERR(mach_priv->dmic_sel)) { - dev_err(&pdev->dev, "DMIC gpio failed err=%ld\n", - PTR_ERR(mach_priv->dmic_sel)); - return PTR_ERR(mach_priv->dmic_sel); - } - - adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); - if (adsp_node) { - struct mtk_sof_priv *sof_priv; + playback_codec = of_get_child_by_name(dev->of_node, "playback-codecs"); + if (!playback_codec) + return dev_err_probe(dev, -EINVAL, + "Property 'playback-codecs' missing or invalid\n"); - sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL); - if (!sof_priv) { - ret = -ENOMEM; - goto err_adsp_node; - } - sof_priv->conn_streams = g_sof_conn_streams; - sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams); - sof_priv->sof_dai_link_fixup = mt8186_sof_dai_link_fixup; - soc_card_data->sof_priv = sof_priv; - card->probe = mtk_sof_card_probe; - card->late_probe = mtk_sof_card_late_probe; - if (!card->topology_shortname_created) { - snprintf(card->topology_shortname, 32, "sof-%s", card->name); - card->topology_shortname_created = true; - } - card->name = card->topology_shortname; - sof_on = 1; - } else { - dev_dbg(&pdev->dev, "Probe without adsp\n"); - } - - if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) { - ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, - "mediatek,dai-link", - mt8186_mt6366_rt1019_rt5682s_dai_links, - ARRAY_SIZE(mt8186_mt6366_rt1019_rt5682s_dai_links)); - if (ret) { - dev_dbg(&pdev->dev, "Parse dai-link fail\n"); - goto err_adsp_node; - } - } else { - if (!sof_on) - card->num_links = ARRAY_SIZE(mt8186_mt6366_rt1019_rt5682s_dai_links) - - ARRAY_SIZE(g_sof_conn_streams); - } - - platform_node = of_parse_phandle(pdev->dev.of_node, "mediatek,platform", 0); - if (!platform_node) { - ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'platform' missing or invalid\n"); - goto err_platform_node; - } - - playback_codec = of_get_child_by_name(pdev->dev.of_node, "playback-codecs"); - if (!playback_codec) { - ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'playback-codecs' missing or invalid\n"); - goto err_playback_codec; - } - - headset_codec = of_get_child_by_name(pdev->dev.of_node, "headset-codec"); + headset_codec = of_get_child_by_name(dev->of_node, "headset-codec"); if (!headset_codec) { - ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'headset-codec' missing or invalid\n"); - goto err_headset_codec; + of_node_put(playback_codec); + return dev_err_probe(dev, -EINVAL, + "Property 'headset-codec' missing or invalid\n"); } for_each_card_prelinks(card, i, dai_link) { ret = mt8186_mt6366_card_set_be_link(card, dai_link, playback_codec, "I2S3"); if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set playback_codec fail\n", + dev_err_probe(dev, ret, "%s set playback_codec fail\n", dai_link->name); - goto err_probe; + break; } ret = mt8186_mt6366_card_set_be_link(card, dai_link, headset_codec, "I2S0"); if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set headset_codec fail\n", + dev_err_probe(dev, ret, "%s set headset_codec fail\n", dai_link->name); - goto err_probe; + break; } ret = mt8186_mt6366_card_set_be_link(card, dai_link, headset_codec, "I2S1"); if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set headset_codec fail\n", + dev_err_probe(dev, ret, "%s set headset_codec fail\n", dai_link->name); - goto err_probe; + break; } + } + of_node_put(headset_codec); + of_node_put(playback_codec); - if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && sof_on) - dai_link->platforms->of_node = adsp_node; + return ret; +} - if (!dai_link->platforms->name && !dai_link->platforms->of_node) - dai_link->platforms->of_node = platform_node; - } +static int mt8186_mt6366_soc_card_probe(struct mtk_soc_card_data *soc_card_data, bool legacy) +{ + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = card_data->card; + struct snd_soc_dai_link *dai_link; + struct mt8186_mt6366_rt1019_rt5682s_priv *mach_priv; + int i, ret; + + mach_priv = devm_kzalloc(card->dev, sizeof(*mach_priv), GFP_KERNEL); + if (!mach_priv) + return -ENOMEM; - snd_soc_card_set_drvdata(card, soc_card_data); + soc_card_data->mach_priv = mach_priv; - ret = mt8186_afe_gpio_init(&pdev->dev); - if (ret) { - dev_err_probe(&pdev->dev, ret, "%s init gpio error\n", __func__); - goto err_probe; + mach_priv->dmic_sel = devm_gpiod_get_optional(card->dev, + "dmic", GPIOD_OUT_LOW); + if (IS_ERR(mach_priv->dmic_sel)) + return dev_err_probe(card->dev, PTR_ERR(mach_priv->dmic_sel), + "DMIC gpio failed\n"); + + for_each_card_prelinks(card, i, dai_link) { + if (strcmp(dai_link->name, "I2S0") == 0 || + strcmp(dai_link->name, "I2S1") == 0 || + strcmp(dai_link->name, "I2S2") == 0) { + if (card_data->flags & DA7219_CODEC_PRESENT) { + dai_link->be_hw_params_fixup = mt8186_i2s_hw_params_32le_fixup; + dai_link->ops = &mt8186_da7219_i2s_ops; + } else { + dai_link->be_hw_params_fixup = mt8186_i2s_hw_params_24le_fixup; + dai_link->ops = &mt8186_rt5682s_i2s_ops; + } + } else if (strcmp(dai_link->name, "I2S3") == 0) { + if (card_data->flags & DA7219_CODEC_PRESENT) + dai_link->be_hw_params_fixup = mt8186_i2s_hw_params_24le_fixup; + else + dai_link->be_hw_params_fixup = mt8186_i2s_hw_params_32le_fixup; + } } - ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) - dev_err_probe(&pdev->dev, ret, "%s snd_soc_register_card fail\n", __func__); + if (legacy) { + ret = mt8186_mt6366_legacy_probe(soc_card_data); + if (ret) + return ret; + } -err_probe: - of_node_put(headset_codec); -err_headset_codec: - of_node_put(playback_codec); -err_playback_codec: - of_node_put(platform_node); -err_platform_node: -err_adsp_node: - of_node_put(adsp_node); + ret = mt8186_afe_gpio_init(card->dev); + if (ret) + return dev_err_probe(card->dev, ret, "init AFE gpio error\n"); - return ret; + return 0; } +static const unsigned int mt8186_pcm_playback_channels[] = { 2 }; +static const unsigned int mt8186_pcm_capture_channels[] = { 1, 2 }; +static const unsigned int mt8186_pcm_rates[] = { 48000 }; + +static const struct snd_pcm_hw_constraint_list mt8186_rate_constraint = { + .list = mt8186_pcm_rates, + .count = ARRAY_SIZE(mt8186_pcm_rates) +}; + +static const struct mtk_pcm_constraints_data mt8186_pcm_constraints[MTK_CONSTRAINT_CAPTURE + 1] = { + [MTK_CONSTRAINT_PLAYBACK] = { + .channels = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8186_pcm_playback_channels, + .count = ARRAY_SIZE(mt8186_pcm_playback_channels) + }, + .rates = &mt8186_rate_constraint, + }, + [MTK_CONSTRAINT_CAPTURE] = { + .channels = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8186_pcm_capture_channels, + .count = ARRAY_SIZE(mt8186_pcm_capture_channels) + }, + .rates = &mt8186_rate_constraint, + } +}; + +static const struct mtk_sof_priv mt8186_sof_priv = { + .conn_streams = g_sof_conn_streams, + .num_streams = ARRAY_SIZE(g_sof_conn_streams), + .sof_dai_link_fixup = mt8186_sof_dai_link_fixup +}; + +static const struct mtk_soundcard_pdata mt8186_mt6366_da7219_max98357_pdata = { + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8186_mt6366_da7219_max98357_soc_card, + .num_jacks = MT8186_JACK_MAX, + .pcm_constraints = mt8186_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8186_pcm_constraints), + .flags = DA7219_CODEC_PRESENT, + }, + .sof_priv = &mt8186_sof_priv, + .soc_probe = mt8186_mt6366_soc_card_probe +}; + +static const struct mtk_soundcard_pdata mt8186_mt6366_rt1019_rt5682s_pdata = { + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8186_mt6366_rt1019_rt5682s_soc_card, + .num_jacks = MT8186_JACK_MAX, + .pcm_constraints = mt8186_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8186_pcm_constraints), + }, + .sof_priv = &mt8186_sof_priv, + .soc_probe = mt8186_mt6366_soc_card_probe +}; + +static const struct mtk_soundcard_pdata mt8186_mt6366_rt5682s_max98360_pdata = { + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8186_mt6366_rt5682s_max98360_soc_card, + .num_jacks = MT8186_JACK_MAX, + .pcm_constraints = mt8186_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8186_pcm_constraints), + }, + .sof_priv = &mt8186_sof_priv, + .soc_probe = mt8186_mt6366_soc_card_probe +}; + +static const struct mtk_soundcard_pdata mt8186_mt6366_rt5650_pdata = { + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8186_mt6366_rt5650_soc_card, + .num_jacks = MT8186_JACK_MAX, + .pcm_constraints = mt8186_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8186_pcm_constraints), + }, + .sof_priv = &mt8186_sof_priv, + .soc_probe = mt8186_mt6366_soc_card_probe +}; + #if IS_ENABLED(CONFIG_OF) -static const struct of_device_id mt8186_mt6366_rt1019_rt5682s_dt_match[] = { +static const struct of_device_id mt8186_mt6366_dt_match[] = { { .compatible = "mediatek,mt8186-mt6366-rt1019-rt5682s-sound", - .data = &mt8186_mt6366_rt1019_rt5682s_soc_card, + .data = &mt8186_mt6366_rt1019_rt5682s_pdata, }, { .compatible = "mediatek,mt8186-mt6366-rt5682s-max98360-sound", - .data = &mt8186_mt6366_rt5682s_max98360_soc_card, + .data = &mt8186_mt6366_rt5682s_max98360_pdata, }, { .compatible = "mediatek,mt8186-mt6366-rt5650-sound", - .data = &mt8186_mt6366_rt5650_soc_card, + .data = &mt8186_mt6366_rt5650_pdata, + }, + { + .compatible = "mediatek,mt8186-mt6366-da7219-max98357-sound", + .data = &mt8186_mt6366_da7219_max98357_pdata, }, - {} + { /* sentinel */ } }; -MODULE_DEVICE_TABLE(of, mt8186_mt6366_rt1019_rt5682s_dt_match); +MODULE_DEVICE_TABLE(of, mt8186_mt6366_dt_match); #endif -static struct platform_driver mt8186_mt6366_rt1019_rt5682s_driver = { +static struct platform_driver mt8186_mt6366_driver = { .driver = { - .name = "mt8186_mt6366_rt1019_rt5682s", + .name = "mt8186_mt6366", #if IS_ENABLED(CONFIG_OF) - .of_match_table = mt8186_mt6366_rt1019_rt5682s_dt_match, + .of_match_table = mt8186_mt6366_dt_match, #endif .pm = &snd_soc_pm_ops, }, - .probe = mt8186_mt6366_rt1019_rt5682s_dev_probe, + .probe = mtk_soundcard_common_probe, }; -module_platform_driver(mt8186_mt6366_rt1019_rt5682s_driver); +module_platform_driver(mt8186_mt6366_driver); /* Module information */ -MODULE_DESCRIPTION("MT8186-MT6366-RT1019-RT5682S ALSA SoC machine driver"); +MODULE_DESCRIPTION("MT8186-MT6366 ALSA SoC machine driver"); MODULE_AUTHOR("Jiaxin Yu <jiaxin.yu@mediatek.com>"); MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("mt8186_mt6366_rt1019_rt5682s soc card"); +MODULE_ALIAS("mt8186_mt6366 soc card"); diff --git a/sound/soc/mediatek/mt8188/Makefile b/sound/soc/mediatek/mt8188/Makefile index 781e61cbb22b..b9f3e4ad7b07 100644 --- a/sound/soc/mediatek/mt8188/Makefile +++ b/sound/soc/mediatek/mt8188/Makefile @@ -1,11 +1,12 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt8188-afe-objs := \ +snd-soc-mt8188-afe-y := \ mt8188-afe-clk.o \ mt8188-afe-pcm.o \ mt8188-audsys-clk.o \ mt8188-dai-adda.o \ + mt8188-dai-dmic.o \ mt8188-dai-etdm.o \ mt8188-dai-pcm.o diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c index e69c1bb2cb23..7f411b857782 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.c @@ -58,7 +58,15 @@ static const char *aud_clks[MT8188_CLK_NUM] = { [MT8188_CLK_AUD_ADC] = "aud_adc", [MT8188_CLK_AUD_DAC_HIRES] = "aud_dac_hires", [MT8188_CLK_AUD_A1SYS_HP] = "aud_a1sys_hp", + [MT8188_CLK_AUD_AFE_DMIC1] = "aud_afe_dmic1", + [MT8188_CLK_AUD_AFE_DMIC2] = "aud_afe_dmic2", + [MT8188_CLK_AUD_AFE_DMIC3] = "aud_afe_dmic3", + [MT8188_CLK_AUD_AFE_DMIC4] = "aud_afe_dmic4", [MT8188_CLK_AUD_ADC_HIRES] = "aud_adc_hires", + [MT8188_CLK_AUD_DMIC_HIRES1] = "aud_dmic_hires1", + [MT8188_CLK_AUD_DMIC_HIRES2] = "aud_dmic_hires2", + [MT8188_CLK_AUD_DMIC_HIRES3] = "aud_dmic_hires3", + [MT8188_CLK_AUD_DMIC_HIRES4] = "aud_dmic_hires4", [MT8188_CLK_AUD_I2SIN] = "aud_i2sin", [MT8188_CLK_AUD_TDM_IN] = "aud_tdm_in", [MT8188_CLK_AUD_I2S_OUT] = "aud_i2s_out", diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h index ec53c171c170..c6c78d684f3e 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-clk.h +++ b/sound/soc/mediatek/mt8188/mt8188-afe-clk.h @@ -54,7 +54,15 @@ enum { MT8188_CLK_AUD_ADC, MT8188_CLK_AUD_DAC_HIRES, MT8188_CLK_AUD_A1SYS_HP, + MT8188_CLK_AUD_AFE_DMIC1, + MT8188_CLK_AUD_AFE_DMIC2, + MT8188_CLK_AUD_AFE_DMIC3, + MT8188_CLK_AUD_AFE_DMIC4, MT8188_CLK_AUD_ADC_HIRES, + MT8188_CLK_AUD_DMIC_HIRES1, + MT8188_CLK_AUD_DMIC_HIRES2, + MT8188_CLK_AUD_DMIC_HIRES3, + MT8188_CLK_AUD_DMIC_HIRES4, MT8188_CLK_AUD_I2SIN, MT8188_CLK_AUD_TDM_IN, MT8188_CLK_AUD_I2S_OUT, diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-common.h b/sound/soc/mediatek/mt8188/mt8188-afe-common.h index 1304d685a306..01aa11242e29 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-common.h +++ b/sound/soc/mediatek/mt8188/mt8188-afe-common.h @@ -137,6 +137,7 @@ struct mt8188_afe_private { int mt8188_afe_fs_timing(unsigned int rate); /* dai register */ int mt8188_dai_adda_register(struct mtk_base_afe *afe); +int mt8188_dai_dmic_register(struct mtk_base_afe *afe); int mt8188_dai_etdm_register(struct mtk_base_afe *afe); int mt8188_dai_pcm_register(struct mtk_base_afe *afe); diff --git a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c index 46d6a5540403..ac4fdf8ba78f 100644 --- a/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c +++ b/sound/soc/mediatek/mt8188/mt8188-afe-pcm.c @@ -91,7 +91,7 @@ int mt8188_afe_fs_timing(unsigned int rate) static int mt8188_memif_fs(struct snd_pcm_substream *substream, unsigned int rate) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_component *component = NULL; struct mtk_base_afe *afe = NULL; struct mt8188_afe_private *afe_priv = NULL; @@ -300,7 +300,7 @@ static int mt8188_afe_enable_cm(struct mtk_base_afe *afe, static int mt8188_afe_fe_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_pcm_runtime *runtime = substream->runtime; struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); int id = snd_soc_rtd_to_cpu(rtd, 0)->id; @@ -334,7 +334,7 @@ static int mt8188_afe_fe_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); int id = snd_soc_rtd_to_cpu(rtd, 0)->id; struct mtk_base_afe_memif *memif = &afe->memif[id]; @@ -358,7 +358,7 @@ static int mt8188_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd, { struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); const struct mt8188_afe_channel_merge *cm = mt8188_afe_found_cm(dai); - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_pcm_runtime * const runtime = substream->runtime; int id = snd_soc_rtd_to_cpu(rtd, 0)->id; struct mtk_base_afe_memif *memif = &afe->memif[id]; @@ -652,6 +652,7 @@ static struct snd_soc_dai_driver mt8188_memif_dai_driver[] = { static const struct snd_kcontrol_new o002_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN2, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I004 Switch", AFE_CONN2, 4, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I012 Switch", AFE_CONN2, 12, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I020 Switch", AFE_CONN2, 20, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I022 Switch", AFE_CONN2, 22, 1, 0), @@ -662,6 +663,8 @@ static const struct snd_kcontrol_new o002_mix[] = { static const struct snd_kcontrol_new o003_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN3, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I005 Switch", AFE_CONN3, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I006 Switch", AFE_CONN3, 6, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I013 Switch", AFE_CONN3, 13, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I021 Switch", AFE_CONN3, 21, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I023 Switch", AFE_CONN3, 23, 1, 0), @@ -672,6 +675,8 @@ static const struct snd_kcontrol_new o003_mix[] = { static const struct snd_kcontrol_new o004_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN4, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I006 Switch", AFE_CONN4, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I008 Switch", AFE_CONN4, 8, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I014 Switch", AFE_CONN4, 14, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I024 Switch", AFE_CONN4, 24, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I074 Switch", AFE_CONN4_2, 10, 1, 0), @@ -679,6 +684,8 @@ static const struct snd_kcontrol_new o004_mix[] = { static const struct snd_kcontrol_new o005_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN5, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I007 Switch", AFE_CONN5, 7, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I010 Switch", AFE_CONN5, 10, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I015 Switch", AFE_CONN5, 15, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I025 Switch", AFE_CONN5, 25, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I075 Switch", AFE_CONN5_2, 11, 1, 0), @@ -686,6 +693,7 @@ static const struct snd_kcontrol_new o005_mix[] = { static const struct snd_kcontrol_new o006_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I000 Switch", AFE_CONN6, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I008 Switch", AFE_CONN6, 8, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I016 Switch", AFE_CONN6, 16, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I026 Switch", AFE_CONN6, 26, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I076 Switch", AFE_CONN6_2, 12, 1, 0), @@ -693,18 +701,21 @@ static const struct snd_kcontrol_new o006_mix[] = { static const struct snd_kcontrol_new o007_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("I001 Switch", AFE_CONN7, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I009 Switch", AFE_CONN7, 9, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I017 Switch", AFE_CONN7, 17, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I027 Switch", AFE_CONN7, 27, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I077 Switch", AFE_CONN7_2, 13, 1, 0), }; static const struct snd_kcontrol_new o008_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I010 Switch", AFE_CONN8, 10, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I018 Switch", AFE_CONN8, 18, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I028 Switch", AFE_CONN8, 28, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I078 Switch", AFE_CONN8_2, 14, 1, 0), }; static const struct snd_kcontrol_new o009_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I011 Switch", AFE_CONN9, 11, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I019 Switch", AFE_CONN9, 19, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I029 Switch", AFE_CONN9, 29, 1, 0), SOC_DAPM_SINGLE_AUTODISABLE("I079 Switch", AFE_CONN9_2, 15, 1, 0), @@ -1275,6 +1286,18 @@ static const struct snd_soc_dapm_route mt8188_memif_routes[] = { {"O002", "I070 Switch", "I070"}, {"O003", "I071 Switch", "I071"}, + {"O002", "I004 Switch", "I004"}, + {"O003", "I005 Switch", "I005"}, + {"O003", "I006 Switch", "I006"}, + {"O004", "I006 Switch", "I006"}, + {"O004", "I008 Switch", "I008"}, + {"O005", "I007 Switch", "I007"}, + {"O005", "I010 Switch", "I010"}, + {"O006", "I008 Switch", "I008"}, + {"O007", "I009 Switch", "I009"}, + {"O008", "I010 Switch", "I010"}, + {"O009", "I011 Switch", "I011"}, + {"O034", "I000 Switch", "I000"}, {"O035", "I001 Switch", "I001"}, {"O034", "I002 Switch", "I002"}, @@ -2748,6 +2771,7 @@ static bool mt8188_is_volatile_reg(struct device *dev, unsigned int reg) case AFE_ASRC12_NEW_CON9: case AFE_LRCK_CNT: case AFE_DAC_MON0: + case AFE_DAC_CON0: case AFE_DL2_CUR: case AFE_DL3_CUR: case AFE_DL6_CUR: @@ -2854,10 +2878,6 @@ static bool mt8188_is_volatile_reg(struct device *dev, unsigned int reg) case AFE_DMIC3_SRC_DEBUG_MON0: case AFE_DMIC3_UL_SRC_MON0: case AFE_DMIC3_UL_SRC_MON1: - case DMIC_GAIN1_CUR: - case DMIC_GAIN2_CUR: - case DMIC_GAIN3_CUR: - case DMIC_GAIN4_CUR: case ETDM_IN1_MONITOR: case ETDM_IN2_MONITOR: case ETDM_OUT1_MONITOR: @@ -3030,25 +3050,6 @@ skip_regmap: return 0; } -static int mt8188_afe_component_probe(struct snd_soc_component *component) -{ - struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); - int ret; - - snd_soc_component_init_regmap(component, afe->regmap); - - ret = mtk_afe_add_sub_dai_control(component); - - return ret; -} - -static const struct snd_soc_component_driver mt8188_afe_component = { - .name = AFE_PCM_NAME, - .pointer = mtk_afe_pcm_pointer, - .pcm_construct = mtk_afe_pcm_new, - .probe = mt8188_afe_component_probe, -}; - static int init_memif_priv_data(struct mtk_base_afe *afe) { struct mt8188_afe_private *afe_priv = afe->platform_priv; @@ -3094,6 +3095,7 @@ static int mt8188_dai_memif_register(struct mtk_base_afe *afe) typedef int (*dai_register_cb)(struct mtk_base_afe *); static const dai_register_cb dai_register_cbs[] = { mt8188_dai_adda_register, + mt8188_dai_dmic_register, mt8188_dai_etdm_register, mt8188_dai_pcm_register, mt8188_dai_memif_register, @@ -3350,7 +3352,7 @@ static int mt8188_afe_pcm_dev_probe(struct platform_device *pdev) } /* register component */ - ret = devm_snd_soc_register_component(dev, &mt8188_afe_component, + ret = devm_snd_soc_register_component(dev, &mtk_afe_pcm_platform, afe->dai_drivers, afe->num_dai_drivers); if (ret) { dev_warn(dev, "err_platform\n"); @@ -3379,15 +3381,15 @@ static const struct of_device_id mt8188_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt8188_afe_pcm_dt_match); static const struct dev_pm_ops mt8188_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt8188_afe_runtime_suspend, - mt8188_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt8188_afe_runtime_suspend, + mt8188_afe_runtime_resume, NULL) }; static struct platform_driver mt8188_afe_pcm_driver = { .driver = { .name = "mt8188-audio", .of_match_table = mt8188_afe_pcm_dt_match, - .pm = &mt8188_afe_pm_ops, + .pm = pm_ptr(&mt8188_afe_pm_ops), }, .probe = mt8188_afe_pcm_dev_probe, }; diff --git a/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c index c796ad8b62ee..40d2ab0a7677 100644 --- a/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c +++ b/sound/soc/mediatek/mt8188/mt8188-audsys-clk.c @@ -84,6 +84,10 @@ static const struct afe_gate aud_clks[CLK_AUD_NR_CLK] = { GATE_AUD1(CLK_AUD_AFE_26M_DMIC_TM, "aud_afe_26m_dmic_tm", "top_a1sys_hp", 14), GATE_AUD1(CLK_AUD_UL_TML_HIRES, "aud_ul_tml_hires", "top_audio_h", 16), GATE_AUD1(CLK_AUD_ADC_HIRES, "aud_adc_hires", "top_audio_h", 17), + GATE_AUD1(CLK_AUD_DMIC_HIRES1, "aud_dmic_hires1", "top_audio_h", 20), + GATE_AUD1(CLK_AUD_DMIC_HIRES2, "aud_dmic_hires2", "top_audio_h", 21), + GATE_AUD1(CLK_AUD_DMIC_HIRES3, "aud_dmic_hires3", "top_audio_h", 22), + GATE_AUD1(CLK_AUD_DMIC_HIRES4, "aud_dmic_hires4", "top_audio_h", 23), /* AUD3 */ GATE_AUD3(CLK_AUD_LINEIN_TUNER, "aud_linein_tuner", "top_apll5", 5), diff --git a/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h b/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h index 6f34ffc760e0..9cb732863c10 100644 --- a/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h +++ b/sound/soc/mediatek/mt8188/mt8188-audsys-clkid.h @@ -33,6 +33,10 @@ enum{ CLK_AUD_AFE_26M_DMIC_TM, CLK_AUD_UL_TML_HIRES, CLK_AUD_ADC_HIRES, + CLK_AUD_DMIC_HIRES1, + CLK_AUD_DMIC_HIRES2, + CLK_AUD_DMIC_HIRES3, + CLK_AUD_DMIC_HIRES4, CLK_AUD_LINEIN_TUNER, CLK_AUD_EARC_TUNER, CLK_AUD_I2SIN, diff --git a/sound/soc/mediatek/mt8188/mt8188-dai-adda.c b/sound/soc/mediatek/mt8188/mt8188-dai-adda.c index 7dc029f2b428..43670316611e 100644 --- a/sound/soc/mediatek/mt8188/mt8188-dai-adda.c +++ b/sound/soc/mediatek/mt8188/mt8188-dai-adda.c @@ -14,6 +14,7 @@ #include "mt8188-afe-clk.h" #include "mt8188-afe-common.h" #include "mt8188-reg.h" +#include "../common/mtk-dai-adda-common.h" #define ADDA_HIRES_THRES 48000 @@ -24,94 +25,10 @@ enum { SUPPLY_SEQ_ADDA_AFE_ON, }; -enum { - MTK_AFE_ADDA_DL_RATE_8K = 0, - MTK_AFE_ADDA_DL_RATE_11K = 1, - MTK_AFE_ADDA_DL_RATE_12K = 2, - MTK_AFE_ADDA_DL_RATE_16K = 3, - MTK_AFE_ADDA_DL_RATE_22K = 4, - MTK_AFE_ADDA_DL_RATE_24K = 5, - MTK_AFE_ADDA_DL_RATE_32K = 6, - MTK_AFE_ADDA_DL_RATE_44K = 7, - MTK_AFE_ADDA_DL_RATE_48K = 8, - MTK_AFE_ADDA_DL_RATE_96K = 9, - MTK_AFE_ADDA_DL_RATE_192K = 10, -}; - -enum { - MTK_AFE_ADDA_UL_RATE_8K = 0, - MTK_AFE_ADDA_UL_RATE_16K = 1, - MTK_AFE_ADDA_UL_RATE_32K = 2, - MTK_AFE_ADDA_UL_RATE_48K = 3, - MTK_AFE_ADDA_UL_RATE_96K = 4, - MTK_AFE_ADDA_UL_RATE_192K = 5, -}; - -enum { - DELAY_DATA_MISO1 = 0, - DELAY_DATA_MISO0 = 1, -}; - struct mtk_dai_adda_priv { bool hires_required; }; -static unsigned int afe_adda_dl_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_DL_RATE_8K; - case 11025: - return MTK_AFE_ADDA_DL_RATE_11K; - case 12000: - return MTK_AFE_ADDA_DL_RATE_12K; - case 16000: - return MTK_AFE_ADDA_DL_RATE_16K; - case 22050: - return MTK_AFE_ADDA_DL_RATE_22K; - case 24000: - return MTK_AFE_ADDA_DL_RATE_24K; - case 32000: - return MTK_AFE_ADDA_DL_RATE_32K; - case 44100: - return MTK_AFE_ADDA_DL_RATE_44K; - case 48000: - return MTK_AFE_ADDA_DL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_DL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_DL_RATE_192K; - default: - dev_info(afe->dev, "%s(), rate %u invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_DL_RATE_48K; - } -} - -static unsigned int afe_adda_ul_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_UL_RATE_8K; - case 16000: - return MTK_AFE_ADDA_UL_RATE_16K; - case 32000: - return MTK_AFE_ADDA_UL_RATE_32K; - case 48000: - return MTK_AFE_ADDA_UL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_UL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_UL_RATE_192K; - default: - dev_info(afe->dev, "%s(), rate %u invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_UL_RATE_48K; - } -} - static int mt8188_adda_mtkaif_init(struct mtk_base_afe *afe) { struct mt8188_afe_private *afe_priv = afe->platform_priv; @@ -146,7 +63,6 @@ static int mt8188_adda_mtkaif_init(struct mtk_base_afe *afe) param->mtkaif_phase_cycle[MT8188_MTKAIF_MISO_0]; } - val = 0; mask = (MTKAIF_RXIF_DELAY_DATA | MTKAIF_RXIF_DELAY_CYCLE_MASK); val |= FIELD_PREP(MTKAIF_RXIF_DELAY_CYCLE_MASK, delay_cycle); val |= FIELD_PREP(MTKAIF_RXIF_DELAY_DATA, delay_data); @@ -440,7 +356,7 @@ static int mtk_dai_da_configure(struct mtk_base_afe *afe, /* set sampling rate */ mask |= DL_2_INPUT_MODE_CTL_MASK; val |= FIELD_PREP(DL_2_INPUT_MODE_CTL_MASK, - afe_adda_dl_rate_transform(afe, rate)); + mtk_adda_dl_rate_transform(afe, rate)); /* turn off saturation */ mask |= DL_2_CH1_SATURATION_EN_CTL; @@ -474,7 +390,7 @@ static int mtk_dai_ad_configure(struct mtk_base_afe *afe, mask = UL_VOICE_MODE_CTL_MASK; val = FIELD_PREP(UL_VOICE_MODE_CTL_MASK, - afe_adda_ul_rate_transform(afe, rate)); + mtk_adda_ul_rate_transform(afe, rate)); regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, mask, val); diff --git a/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c b/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c new file mode 100644 index 000000000000..adcea7818be2 --- /dev/null +++ b/sound/soc/mediatek/mt8188/mt8188-dai-dmic.c @@ -0,0 +1,683 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek ALSA SoC Audio DAI DMIC I/F Control + * + * Copyright (c) 2020 MediaTek Inc. + * Author: Bicycle Tsai <bicycle.tsai@mediatek.com> + * Trevor Wu <trevor.wu@mediatek.com> + * Parker Yang <parker.yang@mediatek.com> + */ + +#include <linux/delay.h> +#include <linux/pm_runtime.h> +#include <linux/regmap.h> +#include <sound/pcm_params.h> +#include "mt8188-afe-clk.h" +#include "mt8188-afe-common.h" +#include "mt8188-reg.h" + +/* DMIC HW Gain configuration maximum value. */ +#define DMIC_GAIN_MAX_STEP GENMASK(19, 0) +#define DMIC_GAIN_MAX_PER_STEP GENMASK(7, 0) +#define DMIC_GAIN_MAX_TARGET GENMASK(27, 0) +#define DMIC_GAIN_MAX_CURRENT GENMASK(27, 0) + +#define CLK_PHASE_SEL_CH1 0 +#define CLK_PHASE_SEL_CH2 ((CLK_PHASE_SEL_CH1) + 4) + +#define DMIC1_SRC_SEL 0 +#define DMIC2_SRC_SEL 0 +#define DMIC3_SRC_SEL 2 +#define DMIC4_SRC_SEL 0 +#define DMIC5_SRC_SEL 4 +#define DMIC6_SRC_SEL 0 +#define DMIC7_SRC_SEL 6 +#define DMIC8_SRC_SEL 0 + +enum { + SUPPLY_SEQ_DMIC_GAIN, + SUPPLY_SEQ_DMIC_CK, +}; + +enum { + DMIC0, + DMIC1, + DMIC2, + DMIC3, + DMIC_NUM, +}; + +struct mtk_dai_dmic_ctrl_reg { + unsigned int con0; +}; + +struct mtk_dai_dmic_hw_gain_ctrl_reg { + unsigned int bypass; + unsigned int con0; +}; + +struct mtk_dai_dmic_priv { + unsigned int gain_on[DMIC_NUM]; + unsigned int channels; + bool hires_required; +}; + +static const struct mtk_dai_dmic_ctrl_reg dmic_ctrl_regs[DMIC_NUM] = { + [DMIC0] = { + .con0 = AFE_DMIC0_UL_SRC_CON0, + }, + [DMIC1] = { + .con0 = AFE_DMIC1_UL_SRC_CON0, + }, + [DMIC2] = { + .con0 = AFE_DMIC2_UL_SRC_CON0, + }, + [DMIC3] = { + .con0 = AFE_DMIC3_UL_SRC_CON0, + }, +}; + +static const struct mtk_dai_dmic_ctrl_reg *get_dmic_ctrl_reg(int id) +{ + if (id < 0 || id >= DMIC_NUM) + return NULL; + + return &dmic_ctrl_regs[id]; +} + +static const struct mtk_dai_dmic_hw_gain_ctrl_reg + dmic_hw_gain_ctrl_regs[DMIC_NUM] = { + [DMIC0] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN1_CON0, + }, + [DMIC1] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN2_CON0, + }, + [DMIC2] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN3_CON0, + }, + [DMIC3] = { + .bypass = DMIC_BYPASS_HW_GAIN, + .con0 = DMIC_GAIN4_CON0, + }, +}; + +static const struct mtk_dai_dmic_hw_gain_ctrl_reg + *get_dmic_hw_gain_ctrl_reg(struct mtk_base_afe *afe, int id) +{ + if ((id < 0) || (id >= DMIC_NUM)) { + dev_dbg(afe->dev, "%s invalid id\n", __func__); + return NULL; + } + + return &dmic_hw_gain_ctrl_regs[id]; +} + +static void mtk_dai_dmic_hw_gain_bypass(struct mtk_base_afe *afe, + unsigned int id, bool bypass) +{ + const struct mtk_dai_dmic_hw_gain_ctrl_reg *reg; + unsigned int msk; + + reg = get_dmic_hw_gain_ctrl_reg(afe, id); + if (!reg) + return; + + switch (id) { + case DMIC0: + msk = DMIC_BYPASS_HW_GAIN_DMIC1_BYPASS; + break; + case DMIC1: + msk = DMIC_BYPASS_HW_GAIN_DMIC2_BYPASS; + break; + case DMIC2: + msk = DMIC_BYPASS_HW_GAIN_DMIC3_BYPASS; + break; + case DMIC3: + msk = DMIC_BYPASS_HW_GAIN_DMIC4_BYPASS; + break; + default: + return; + } + + if (bypass) + regmap_set_bits(afe->regmap, reg->bypass, msk); + else + regmap_clear_bits(afe->regmap, reg->bypass, msk); +} + +static void mtk_dai_dmic_hw_gain_on(struct mtk_base_afe *afe, unsigned int id, + bool on) +{ + const struct mtk_dai_dmic_hw_gain_ctrl_reg *reg = get_dmic_hw_gain_ctrl_reg(afe, id); + + if (!reg) + return; + + if (on) + regmap_set_bits(afe->regmap, reg->con0, DMIC_GAIN_CON0_GAIN_ON); + else + regmap_clear_bits(afe->regmap, reg->con0, DMIC_GAIN_CON0_GAIN_ON); +} + +static const struct reg_sequence mtk_dai_dmic_iir_coeff_reg_defaults[] = { + { AFE_DMIC0_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC0_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC0_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC0_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC0_IIR_COEF_10_09, 0x0000C048 }, + { AFE_DMIC1_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC1_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC1_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC1_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC1_IIR_COEF_10_09, 0x0000C048 }, + { AFE_DMIC2_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC2_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC2_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC2_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC2_IIR_COEF_10_09, 0x0000C048 }, + { AFE_DMIC3_IIR_COEF_02_01, 0x00000000 }, + { AFE_DMIC3_IIR_COEF_04_03, 0x00003FB8 }, + { AFE_DMIC3_IIR_COEF_06_05, 0x3FB80000 }, + { AFE_DMIC3_IIR_COEF_08_07, 0x3FB80000 }, + { AFE_DMIC3_IIR_COEF_10_09, 0x0000C048 }, +}; + +static int mtk_dai_dmic_load_iir_coeff_table(struct mtk_base_afe *afe) +{ + return regmap_multi_reg_write(afe->regmap, + mtk_dai_dmic_iir_coeff_reg_defaults, + ARRAY_SIZE(mtk_dai_dmic_iir_coeff_reg_defaults)); +} + +static int mtk_dai_dmic_configure_array(struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + const u32 mask = PWR2_TOP_CON_DMIC8_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC7_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC6_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC5_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC4_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC3_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC2_SRC_SEL_MASK | + PWR2_TOP_CON_DMIC1_SRC_SEL_MASK; + const u32 val = PWR2_TOP_CON_DMIC8_SRC_SEL_VAL(DMIC8_SRC_SEL) | + PWR2_TOP_CON_DMIC7_SRC_SEL_VAL(DMIC7_SRC_SEL) | + PWR2_TOP_CON_DMIC6_SRC_SEL_VAL(DMIC6_SRC_SEL) | + PWR2_TOP_CON_DMIC5_SRC_SEL_VAL(DMIC5_SRC_SEL) | + PWR2_TOP_CON_DMIC4_SRC_SEL_VAL(DMIC4_SRC_SEL) | + PWR2_TOP_CON_DMIC3_SRC_SEL_VAL(DMIC3_SRC_SEL) | + PWR2_TOP_CON_DMIC2_SRC_SEL_VAL(DMIC2_SRC_SEL) | + PWR2_TOP_CON_DMIC1_SRC_SEL_VAL(DMIC1_SRC_SEL); + + return regmap_update_bits(afe->regmap, PWR2_TOP_CON0, mask, val); +} + +/* This function assumes that the caller checked that channels is valid */ +static u8 mtk_dmic_channels_to_dmic_number(unsigned int channels) +{ + switch (channels) { + case 1: + return DMIC0; + case 2: + return DMIC1; + case 3: + return DMIC2; + case 4: + default: + return DMIC3; + } +} + +static void mtk_dai_dmic_hw_gain_enable(struct mtk_base_afe *afe, + unsigned int channels, bool enable) +{ + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + u8 dmic_num; + int i; + + dmic_num = mtk_dmic_channels_to_dmic_number(channels); + for (i = dmic_num; i >= DMIC0; i--) { + if (enable && dmic_priv->gain_on[i]) { + mtk_dai_dmic_hw_gain_bypass(afe, i, false); + mtk_dai_dmic_hw_gain_on(afe, i, true); + } else { + mtk_dai_dmic_hw_gain_on(afe, i, false); + mtk_dai_dmic_hw_gain_bypass(afe, i, true); + } + } +} + +static int mtk_dmic_gain_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int channels = dmic_priv->channels; + + dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n", + __func__, w->name, event); + + if (!channels) + return -EINVAL; + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + mtk_dai_dmic_hw_gain_enable(afe, channels, true); + break; + case SND_SOC_DAPM_POST_PMD: + mtk_dai_dmic_hw_gain_enable(afe, channels, false); + break; + default: + break; + } + + return 0; +} + +static int mtk_dmic_event(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, + int event) +{ + struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + const struct mtk_dai_dmic_ctrl_reg *reg = NULL; + unsigned int channels = dmic_priv->channels; + unsigned int msk; + u8 dmic_num; + int i; + + dev_dbg(afe->dev, "%s(), name %s, event 0x%x\n", + __func__, w->name, event); + + if (!channels) + return -EINVAL; + + dmic_num = mtk_dmic_channels_to_dmic_number(channels); + + switch (event) { + case SND_SOC_DAPM_PRE_PMU: + /* request fifo soft rst */ + msk = 0; + for (i = dmic_num; i >= DMIC0; i--) + msk |= PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(i); + + regmap_set_bits(afe->regmap, PWR2_TOP_CON1, msk); + + msk = AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL | + AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL | + AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL | + AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL; + + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) + regmap_set_bits(afe->regmap, reg->con0, msk); + } + break; + case SND_SOC_DAPM_POST_PMU: + msk = AFE_DMIC_UL_SRC_CON0_UL_SRC_ON_TMP_CTL; + + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) + regmap_set_bits(afe->regmap, reg->con0, msk); + } + + if (dmic_priv->hires_required) { + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]); + } + + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]); + mt8188_afe_enable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]); + + /* release fifo soft rst */ + msk = 0; + for (i = dmic_num; i >= DMIC0; i--) + msk |= PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(i); + + regmap_clear_bits(afe->regmap, PWR2_TOP_CON1, msk); + break; + case SND_SOC_DAPM_PRE_PMD: + msk = AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL | + AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL | + AFE_DMIC_UL_SRC_CON0_UL_SRC_ON_TMP_CTL | + AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL | + AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL; + + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) + regmap_set_bits(afe->regmap, reg->con0, msk); + } + break; + case SND_SOC_DAPM_POST_PMD: + /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ + usleep_range(125, 126); + + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC1]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC2]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC3]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_AFE_DMIC4]); + + if (dmic_priv->hires_required) { + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES1]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES2]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES3]); + mt8188_afe_disable_clk(afe, afe_priv->clk[MT8188_CLK_AUD_DMIC_HIRES4]); + } + break; + default: + break; + } + + return 0; +} + +static int mtk_dai_dmic_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int rate = params_rate(params); + unsigned int channels = params_channels(params); + const struct mtk_dai_dmic_ctrl_reg *reg = NULL; + u32 val = AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH1(CLK_PHASE_SEL_CH1) | + AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_CH2(CLK_PHASE_SEL_CH2) | + AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL(0); + const u32 msk = AFE_DMIC_UL_SRC_CON0_UL_TWO_WIRE_MODE_CTL | + AFE_DMIC_UL_SRC_CON0_UL_PHASE_SEL_MASK | + AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL_MASK | + AFE_DMIC_UL_VOICE_MODE_MASK; + u8 dmic_num; + int ret; + int i; + + if (!channels || channels > 8) + return -EINVAL; + + ret = mtk_dai_dmic_configure_array(dai); + if (ret < 0) + return ret; + + ret = mtk_dai_dmic_load_iir_coeff_table(afe); + if (ret < 0) + return ret; + + switch (rate) { + case 96000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_96K; + dmic_priv->hires_required = 1; + break; + case 48000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_48K; + dmic_priv->hires_required = 0; + break; + case 32000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_32K; + dmic_priv->hires_required = 0; + break; + case 16000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_16K; + dmic_priv->hires_required = 0; + break; + case 8000: + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_8K; + dmic_priv->hires_required = 0; + break; + default: + dev_dbg(afe->dev, "%s invalid rate %u, use 48000Hz\n", __func__, rate); + val |= AFE_DMIC_UL_CON0_VOCIE_MODE_48K; + dmic_priv->hires_required = 0; + break; + } + + dmic_num = mtk_dmic_channels_to_dmic_number(channels); + for (i = dmic_num; i >= DMIC0; i--) { + reg = get_dmic_ctrl_reg(i); + if (reg) { + ret = regmap_update_bits(afe->regmap, reg->con0, msk, val); + if (ret < 0) + return ret; + } + } + + dmic_priv->channels = channels; + + return 0; +} + +static const struct snd_soc_dai_ops mtk_dai_dmic_ops = { + .hw_params = mtk_dai_dmic_hw_params, +}; + +#define MTK_DMIC_RATES (SNDRV_PCM_RATE_8000 |\ + SNDRV_PCM_RATE_16000 |\ + SNDRV_PCM_RATE_32000 |\ + SNDRV_PCM_RATE_48000 |\ + SNDRV_PCM_RATE_96000) + +#define MTK_DMIC_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\ + SNDRV_PCM_FMTBIT_S32_LE) + +static struct snd_soc_dai_driver mtk_dai_dmic_driver[] = { + { + .name = "DMIC", + .id = MT8188_AFE_IO_DMIC_IN, + .capture = { + .stream_name = "DMIC Capture", + .channels_min = 1, + .channels_max = 8, + .rates = MTK_DMIC_RATES, + .formats = MTK_DMIC_FORMATS, + }, + .ops = &mtk_dai_dmic_ops, + }, +}; + +static const struct snd_soc_dapm_widget mtk_dai_dmic_widgets[] = { + SND_SOC_DAPM_MIXER("I004", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I005", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I006", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I007", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I008", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I009", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I010", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I011", SND_SOC_NOPM, 0, 0, NULL, 0), + + SND_SOC_DAPM_SUPPLY_S("DMIC_GAIN_ON", SUPPLY_SEQ_DMIC_GAIN, + SND_SOC_NOPM, 0, 0, + mtk_dmic_gain_event, + SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), + SND_SOC_DAPM_SUPPLY_S("DMIC_CK_ON", SUPPLY_SEQ_DMIC_CK, + PWR2_TOP_CON1, + PWR2_TOP_CON1_DMIC_CKDIV_ON_SHIFT, 0, + mtk_dmic_event, + SND_SOC_DAPM_PRE_POST_PMU | + SND_SOC_DAPM_PRE_POST_PMD), + SND_SOC_DAPM_INPUT("DMIC_INPUT"), +}; + +static const struct snd_soc_dapm_route mtk_dai_dmic_routes[] = { + {"I004", NULL, "DMIC Capture"}, + {"I005", NULL, "DMIC Capture"}, + {"I006", NULL, "DMIC Capture"}, + {"I007", NULL, "DMIC Capture"}, + {"I008", NULL, "DMIC Capture"}, + {"I009", NULL, "DMIC Capture"}, + {"I010", NULL, "DMIC Capture"}, + {"I011", NULL, "DMIC Capture"}, + {"DMIC Capture", NULL, "DMIC_CK_ON"}, + {"DMIC Capture", NULL, "DMIC_GAIN_ON"}, + {"DMIC Capture", NULL, "DMIC_INPUT"}, +}; + +static const char * const mt8188_dmic_gain_enable_text[] = { + "Bypass", "Connect", +}; + +static SOC_ENUM_SINGLE_EXT_DECL(dmic_gain_on_enum, + mt8188_dmic_gain_enable_text); + +static int mtk_dai_dmic_hw_gain_ctrl_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_kcontrol_chip(kcontrol); + struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int source = ucontrol->value.enumerated.item[0]; + unsigned int *cached; + + if (source >= e->items) + return -EINVAL; + + if (!strcmp(kcontrol->id.name, "DMIC1_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[0]; + else if (!strcmp(kcontrol->id.name, "DMIC2_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[1]; + else if (!strcmp(kcontrol->id.name, "DMIC3_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[2]; + else if (!strcmp(kcontrol->id.name, "DMIC4_HW_GAIN_EN")) + cached = &dmic_priv->gain_on[3]; + else + return -EINVAL; + + if (source == *cached) + return 0; + + *cached = source; + return 1; +} + +static int mtk_dai_dmic_hw_gain_ctrl_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv = afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN]; + unsigned int val; + + if (!strcmp(kcontrol->id.name, "DMIC1_HW_GAIN_EN")) + val = dmic_priv->gain_on[0]; + else if (!strcmp(kcontrol->id.name, "DMIC2_HW_GAIN_EN")) + val = dmic_priv->gain_on[1]; + else if (!strcmp(kcontrol->id.name, "DMIC3_HW_GAIN_EN")) + val = dmic_priv->gain_on[2]; + else if (!strcmp(kcontrol->id.name, "DMIC4_HW_GAIN_EN")) + val = dmic_priv->gain_on[3]; + else + return -EINVAL; + + ucontrol->value.enumerated.item[0] = val; + return 0; +} + +static const struct snd_kcontrol_new mtk_dai_dmic_controls[] = { + SOC_ENUM_EXT("DMIC1_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_ENUM_EXT("DMIC2_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_ENUM_EXT("DMIC3_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_ENUM_EXT("DMIC4_HW_GAIN_EN", dmic_gain_on_enum, + mtk_dai_dmic_hw_gain_ctrl_get, + mtk_dai_dmic_hw_gain_ctrl_put), + SOC_SINGLE("DMIC1_HW_GAIN_TARGET", DMIC_GAIN1_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC2_HW_GAIN_TARGET", DMIC_GAIN2_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC3_HW_GAIN_TARGET", DMIC_GAIN3_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC4_HW_GAIN_TARGET", DMIC_GAIN4_CON1, + 0, DMIC_GAIN_MAX_TARGET, 0), + SOC_SINGLE("DMIC1_HW_GAIN_CURRENT", DMIC_GAIN1_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC2_HW_GAIN_CURRENT", DMIC_GAIN2_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC3_HW_GAIN_CURRENT", DMIC_GAIN3_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC4_HW_GAIN_CURRENT", DMIC_GAIN4_CUR, + 0, DMIC_GAIN_MAX_CURRENT, 0), + SOC_SINGLE("DMIC1_HW_GAIN_UP_STEP", DMIC_GAIN1_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC2_HW_GAIN_UP_STEP", DMIC_GAIN2_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC3_HW_GAIN_UP_STEP", DMIC_GAIN3_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC4_HW_GAIN_UP_STEP", DMIC_GAIN4_CON3, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC1_HW_GAIN_DOWN_STEP", DMIC_GAIN1_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC2_HW_GAIN_DOWN_STEP", DMIC_GAIN2_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC3_HW_GAIN_DOWN_STEP", DMIC_GAIN3_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC4_HW_GAIN_DOWN_STEP", DMIC_GAIN4_CON2, + 0, DMIC_GAIN_MAX_STEP, 0), + SOC_SINGLE("DMIC1_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN1_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), + SOC_SINGLE("DMIC2_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN2_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), + SOC_SINGLE("DMIC3_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN3_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), + SOC_SINGLE("DMIC4_HW_GAIN_SAMPLE_PER_STEP", DMIC_GAIN4_CON0, + DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT, DMIC_GAIN_MAX_PER_STEP, 0), +}; + +static int init_dmic_priv_data(struct mtk_base_afe *afe) +{ + struct mt8188_afe_private *afe_priv = afe->platform_priv; + struct mtk_dai_dmic_priv *dmic_priv; + + dmic_priv = devm_kzalloc(afe->dev, sizeof(struct mtk_dai_dmic_priv), + GFP_KERNEL); + if (!dmic_priv) + return -ENOMEM; + + afe_priv->dai_priv[MT8188_AFE_IO_DMIC_IN] = dmic_priv; + return 0; +} + +int mt8188_dai_dmic_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + + list_add(&dai->list, &afe->sub_dais); + + dai->dai_drivers = mtk_dai_dmic_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_dmic_driver); + dai->dapm_widgets = mtk_dai_dmic_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_dmic_widgets); + dai->dapm_routes = mtk_dai_dmic_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_dmic_routes); + dai->controls = mtk_dai_dmic_controls; + dai->num_controls = ARRAY_SIZE(mtk_dai_dmic_controls); + + return init_dmic_priv_data(afe); +} diff --git a/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c b/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c index 2a48f5fd6826..69a091dad88d 100644 --- a/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c +++ b/sound/soc/mediatek/mt8188/mt8188-dai-etdm.c @@ -2422,7 +2422,6 @@ static int mtk_dai_hdmitx_dptx_hw_params(struct snd_pcm_substream *substream, unsigned int channels = params_channels(params); snd_pcm_format_t format = params_format(params); int width = snd_pcm_format_physical_width(format); - int ret; if (!is_valid_etdm_dai(dai->id)) return -EINVAL; @@ -2450,9 +2449,7 @@ static int mtk_dai_hdmitx_dptx_hw_params(struct snd_pcm_substream *substream, etdm_data->data_mode = MTK_DAI_ETDM_DATA_MULTI_PIN; } - ret = mtk_dai_etdm_configure(afe, rate, channels, width, dai->id); - - return ret; + return mtk_dai_etdm_configure(afe, rate, channels, width, dai->id); } static int mtk_dai_hdmitx_dptx_set_sysclk(struct snd_soc_dai *dai, diff --git a/sound/soc/mediatek/mt8188/mt8188-dai-pcm.c b/sound/soc/mediatek/mt8188/mt8188-dai-pcm.c index 5bc854a8f3df..8ca7cc75e21d 100644 --- a/sound/soc/mediatek/mt8188/mt8188-dai-pcm.c +++ b/sound/soc/mediatek/mt8188/mt8188-dai-pcm.c @@ -128,7 +128,7 @@ static int mtk_dai_pcm_configure(struct snd_pcm_substream *substream, unsigned int lrck_inv; unsigned int bck_inv; unsigned int fmt; - unsigned int bit_width = dai->sample_bits; + unsigned int bit_width = dai->symmetric_sample_bits; unsigned int val = 0; unsigned int mask = 0; int fs = 0; diff --git a/sound/soc/mediatek/mt8188/mt8188-mt6359.c b/sound/soc/mediatek/mt8188/mt8188-mt6359.c index a391066ab204..a2a76b6df631 100644 --- a/sound/soc/mediatek/mt8188/mt8188-mt6359.c +++ b/sound/soc/mediatek/mt8188/mt8188-mt6359.c @@ -17,6 +17,7 @@ #include "mt8188-afe-common.h" #include "../../codecs/nau8825.h" #include "../../codecs/mt6359.h" +#include "../../codecs/mt6359-accdet.h" #include "../../codecs/rt5682.h" #include "../common/mtk-afe-platform-driver.h" #include "../common/mtk-soundcard-driver.h" @@ -150,6 +151,11 @@ SND_SOC_DAILINK_DEFS(dl_src, "mt6359-snd-codec-aif1")), DAILINK_COMP_ARRAY(COMP_EMPTY())); +SND_SOC_DAILINK_DEFS(DMIC_BE, + DAILINK_COMP_ARRAY(COMP_CPU("DMIC")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + SND_SOC_DAILINK_DEFS(dptx, DAILINK_COMP_ARRAY(COMP_CPU("DPTX")), DAILINK_COMP_ARRAY(COMP_DUMMY()), @@ -188,9 +194,7 @@ SND_SOC_DAILINK_DEFS(pcm1, SND_SOC_DAILINK_DEFS(ul_src, DAILINK_COMP_ARRAY(COMP_CPU("UL_SRC")), DAILINK_COMP_ARRAY(COMP_CODEC("mt6359-sound", - "mt6359-snd-codec-aif1"), - COMP_CODEC("dmic-codec", - "dmic-hifi")), + "mt6359-snd-codec-aif1")), DAILINK_COMP_ARRAY(COMP_EMPTY())); SND_SOC_DAILINK_DEFS(AFE_SOF_DL2, @@ -236,11 +240,11 @@ static const struct sof_conn_stream g_sof_conn_streams[] = { }, }; -struct mt8188_mt6359_priv { - struct snd_soc_jack dp_jack; - struct snd_soc_jack hdmi_jack; - struct snd_soc_jack headset_jack; - void *private_data; +enum mt8188_jacks { + MT8188_JACK_HEADSET, + MT8188_JACK_DP, + MT8188_JACK_HDMI, + MT8188_JACK_MAX, }; static struct snd_soc_jack_pin mt8188_hdmi_jack_pins[] = { @@ -268,9 +272,15 @@ static struct snd_soc_jack_pin nau8825_jack_pins[] = { }, }; -struct mt8188_card_data { - const char *name; - unsigned long quirk; +static struct snd_soc_jack_pin mt8188_headset_jack_pins[] = { + { + .pin = "Headphone", + .mask = SND_JACK_HEADPHONE, + }, + { + .pin = "Headset Mic", + .mask = SND_JACK_MICROPHONE, + }, }; static const struct snd_kcontrol_new mt8188_dumb_spk_controls[] = { @@ -304,6 +314,7 @@ static const struct snd_soc_dapm_widget mt8188_rear_spk_widgets[] = { static const struct snd_soc_dapm_widget mt8188_mt6359_widgets[] = { SND_SOC_DAPM_HP("Headphone", NULL), SND_SOC_DAPM_MIC("Headset Mic", NULL), + SND_SOC_DAPM_MIC("AP DMIC", NULL), SND_SOC_DAPM_SINK("HDMI"), SND_SOC_DAPM_SINK("DP"), SND_SOC_DAPM_MIXER(SOF_DMA_DL2, SND_SOC_NOPM, 0, 0, NULL, 0), @@ -507,6 +518,35 @@ static int mt8188_mt6359_mtkaif_calibration(struct snd_soc_pcm_runtime *rtd) return 0; } +static int mt8188_mt6359_accdet_init(struct snd_soc_pcm_runtime *rtd) +{ + struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8188_JACK_HEADSET]; + int ret; + + if (!soc_card_data->accdet) + return 0; + + ret = snd_soc_card_jack_new_pins(rtd->card, "Headset Jack", + SND_JACK_HEADSET | SND_JACK_BTN_0 | + SND_JACK_BTN_1 | SND_JACK_BTN_2 | + SND_JACK_BTN_3, + jack, mt8188_headset_jack_pins, + ARRAY_SIZE(mt8188_headset_jack_pins)); + if (ret) { + dev_err(rtd->dev, "Headset Jack create failed: %d\n", ret); + return ret; + } + + ret = mt6359_accdet_enable_jack_detect(soc_card_data->accdet, jack); + if (ret) { + dev_err(rtd->dev, "Headset Jack enable failed: %d\n", ret); + return ret; + } + + return 0; +} + static int mt8188_mt6359_init(struct snd_soc_pcm_runtime *rtd) { struct snd_soc_component *cmpnt_codec = @@ -519,6 +559,8 @@ static int mt8188_mt6359_init(struct snd_soc_pcm_runtime *rtd) /* mtkaif calibration */ mt8188_mt6359_mtkaif_calibration(rtd); + mt8188_mt6359_accdet_init(rtd); + return 0; } @@ -540,6 +582,7 @@ enum { DAI_LINK_UL9_FE, DAI_LINK_UL10_FE, DAI_LINK_DL_SRC_BE, + DAI_LINK_DMIC_BE, DAI_LINK_DPTX_BE, DAI_LINK_ETDM1_IN_BE, DAI_LINK_ETDM2_IN_BE, @@ -562,7 +605,7 @@ enum { static int mt8188_dptx_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); unsigned int rate = params_rate(params); unsigned int mclk_fs_ratio = 256; unsigned int mclk_fs = rate * mclk_fs_ratio; @@ -590,12 +633,12 @@ static int mt8188_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, static int mt8188_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) { struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); - struct mt8188_mt6359_priv *priv = soc_card_data->mach_priv; + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8188_JACK_HDMI]; struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component; int ret = 0; ret = snd_soc_card_jack_new_pins(rtd->card, "HDMI Jack", - SND_JACK_LINEOUT, &priv->hdmi_jack, + SND_JACK_LINEOUT, jack, mt8188_hdmi_jack_pins, ARRAY_SIZE(mt8188_hdmi_jack_pins)); if (ret) { @@ -603,7 +646,7 @@ static int mt8188_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) return ret; } - ret = snd_soc_component_set_jack(component, &priv->hdmi_jack, NULL); + ret = snd_soc_component_set_jack(component, jack, NULL); if (ret) { dev_err(rtd->dev, "%s, set jack failed on %s (ret=%d)\n", __func__, component->name, ret); @@ -616,19 +659,19 @@ static int mt8188_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) static int mt8188_dptx_codec_init(struct snd_soc_pcm_runtime *rtd) { struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); - struct mt8188_mt6359_priv *priv = soc_card_data->mach_priv; + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8188_JACK_DP]; struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component; int ret = 0; ret = snd_soc_card_jack_new_pins(rtd->card, "DP Jack", SND_JACK_LINEOUT, - &priv->dp_jack, mt8188_dp_jack_pins, + jack, mt8188_dp_jack_pins, ARRAY_SIZE(mt8188_dp_jack_pins)); if (ret) { dev_err(rtd->dev, "%s, new jack failed: %d\n", __func__, ret); return ret; } - ret = snd_soc_component_set_jack(component, &priv->dp_jack, NULL); + ret = snd_soc_component_set_jack(component, jack, NULL); if (ret) { dev_err(rtd->dev, "%s, set jack failed on %s (ret=%d)\n", __func__, component->name, ret); @@ -663,7 +706,7 @@ static int mt8188_dumb_amp_init(struct snd_soc_pcm_runtime *rtd) static int mt8188_max98390_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); unsigned int bit_width = params_width(params); struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); struct snd_soc_dai *codec_dai; @@ -736,10 +779,10 @@ static int mt8188_max98390_codec_init(struct snd_soc_pcm_runtime *rtd) static int mt8188_headset_codec_init(struct snd_soc_pcm_runtime *rtd) { struct snd_soc_card *card = rtd->card; - struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); - struct mt8188_mt6359_priv *priv = soc_card_data->mach_priv; + struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8188_JACK_HEADSET]; struct snd_soc_component *component = snd_soc_rtd_to_codec(rtd, 0)->component; - struct snd_soc_jack *jack = &priv->headset_jack; + struct mtk_platform_card_data *card_data = soc_card_data->card_data; int ret; ret = snd_soc_dapm_new_controls(&card->dapm, mt8188_nau8825_widgets, @@ -768,10 +811,18 @@ static int mt8188_headset_codec_init(struct snd_soc_pcm_runtime *rtd) return ret; } - snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); - snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); - snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); - snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); + if (card_data->flags & ES8326_HS_PRESENT) { + snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); + snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOLUMEUP); + snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEDOWN); + snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOICECOMMAND); + } else { + snd_jack_set_key(jack->jack, SND_JACK_BTN_0, KEY_PLAYPAUSE); + snd_jack_set_key(jack->jack, SND_JACK_BTN_1, KEY_VOICECOMMAND); + snd_jack_set_key(jack->jack, SND_JACK_BTN_2, KEY_VOLUMEUP); + snd_jack_set_key(jack->jack, SND_JACK_BTN_3, KEY_VOLUMEDOWN); + } + ret = snd_soc_component_set_jack(component, jack, NULL); if (ret) { @@ -827,7 +878,7 @@ static const struct snd_soc_ops mt8188_nau8825_ops = { static int mt8188_rt5682s_i2s_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_card *card = rtd->card; struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0); @@ -929,7 +980,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, .dpcm_merged_format = 1, @@ -943,7 +994,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, .dpcm_merged_format = 1, @@ -957,7 +1008,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, .dpcm_merged_format = 1, @@ -971,7 +1022,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_PRE, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback7), }, [DAI_LINK_DL8_FE] = { @@ -982,7 +1033,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback8), }, [DAI_LINK_DL10_FE] = { @@ -993,7 +1044,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback10), }, [DAI_LINK_DL11_FE] = { @@ -1004,7 +1055,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback11), }, [DAI_LINK_UL1_FE] = { @@ -1015,7 +1066,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_PRE, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture1), }, [DAI_LINK_UL2_FE] = { @@ -1026,7 +1077,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture2), }, [DAI_LINK_UL3_FE] = { @@ -1037,7 +1088,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture3), }, [DAI_LINK_UL4_FE] = { @@ -1048,7 +1099,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, .dpcm_merged_format = 1, @@ -1062,7 +1113,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, .dpcm_merged_chan = 1, .dpcm_merged_rate = 1, .dpcm_merged_format = 1, @@ -1076,7 +1127,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_PRE, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture6), }, [DAI_LINK_UL8_FE] = { @@ -1087,7 +1138,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture8), }, [DAI_LINK_UL9_FE] = { @@ -1098,7 +1149,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture9), }, [DAI_LINK_UL10_FE] = { @@ -1109,22 +1160,29 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture10), }, /* BE */ [DAI_LINK_DL_SRC_BE] = { .name = "DL_SRC_BE", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(dl_src), }, + [DAI_LINK_DMIC_BE] = { + .name = "DMIC_BE", + .no_pcm = 1, + .capture_only = 1, + .ignore_suspend = 1, + SND_SOC_DAILINK_REG(DMIC_BE), + }, [DAI_LINK_DPTX_BE] = { .name = "DPTX_BE", .ops = &mt8188_dptx_ops, .be_hw_params_fixup = mt8188_dptx_hw_params_fixup, .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(dptx), }, [DAI_LINK_ETDM1_IN_BE] = { @@ -1133,7 +1191,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBP_CFP, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(etdm1_in), }, @@ -1143,7 +1201,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBP_CFP, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(etdm2_in), }, [DAI_LINK_ETDM1_OUT_BE] = { @@ -1152,7 +1210,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBC_CFC, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(etdm1_out), }, [DAI_LINK_ETDM2_OUT_BE] = { @@ -1161,7 +1219,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBC_CFC, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(etdm2_out), }, [DAI_LINK_ETDM3_OUT_BE] = { @@ -1170,7 +1228,7 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBC_CFC, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(etdm3_out), }, [DAI_LINK_PCM1_BE] = { @@ -1179,14 +1237,12 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBC_CFC, - .dpcm_playback = 1, - .dpcm_capture = 1, SND_SOC_DAILINK_REG(pcm1), }, [DAI_LINK_UL_SRC_BE] = { .name = "UL_SRC_BE", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(ul_src), }, @@ -1194,28 +1250,28 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { [DAI_LINK_SOF_DL2_BE] = { .name = "AFE_SOF_DL2", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8188_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_DL2), }, [DAI_LINK_SOF_DL3_BE] = { .name = "AFE_SOF_DL3", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8188_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_DL3), }, [DAI_LINK_SOF_UL4_BE] = { .name = "AFE_SOF_UL4", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8188_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_UL4), }, [DAI_LINK_SOF_UL5_BE] = { .name = "AFE_SOF_UL5", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8188_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_UL5), }, @@ -1224,11 +1280,10 @@ static struct snd_soc_dai_link mt8188_mt6359_dai_links[] = { static void mt8188_fixup_controls(struct snd_soc_card *card) { struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(card); - struct mt8188_mt6359_priv *priv = soc_card_data->mach_priv; - struct mt8188_card_data *card_data = (struct mt8188_card_data *)priv->private_data; + struct mtk_platform_card_data *card_data = soc_card_data->card_data; struct snd_kcontrol *kctl; - if (card_data->quirk & (NAU8825_HS_PRESENT | RT5682S_HS_PRESENT | ES8326_HS_PRESENT)) { + if (card_data->flags & (NAU8825_HS_PRESENT | RT5682S_HS_PRESENT | ES8326_HS_PRESENT)) { struct snd_soc_dapm_widget *w, *next_w; for_each_card_widgets_safe(card, w, next_w) { @@ -1259,14 +1314,10 @@ static struct snd_soc_card mt8188_mt6359_soc_card = { .fixup_controls = mt8188_fixup_controls, }; -static int mt8188_mt6359_dev_probe(struct platform_device *pdev) +static int mt8188_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data, bool legacy) { - struct snd_soc_card *card = &mt8188_mt6359_soc_card; - struct device_node *platform_node; - struct device_node *adsp_node; - struct mtk_soc_card_data *soc_card_data; - struct mt8188_mt6359_priv *priv; - struct mt8188_card_data *card_data; + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = soc_card_data->card_data->card; struct snd_soc_dai_link *dai_link; bool init_mt6359 = false; bool init_es8326 = false; @@ -1274,96 +1325,19 @@ static int mt8188_mt6359_dev_probe(struct platform_device *pdev) bool init_rt5682s = false; bool init_max98390 = false; bool init_dumb = false; - int ret, i; - - card_data = (struct mt8188_card_data *)of_device_get_match_data(&pdev->dev); - card->dev = &pdev->dev; - - ret = snd_soc_of_parse_card_name(card, "model"); - if (ret) - return dev_err_probe(&pdev->dev, ret, "%s new card name parsing error\n", - __func__); - - if (!card->name) - card->name = card_data->name; - - if (of_property_read_bool(pdev->dev.of_node, "audio-routing")) { - ret = snd_soc_of_parse_audio_routing(card, "audio-routing"); - if (ret) - return ret; - } - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; - - soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*card_data), GFP_KERNEL); - if (!soc_card_data) - return -ENOMEM; - - soc_card_data->mach_priv = priv; - - adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); - if (adsp_node) { - struct mtk_sof_priv *sof_priv; - - sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL); - if (!sof_priv) { - ret = -ENOMEM; - goto err_adsp_node; - } - sof_priv->conn_streams = g_sof_conn_streams; - sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams); - soc_card_data->sof_priv = sof_priv; - card->probe = mtk_sof_card_probe; - card->late_probe = mtk_sof_card_late_probe; - if (!card->topology_shortname_created) { - snprintf(card->topology_shortname, 32, "sof-%s", card->name); - card->topology_shortname_created = true; - } - card->name = card->topology_shortname; - } - - if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) { - ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, - "mediatek,dai-link", - mt8188_mt6359_dai_links, - ARRAY_SIZE(mt8188_mt6359_dai_links)); - if (ret) { - dev_err_probe(&pdev->dev, ret, "Parse dai-link fail\n"); - goto err_adsp_node; - } - } else { - if (!adsp_node) - card->num_links = DAI_LINK_REGULAR_NUM; - } - - platform_node = of_parse_phandle(pdev->dev.of_node, - "mediatek,platform", 0); - if (!platform_node) { - ret = dev_err_probe(&pdev->dev, -EINVAL, - "Property 'platform' missing or invalid\n"); - goto err_adsp_node; - - } + int i; - ret = parse_dai_link_info(card); - if (ret) - goto err; + if (legacy) + return -EINVAL; for_each_card_prelinks(card, i, dai_link) { - if (!dai_link->platforms->name) { - if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && adsp_node) - dai_link->platforms->of_node = adsp_node; - else - dai_link->platforms->of_node = platform_node; - } - if (strcmp(dai_link->name, "DPTX_BE") == 0) { - if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) + if (dai_link->num_codecs && + !snd_soc_dlc_is_dummy(dai_link->codecs)) dai_link->init = mt8188_dptx_codec_init; } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { - if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) + if (dai_link->num_codecs && + !snd_soc_dlc_is_dummy(dai_link->codecs)) dai_link->init = mt8188_hdmi_codec_init; } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 || strcmp(dai_link->name, "UL_SRC_BE") == 0) { @@ -1375,13 +1349,16 @@ static int mt8188_mt6359_dev_probe(struct platform_device *pdev) strcmp(dai_link->name, "ETDM2_OUT_BE") == 0 || strcmp(dai_link->name, "ETDM1_IN_BE") == 0 || strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { + if (!dai_link->num_codecs) + continue; + if (!strcmp(dai_link->codecs->dai_name, MAX98390_CODEC_DAI)) { /* * The TDM protocol settings with fixed 4 slots are defined in * mt8188_max98390_ops. Two amps is I2S mode, * SOC and codec don't require TDM settings. */ - if (!(card_data->quirk & MAX98390_TWO_AMP)) { + if (!(card_data->flags & MAX98390_TWO_AMP)) { dai_link->ops = &mt8188_max98390_ops; } if (!init_max98390) { @@ -1410,7 +1387,7 @@ static int mt8188_mt6359_dev_probe(struct platform_device *pdev) init_es8326 = true; } } else { - if (strcmp(dai_link->codecs->dai_name, "snd-soc-dummy-dai")) { + if (!snd_soc_dlc_is_dummy(dai_link->codecs)) { if (!init_dumb) { dai_link->init = mt8188_dumb_amp_init; init_dumb = true; @@ -1420,40 +1397,55 @@ static int mt8188_mt6359_dev_probe(struct platform_device *pdev) } } - priv->private_data = card_data; - snd_soc_card_set_drvdata(card, soc_card_data); - - ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) - dev_err_probe(&pdev->dev, ret, "%s snd_soc_register_card fail\n", - __func__); -err: - of_node_put(platform_node); - clean_card_reference(card); - -err_adsp_node: - of_node_put(adsp_node); - - return ret; + return 0; } -static struct mt8188_card_data mt8188_evb_card = { - .name = "mt8188_mt6359", +static const struct mtk_sof_priv mt8188_sof_priv = { + .conn_streams = g_sof_conn_streams, + .num_streams = ARRAY_SIZE(g_sof_conn_streams), }; -static struct mt8188_card_data mt8188_nau8825_card = { - .name = "mt8188_nau8825", - .quirk = NAU8825_HS_PRESENT, +static const struct mtk_soundcard_pdata mt8188_evb_card = { + .card_name = "mt8188_mt6359", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8188_mt6359_soc_card, + .num_jacks = MT8188_JACK_MAX, + }, + .sof_priv = &mt8188_sof_priv, + .soc_probe = mt8188_mt6359_soc_card_probe, }; -static struct mt8188_card_data mt8188_rt5682s_card = { - .name = "mt8188_rt5682s", - .quirk = RT5682S_HS_PRESENT | MAX98390_TWO_AMP, +static const struct mtk_soundcard_pdata mt8188_nau8825_card = { + .card_name = "mt8188_nau8825", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8188_mt6359_soc_card, + .num_jacks = MT8188_JACK_MAX, + .flags = NAU8825_HS_PRESENT + }, + .sof_priv = &mt8188_sof_priv, + .soc_probe = mt8188_mt6359_soc_card_probe, }; -static struct mt8188_card_data mt8188_es8326_card = { - .name = "mt8188_es8326", - .quirk = ES8326_HS_PRESENT | MAX98390_TWO_AMP, +static const struct mtk_soundcard_pdata mt8188_rt5682s_card = { + .card_name = "mt8188_rt5682s", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8188_mt6359_soc_card, + .num_jacks = MT8188_JACK_MAX, + .flags = RT5682S_HS_PRESENT | MAX98390_TWO_AMP + }, + .sof_priv = &mt8188_sof_priv, + .soc_probe = mt8188_mt6359_soc_card_probe, +}; + +static const struct mtk_soundcard_pdata mt8188_es8326_card = { + .card_name = "mt8188_es8326", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8188_mt6359_soc_card, + .num_jacks = MT8188_JACK_MAX, + .flags = ES8326_HS_PRESENT | MAX98390_TWO_AMP + }, + .sof_priv = &mt8188_sof_priv, + .soc_probe = mt8188_mt6359_soc_card_probe, }; static const struct of_device_id mt8188_mt6359_dt_match[] = { @@ -1471,7 +1463,7 @@ static struct platform_driver mt8188_mt6359_driver = { .of_match_table = mt8188_mt6359_dt_match, .pm = &snd_soc_pm_ops, }, - .probe = mt8188_mt6359_dev_probe, + .probe = mtk_soundcard_common_probe, }; module_platform_driver(mt8188_mt6359_driver); diff --git a/sound/soc/mediatek/mt8188/mt8188-reg.h b/sound/soc/mediatek/mt8188/mt8188-reg.h index bdd885419ff3..2e9c65de249d 100644 --- a/sound/soc/mediatek/mt8188/mt8188-reg.h +++ b/sound/soc/mediatek/mt8188/mt8188-reg.h @@ -2837,9 +2837,20 @@ #define PWR2_TOP_CON_DMIC3_SRC_SEL_MASK GENMASK(16, 14) #define PWR2_TOP_CON_DMIC2_SRC_SEL_MASK GENMASK(13, 11) #define PWR2_TOP_CON_DMIC1_SRC_SEL_MASK GENMASK(10, 8) +#define PWR2_TOP_CON_DMIC8_SRC_SEL_VAL(x) ((x) << 29) +#define PWR2_TOP_CON_DMIC7_SRC_SEL_VAL(x) ((x) << 26) +#define PWR2_TOP_CON_DMIC6_SRC_SEL_VAL(x) ((x) << 23) +#define PWR2_TOP_CON_DMIC5_SRC_SEL_VAL(x) ((x) << 20) +#define PWR2_TOP_CON_DMIC4_SRC_SEL_VAL(x) ((x) << 17) +#define PWR2_TOP_CON_DMIC3_SRC_SEL_VAL(x) ((x) << 14) +#define PWR2_TOP_CON_DMIC2_SRC_SEL_VAL(x) ((x) << 11) +#define PWR2_TOP_CON_DMIC1_SRC_SEL_VAL(x) ((x) << 8) /* PWR2_TOP_CON1 */ -#define PWR2_TOP_CON1_DMIC_CKDIV_ON BIT(1) +#define PWR2_TOP_CON1_DMIC_FIFO_SOFT_RST_EN(x) BIT(5 + 6 * (x)) +#define PWR2_TOP_CON1_DMIC_CKDIV_ON BIT(1) +#define PWR2_TOP_CON1_DMIC_CKDIV_ON_SHIFT 1 + /* PCM_INTF_CON1 */ #define PCM_INTF_CON1_SYNC_OUT_INV BIT(23) @@ -2921,13 +2932,14 @@ #define AFE_DMIC_UL_SRC_CON0_UL_TWO_WIRE_MODE_CTL BIT(23) #define AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH2_CTL BIT(22) #define AFE_DMIC_UL_SRC_CON0_UL_MODE_3P25M_CH1_CTL BIT(21) - +#define AFE_DMIC_UL_VOICE_MODE(x) (((x) & GENMASK(2, 0)) << 17) #define AFE_DMIC_UL_VOICE_MODE_MASK GENMASK(19, 17) #define AFE_DMIC_UL_CON0_VOCIE_MODE_8K AFE_DMIC_UL_VOICE_MODE(0) #define AFE_DMIC_UL_CON0_VOCIE_MODE_16K AFE_DMIC_UL_VOICE_MODE(1) #define AFE_DMIC_UL_CON0_VOCIE_MODE_32K AFE_DMIC_UL_VOICE_MODE(2) #define AFE_DMIC_UL_CON0_VOCIE_MODE_48K AFE_DMIC_UL_VOICE_MODE(3) #define AFE_DMIC_UL_CON0_VOCIE_MODE_96K AFE_DMIC_UL_VOICE_MODE(4) +#define AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL(x) (((x) & GENMASK(2, 0)) << 7) #define AFE_DMIC_UL_SRC_CON0_UL_IIR_MODE_CTL_MASK GENMASK(9, 7) #define AFE_DMIC_UL_SRC_CON0_UL_IIR_ON_TMP_CTL BIT(10) #define AFE_DMIC_UL_SRC_CON0_UL_SDM_3_LEVEL_CTL BIT(1) @@ -2944,6 +2956,7 @@ /* DMIC_GAINx_CON0 */ #define DMIC_GAIN_CON0_GAIN_ON BIT(0) +#define DMIC_GAIN_CON0_SAMPLE_PER_STEP_SHIFT 8 #define DMIC_GAIN_CON0_SAMPLE_PER_STEP_MASK GENMASK(15, 8) /* DMIC_GAINx_CON1 */ diff --git a/sound/soc/mediatek/mt8192/Makefile b/sound/soc/mediatek/mt8192/Makefile index 8b27d82626ea..d60c36bcdcce 100644 --- a/sound/soc/mediatek/mt8192/Makefile +++ b/sound/soc/mediatek/mt8192/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt8192-afe-objs := \ +snd-soc-mt8192-afe-y := \ mt8192-afe-pcm.o \ mt8192-afe-clk.o \ mt8192-afe-gpio.o \ diff --git a/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c b/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c index bdd1e91824d9..fd6af74d7995 100644 --- a/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c +++ b/sound/soc/mediatek/mt8192/mt8192-afe-pcm.c @@ -2125,22 +2125,6 @@ skip_regmap: return 0; } -static int mt8192_afe_component_probe(struct snd_soc_component *component) -{ - return mtk_afe_add_sub_dai_control(component); -} - -static const struct snd_soc_component_driver mt8192_afe_component = { - .name = AFE_PCM_NAME, - .probe = mt8192_afe_component_probe, - .pointer = mtk_afe_pcm_pointer, - .pcm_construct = mtk_afe_pcm_new, -}; - -static const struct snd_soc_component_driver mt8192_afe_pcm_component = { - .name = "mt8192-afe-pcm-dai", -}; - static int mt8192_dai_memif_register(struct mtk_base_afe *afe) { struct mtk_base_afe_dai *dai; @@ -2174,27 +2158,26 @@ static int mt8192_afe_pcm_dev_probe(struct platform_device *pdev) { struct mtk_base_afe *afe; struct mt8192_afe_private *afe_priv; - struct device *dev; + struct device *dev = &pdev->dev; struct reset_control *rstc; int i, ret, irq_id; - ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(34)); + ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(34)); if (ret) return ret; - afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL); + afe = devm_kzalloc(dev, sizeof(*afe), GFP_KERNEL); if (!afe) return -ENOMEM; platform_set_drvdata(pdev, afe); - afe->platform_priv = devm_kzalloc(&pdev->dev, sizeof(*afe_priv), + afe->platform_priv = devm_kzalloc(dev, sizeof(*afe_priv), GFP_KERNEL); if (!afe->platform_priv) return -ENOMEM; afe_priv = afe->platform_priv; - afe->dev = &pdev->dev; - dev = afe->dev; + afe->dev = dev; /* init audio related clock */ ret = mt8192_init_clock(afe); @@ -2205,46 +2188,36 @@ static int mt8192_afe_pcm_dev_probe(struct platform_device *pdev) /* reset controller to reset audio regs before regmap cache */ rstc = devm_reset_control_get_exclusive(dev, "audiosys"); - if (IS_ERR(rstc)) { - ret = PTR_ERR(rstc); - dev_err(dev, "could not get audiosys reset:%d\n", ret); - return ret; - } + if (IS_ERR(rstc)) + return dev_err_probe(dev, PTR_ERR(rstc), "could not get audiosys reset\n"); ret = reset_control_reset(rstc); - if (ret) { - dev_err(dev, "failed to trigger audio reset:%d\n", ret); - return ret; - } + if (ret) + return dev_err_probe(dev, ret, "failed to trigger audio reset\n"); - pm_runtime_enable(&pdev->dev); - if (!pm_runtime_enabled(&pdev->dev)) - goto err_pm_disable; + ret = devm_pm_runtime_enable(dev); + if (ret) + return ret; /* regmap init */ afe->regmap = syscon_node_to_regmap(dev->parent->of_node); - if (IS_ERR(afe->regmap)) { - dev_err(dev, "could not get regmap from parent\n"); - ret = PTR_ERR(afe->regmap); - goto err_pm_disable; - } + if (IS_ERR(afe->regmap)) + return dev_err_probe(dev, PTR_ERR(afe->regmap), + "could not get regmap from parent"); + ret = regmap_attach_dev(dev, afe->regmap, &mt8192_afe_regmap_config); - if (ret) { - dev_warn(dev, "regmap_attach_dev fail, ret %d\n", ret); - goto err_pm_disable; - } + if (ret) + return dev_err_probe(dev, ret, "regmap_attach_dev fail\n"); /* enable clock for regcache get default value from hw */ afe_priv->pm_runtime_bypass_reg_ctl = true; - pm_runtime_get_sync(&pdev->dev); + pm_runtime_get_sync(dev); ret = regmap_reinit_cache(afe->regmap, &mt8192_afe_regmap_config); - if (ret) { - dev_err(dev, "regmap_reinit_cache fail, ret %d\n", ret); - goto err_pm_disable; - } + if (ret) + return dev_err_probe(dev, ret, "regmap_reinit_cache fail\n"); - pm_runtime_put_sync(&pdev->dev); + pm_runtime_put_sync(dev); afe_priv->pm_runtime_bypass_reg_ctl = false; regcache_cache_only(afe->regmap, true); @@ -2254,10 +2227,8 @@ static int mt8192_afe_pcm_dev_probe(struct platform_device *pdev) afe->memif_size = MT8192_MEMIF_NUM; afe->memif = devm_kcalloc(dev, afe->memif_size, sizeof(*afe->memif), GFP_KERNEL); - if (!afe->memif) { - ret = -ENOMEM; - goto err_pm_disable; - } + if (!afe->memif) + return -ENOMEM; for (i = 0; i < afe->memif_size; i++) { afe->memif[i].data = &memif_data[i]; @@ -2271,47 +2242,35 @@ static int mt8192_afe_pcm_dev_probe(struct platform_device *pdev) afe->irqs_size = MT8192_IRQ_NUM; afe->irqs = devm_kcalloc(dev, afe->irqs_size, sizeof(*afe->irqs), GFP_KERNEL); - if (!afe->irqs) { - ret = -ENOMEM; - goto err_pm_disable; - } + if (!afe->irqs) + return -ENOMEM; for (i = 0; i < afe->irqs_size; i++) afe->irqs[i].irq_data = &irq_data[i]; /* request irq */ irq_id = platform_get_irq(pdev, 0); - if (irq_id < 0) { - ret = irq_id; - goto err_pm_disable; - } + if (irq_id < 0) + return irq_id; ret = devm_request_irq(dev, irq_id, mt8192_afe_irq_handler, IRQF_TRIGGER_NONE, "asys-isr", (void *)afe); - if (ret) { - dev_err(dev, "could not request_irq for Afe_ISR_Handle\n"); - goto err_pm_disable; - } + if (ret) + return dev_err_probe(dev, ret, "could not request_irq for Afe_ISR_Handle\n"); /* init sub_dais */ INIT_LIST_HEAD(&afe->sub_dais); for (i = 0; i < ARRAY_SIZE(dai_register_cbs); i++) { ret = dai_register_cbs[i](afe); - if (ret) { - dev_warn(afe->dev, "dai register i %d fail, ret %d\n", - i, ret); - goto err_pm_disable; - } + if (ret) + return dev_err_probe(afe->dev, ret, "dai %d register fail", i); } /* init dai_driver and component_driver */ ret = mtk_afe_combine_sub_dai(afe); - if (ret) { - dev_warn(afe->dev, "mtk_afe_combine_sub_dai fail, ret %d\n", - ret); - goto err_pm_disable; - } + if (ret) + return dev_err_probe(afe->dev, ret, "mtk_afe_combine_sub_dai fail\n"); /* others */ afe->mtk_afe_hardware = &mt8192_afe_hardware; @@ -2325,28 +2284,14 @@ static int mt8192_afe_pcm_dev_probe(struct platform_device *pdev) afe->runtime_suspend = mt8192_afe_runtime_suspend; /* register platform */ - ret = devm_snd_soc_register_component(&pdev->dev, - &mt8192_afe_component, NULL, 0); - if (ret) { - dev_warn(dev, "err_platform\n"); - goto err_pm_disable; - } - - ret = devm_snd_soc_register_component(&pdev->dev, - &mt8192_afe_pcm_component, + ret = devm_snd_soc_register_component(dev, + &mtk_afe_pcm_platform, afe->dai_drivers, afe->num_dai_drivers); - if (ret) { - dev_warn(dev, "err_dai_component\n"); - goto err_pm_disable; - } + if (ret) + return dev_err_probe(dev, ret, "Couldn't register AFE component\n"); return 0; - -err_pm_disable: - pm_runtime_disable(&pdev->dev); - - return ret; } static void mt8192_afe_pcm_dev_remove(struct platform_device *pdev) @@ -2368,18 +2313,18 @@ static const struct of_device_id mt8192_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt8192_afe_pcm_dt_match); static const struct dev_pm_ops mt8192_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt8192_afe_runtime_suspend, - mt8192_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt8192_afe_runtime_suspend, + mt8192_afe_runtime_resume, NULL) }; static struct platform_driver mt8192_afe_pcm_driver = { .driver = { .name = "mt8192-audio", .of_match_table = mt8192_afe_pcm_dt_match, - .pm = &mt8192_afe_pm_ops, + .pm = pm_ptr(&mt8192_afe_pm_ops), }, .probe = mt8192_afe_pcm_dev_probe, - .remove_new = mt8192_afe_pcm_dev_remove, + .remove = mt8192_afe_pcm_dev_remove, }; module_platform_driver(mt8192_afe_pcm_driver); diff --git a/sound/soc/mediatek/mt8192/mt8192-dai-adda.c b/sound/soc/mediatek/mt8192/mt8192-dai-adda.c index 36d33032a37a..99de85b87643 100644 --- a/sound/soc/mediatek/mt8192/mt8192-dai-adda.c +++ b/sound/soc/mediatek/mt8192/mt8192-dai-adda.c @@ -13,6 +13,7 @@ #include "mt8192-afe-common.h" #include "mt8192-afe-gpio.h" #include "mt8192-interconnection.h" +#include "../common/mtk-dai-adda-common.h" enum { UL_IIR_SW = 0, @@ -35,93 +36,8 @@ enum { AUDIO_SDM_3RD, }; -enum { - DELAY_DATA_MISO1 = 0, - DELAY_DATA_MISO2, -}; - -enum { - MTK_AFE_ADDA_DL_RATE_8K = 0, - MTK_AFE_ADDA_DL_RATE_11K = 1, - MTK_AFE_ADDA_DL_RATE_12K = 2, - MTK_AFE_ADDA_DL_RATE_16K = 3, - MTK_AFE_ADDA_DL_RATE_22K = 4, - MTK_AFE_ADDA_DL_RATE_24K = 5, - MTK_AFE_ADDA_DL_RATE_32K = 6, - MTK_AFE_ADDA_DL_RATE_44K = 7, - MTK_AFE_ADDA_DL_RATE_48K = 8, - MTK_AFE_ADDA_DL_RATE_96K = 9, - MTK_AFE_ADDA_DL_RATE_192K = 10, -}; - -enum { - MTK_AFE_ADDA_UL_RATE_8K = 0, - MTK_AFE_ADDA_UL_RATE_16K = 1, - MTK_AFE_ADDA_UL_RATE_32K = 2, - MTK_AFE_ADDA_UL_RATE_48K = 3, - MTK_AFE_ADDA_UL_RATE_96K = 4, - MTK_AFE_ADDA_UL_RATE_192K = 5, - MTK_AFE_ADDA_UL_RATE_48K_HD = 6, -}; - #define SDM_AUTO_RESET_THRESHOLD 0x190000 -static unsigned int adda_dl_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_DL_RATE_8K; - case 11025: - return MTK_AFE_ADDA_DL_RATE_11K; - case 12000: - return MTK_AFE_ADDA_DL_RATE_12K; - case 16000: - return MTK_AFE_ADDA_DL_RATE_16K; - case 22050: - return MTK_AFE_ADDA_DL_RATE_22K; - case 24000: - return MTK_AFE_ADDA_DL_RATE_24K; - case 32000: - return MTK_AFE_ADDA_DL_RATE_32K; - case 44100: - return MTK_AFE_ADDA_DL_RATE_44K; - case 48000: - return MTK_AFE_ADDA_DL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_DL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_DL_RATE_192K; - default: - dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_DL_RATE_48K; - } -} - -static unsigned int adda_ul_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_UL_RATE_8K; - case 16000: - return MTK_AFE_ADDA_UL_RATE_16K; - case 32000: - return MTK_AFE_ADDA_UL_RATE_32K; - case 48000: - return MTK_AFE_ADDA_UL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_UL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_UL_RATE_192K; - default: - dev_warn(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_UL_RATE_48K; - } -} - /* dai component */ static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = { SOC_DAPM_SINGLE_AUTODISABLE("DL1_CH1", AFE_CONN3, I_DL1_CH1, 1, 0), @@ -1156,7 +1072,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, unsigned int dl_src2_con1 = 0; /* set sampling rate */ - dl_src2_con0 = adda_dl_rate_transform(afe, rate) << + dl_src2_con0 = mtk_adda_dl_rate_transform(afe, rate) << DL_2_INPUT_MODE_CTL_SFT; /* set output mode, UP_SAMPLING_RATE_X8 */ @@ -1246,7 +1162,7 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream, unsigned int voice_mode = 0; unsigned int ul_src_con0 = 0; /* default value */ - voice_mode = adda_ul_rate_transform(afe, rate); + voice_mode = mtk_adda_ul_rate_transform(afe, rate); ul_src_con0 |= (voice_mode << 17) & (0x7 << 17); diff --git a/sound/soc/mediatek/mt8192/mt8192-dai-tdm.c b/sound/soc/mediatek/mt8192/mt8192-dai-tdm.c index 9ce06821c7d0..49440db370af 100644 --- a/sound/soc/mediatek/mt8192/mt8192-dai-tdm.c +++ b/sound/soc/mediatek/mt8192/mt8192-dai-tdm.c @@ -566,10 +566,10 @@ static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream, tdm_con |= 1 << DELAY_DATA_SFT; tdm_con |= get_tdm_lrck_width(format) << LRCK_TDM_WIDTH_SFT; } else if (tdm_priv->tdm_out_mode == TDM_OUT_DSP_A) { - tdm_con |= 0 << DELAY_DATA_SFT; + tdm_con |= 1 << DELAY_DATA_SFT; tdm_con |= 0 << LRCK_TDM_WIDTH_SFT; } else if (tdm_priv->tdm_out_mode == TDM_OUT_DSP_B) { - tdm_con |= 1 << DELAY_DATA_SFT; + tdm_con |= 0 << DELAY_DATA_SFT; tdm_con |= 0 << LRCK_TDM_WIDTH_SFT; } diff --git a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c index bfcb2c486c39..bf483a8fb34a 100644 --- a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c +++ b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c @@ -20,6 +20,8 @@ #include "../../codecs/rt1015.h" #include "../../codecs/rt5682.h" #include "../common/mtk-afe-platform-driver.h" +#include "../common/mtk-soc-card.h" +#include "../common/mtk-soundcard-driver.h" #include "mt8192-afe-common.h" #include "mt8192-afe-clk.h" #include "mt8192-afe-gpio.h" @@ -38,9 +40,10 @@ #define RT1015P_RT5682_OF_NAME "mediatek,mt8192_mt6359_rt1015p_rt5682" #define RT1015P_RT5682S_OF_NAME "mediatek,mt8192_mt6359_rt1015p_rt5682s" -struct mt8192_mt6359_priv { - struct snd_soc_jack headset_jack; - struct snd_soc_jack hdmi_jack; +enum mt8192_jacks { + MT8192_JACK_HEADSET, + MT8192_JACK_HDMI, + MT8192_JACK_MAX, }; /* Headset jack detection DAPM pins */ @@ -323,13 +326,13 @@ static int mt8192_mt6359_init(struct snd_soc_pcm_runtime *rtd) static int mt8192_rt5682_init(struct snd_soc_pcm_runtime *rtd) { + struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8192_JACK_HEADSET]; struct snd_soc_component *cmpnt_afe = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct snd_soc_component *cmpnt_codec = snd_soc_rtd_to_codec(rtd, 0)->component; - struct mt8192_mt6359_priv *priv = snd_soc_card_get_drvdata(rtd->card); - struct snd_soc_jack *jack = &priv->headset_jack; int ret; ret = mt8192_dai_i2s_set_share(afe, "I2S8", "I2S9"); @@ -359,19 +362,19 @@ static int mt8192_rt5682_init(struct snd_soc_pcm_runtime *rtd) static int mt8192_mt6359_hdmi_init(struct snd_soc_pcm_runtime *rtd) { + struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8192_JACK_HDMI]; struct snd_soc_component *cmpnt_codec = snd_soc_rtd_to_codec(rtd, 0)->component; - struct mt8192_mt6359_priv *priv = snd_soc_card_get_drvdata(rtd->card); int ret; - ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, - &priv->hdmi_jack); + ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, jack); if (ret) { dev_err(rtd->dev, "HDMI Jack creation failed: %d\n", ret); return ret; } - return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); + return snd_soc_component_set_jack(cmpnt_codec, jack, NULL); } static int mt8192_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, @@ -386,100 +389,6 @@ static int mt8192_i2s_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, return 0; } -static int -mt8192_mt6359_cap1_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int channels[] = { - 1, 2, 4 - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - static const unsigned int rates[] = { - 8000, 16000, 32000, 48000, 96000, 192000 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channels failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - return 0; -} - -static const struct snd_soc_ops mt8192_mt6359_capture1_ops = { - .startup = mt8192_mt6359_cap1_startup, -}; - -static int -mt8192_mt6359_rt5682_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int channels[] = { - 1, 2 - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - static const unsigned int rates[] = { - 48000 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channels failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - return 0; -} - -static const struct snd_soc_ops mt8192_mt6359_rt5682_ops = { - .startup = mt8192_mt6359_rt5682_startup, -}; - /* FE */ SND_SOC_DAILINK_DEFS(playback1, DAILINK_COMP_ARRAY(COMP_CPU("DL1")), @@ -689,7 +598,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback1), }, { @@ -698,7 +607,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback12), }, { @@ -707,7 +616,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback2), }, { @@ -716,8 +625,8 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, - .ops = &mt8192_mt6359_rt5682_ops, + .playback_only = 1, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(playback3), }, { @@ -726,7 +635,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback4), }, { @@ -735,7 +644,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback5), }, { @@ -744,7 +653,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback6), }, { @@ -753,7 +662,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback7), }, { @@ -762,7 +671,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback8), }, { @@ -771,7 +680,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback9), }, { @@ -780,8 +689,8 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8192_mt6359_capture1_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(capture1), }, { @@ -790,8 +699,8 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8192_mt6359_rt5682_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(capture2), }, { @@ -800,7 +709,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture3), }, { @@ -809,7 +718,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture4), }, { @@ -818,7 +727,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture5), }, { @@ -827,7 +736,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture6), }, { @@ -836,7 +745,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture7), }, { @@ -845,7 +754,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture8), }, { @@ -854,7 +763,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_mono1), }, { @@ -863,7 +772,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_mono2), }, { @@ -872,7 +781,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(capture_mono3), }, { @@ -881,15 +790,13 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .trigger = {SND_SOC_DPCM_TRIGGER_PRE, SND_SOC_DPCM_TRIGGER_PRE}, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(playback_hdmi), }, /* Back End DAI links */ { .name = "Primary Codec", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, .init = mt8192_mt6359_init, SND_SOC_DAILINK_REG(primary_codec), @@ -897,29 +804,27 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "Primary Codec CH34", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(primary_codec_ch34), }, { .name = "AP_DMIC", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(ap_dmic), }, { .name = "AP_DMIC_CH34", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(ap_dmic_ch34), }, { .name = "I2S0", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s0), @@ -927,7 +832,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S1", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s1), @@ -935,7 +840,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S2", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s2), @@ -943,7 +848,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S3", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s3), @@ -951,7 +856,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S5", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s5), @@ -959,7 +864,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S6", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s6), @@ -967,7 +872,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S7", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s7), @@ -975,7 +880,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S8", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, .init = mt8192_rt5682_init, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, @@ -985,7 +890,7 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "I2S9", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, SND_SOC_DAILINK_REG(i2s9), @@ -994,23 +899,19 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { { .name = "CONNSYS_I2S", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(connsys_i2s), }, { .name = "PCM 1", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm1), }, { .name = "PCM 2", .no_pcm = 1, - .dpcm_playback = 1, - .dpcm_capture = 1, .ignore_suspend = 1, SND_SOC_DAILINK_REG(pcm2), }, @@ -1019,8 +920,8 @@ static struct snd_soc_dai_link mt8192_mt6359_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_IB_NF | - SND_SOC_DAIFMT_CBM_CFM, - .dpcm_playback = 1, + SND_SOC_DAIFMT_CBP_CFP, + .playback_only = 1, .ignore_suspend = 1, .be_hw_params_fixup = mt8192_i2s_hw_params_fixup, .ignore = 1, @@ -1136,71 +1037,53 @@ static int mt8192_mt6359_card_set_be_link(struct snd_soc_card *card, return 0; } -static int mt8192_mt6359_dev_probe(struct platform_device *pdev) +static int mt8192_mt6359_legacy_probe(struct mtk_soc_card_data *soc_card_data) { - struct snd_soc_card *card; - struct device_node *platform_node, *hdmi_codec, *headset_codec, *speaker_codec; - int ret, i; + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = card_data->card; + struct device *dev = card->dev; + struct device_node *hdmi_codec, *headset_codec, *speaker_codec; struct snd_soc_dai_link *dai_link; - struct mt8192_mt6359_priv *priv; - - card = (struct snd_soc_card *)of_device_get_match_data(&pdev->dev); - if (!card) - return -EINVAL; - card->dev = &pdev->dev; + int i, ret = 0; - if (of_device_is_compatible(pdev->dev.of_node, RT1015P_RT5682_OF_NAME)) - card->name = RT1015P_RT5682_CARD_NAME; - else if (of_device_is_compatible(pdev->dev.of_node, RT1015P_RT5682S_OF_NAME)) - card->name = RT1015P_RT5682S_CARD_NAME; - else - dev_dbg(&pdev->dev, "No need to set card name\n"); - - hdmi_codec = of_parse_phandle(pdev->dev.of_node, "mediatek,hdmi-codec", 0); + hdmi_codec = of_parse_phandle(dev->of_node, "mediatek,hdmi-codec", 0); if (!hdmi_codec) - dev_dbg(&pdev->dev, "The machine has no hdmi-codec\n"); - - platform_node = of_parse_phandle(pdev->dev.of_node, "mediatek,platform", 0); - if (!platform_node) { - ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'platform' missing or invalid\n"); - goto err_platform_node; - } + dev_dbg(dev, "The machine has no hdmi-codec\n"); - speaker_codec = of_get_child_by_name(pdev->dev.of_node, "speaker-codecs"); + speaker_codec = of_get_child_by_name(dev->of_node, "speaker-codecs"); if (!speaker_codec) { ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'speaker-codecs' missing or invalid\n"); + dev_err_probe(dev, ret, "Property 'speaker-codecs' missing or invalid\n"); goto err_speaker_codec; } - headset_codec = of_get_child_by_name(pdev->dev.of_node, "headset-codec"); + headset_codec = of_get_child_by_name(dev->of_node, "headset-codec"); if (!headset_codec) { ret = -EINVAL; - dev_err_probe(&pdev->dev, ret, "Property 'headset-codec' missing or invalid\n"); + dev_err_probe(dev, ret, "Property 'headset-codec' missing or invalid\n"); goto err_headset_codec; } for_each_card_prelinks(card, i, dai_link) { ret = mt8192_mt6359_card_set_be_link(card, dai_link, speaker_codec, "I2S3"); if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set speaker_codec fail\n", + dev_err_probe(dev, ret, "%s set speaker_codec fail\n", dai_link->name); - goto err_probe; + break; } ret = mt8192_mt6359_card_set_be_link(card, dai_link, headset_codec, "I2S8"); if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set headset_codec fail\n", + dev_err_probe(dev, ret, "%s set headset_codec fail\n", dai_link->name); - goto err_probe; + break; } ret = mt8192_mt6359_card_set_be_link(card, dai_link, headset_codec, "I2S9"); if (ret) { - dev_err_probe(&pdev->dev, ret, "%s set headset_codec fail\n", + dev_err_probe(dev, ret, "%s set headset_codec fail\n", dai_link->name); - goto err_probe; + break; } if (hdmi_codec && strcmp(dai_link->name, "TDM") == 0) { @@ -1208,55 +1091,123 @@ static int mt8192_mt6359_dev_probe(struct platform_device *pdev) dai_link->ignore = 0; } - if (dai_link->num_codecs && dai_link->codecs[0].dai_name && + if (dai_link->num_codecs && strcmp(dai_link->codecs[0].dai_name, RT1015_CODEC_DAI) == 0) dai_link->ops = &mt8192_rt1015_i2s_ops; - - if (!dai_link->platforms->name) - dai_link->platforms->of_node = platform_node; - } - - priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) { - ret = -ENOMEM; - goto err_probe; } - snd_soc_card_set_drvdata(card, priv); - - ret = mt8192_afe_gpio_init(&pdev->dev); - if (ret) { - dev_err_probe(&pdev->dev, ret, "%s init gpio error\n", __func__); - goto err_probe; - } - - ret = devm_snd_soc_register_card(&pdev->dev, card); - if (ret) - dev_err_probe(&pdev->dev, ret, "%s snd_soc_register_card fail\n", __func__); -err_probe: of_node_put(headset_codec); err_headset_codec: of_node_put(speaker_codec); err_speaker_codec: - of_node_put(platform_node); -err_platform_node: of_node_put(hdmi_codec); return ret; } +static int mt8192_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data, bool legacy) +{ + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = card_data->card; + int ret; + + if (legacy) { + ret = mt8192_mt6359_legacy_probe(soc_card_data); + if (ret) + return ret; + } else { + struct snd_soc_dai_link *dai_link; + int i; + + for_each_card_prelinks(card, i, dai_link) + if (dai_link->num_codecs && + strcmp(dai_link->codecs[0].dai_name, RT1015_CODEC_DAI) == 0) + dai_link->ops = &mt8192_rt1015_i2s_ops; + } + + ret = mt8192_afe_gpio_init(card->dev); + if (ret) + return dev_err_probe(card->dev, ret, "%s init gpio error\n", __func__); + + return 0; +} + +static const unsigned int mt8192_pcm_playback_channels[] = { 1, 2 }; +static const unsigned int mt8192_pcm_playback_rates[] = { 48000 }; + +static const unsigned int mt8192_pcm_capture_channels[] = { 1, 2, 4 }; +static const unsigned int mt8192_pcm_capture_rates[] = { + 8000, 16000, 32000, 48000, 96000, 192000 +}; + +static const struct mtk_pcm_constraints_data mt8192_pcm_constraints[MTK_CONSTRAINT_CAPTURE + 1] = { + [MTK_CONSTRAINT_PLAYBACK] = { + .channels = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8192_pcm_playback_channels, + .count = ARRAY_SIZE(mt8192_pcm_playback_channels) + }, + .rates = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8192_pcm_playback_rates, + .count = ARRAY_SIZE(mt8192_pcm_playback_rates) + } + }, + [MTK_CONSTRAINT_CAPTURE] = { + .channels = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8192_pcm_capture_channels, + .count = ARRAY_SIZE(mt8192_pcm_capture_channels) + }, + .rates = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8192_pcm_capture_rates, + .count = ARRAY_SIZE(mt8192_pcm_capture_rates) + } + } +}; + +static const struct mtk_soundcard_pdata mt8192_mt6359_rt1015_rt5682_pdata = { + .card_name = RT1015_RT5682_CARD_NAME, + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8192_mt6359_rt1015_rt5682_card, + .num_jacks = MT8192_JACK_MAX, + .pcm_constraints = mt8192_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8192_pcm_constraints), + }, + .soc_probe = mt8192_mt6359_soc_card_probe +}; + +static const struct mtk_soundcard_pdata mt8192_mt6359_rt1015p_rt5682_pdata = { + .card_name = RT1015P_RT5682_CARD_NAME, + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8192_mt6359_rt1015p_rt5682x_card, + .num_jacks = MT8192_JACK_MAX, + .pcm_constraints = mt8192_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8192_pcm_constraints), + }, + .soc_probe = mt8192_mt6359_soc_card_probe +}; + +static const struct mtk_soundcard_pdata mt8192_mt6359_rt1015p_rt5682s_pdata = { + .card_name = RT1015P_RT5682S_CARD_NAME, + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8192_mt6359_rt1015p_rt5682x_card, + .num_jacks = MT8192_JACK_MAX, + .pcm_constraints = mt8192_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8192_pcm_constraints), + }, + .soc_probe = mt8192_mt6359_soc_card_probe +}; + #ifdef CONFIG_OF static const struct of_device_id mt8192_mt6359_dt_match[] = { { .compatible = RT1015_RT5682_OF_NAME, - .data = &mt8192_mt6359_rt1015_rt5682_card, + .data = &mt8192_mt6359_rt1015_rt5682_pdata, }, { .compatible = RT1015P_RT5682_OF_NAME, - .data = &mt8192_mt6359_rt1015p_rt5682x_card, + .data = &mt8192_mt6359_rt1015p_rt5682_pdata, }, { .compatible = RT1015P_RT5682S_OF_NAME, - .data = &mt8192_mt6359_rt1015p_rt5682x_card, + .data = &mt8192_mt6359_rt1015p_rt5682s_pdata, }, {} }; @@ -1276,7 +1227,7 @@ static struct platform_driver mt8192_mt6359_driver = { #endif .pm = &mt8192_mt6359_pm_ops, }, - .probe = mt8192_mt6359_dev_probe, + .probe = mtk_soundcard_common_probe, }; module_platform_driver(mt8192_mt6359_driver); diff --git a/sound/soc/mediatek/mt8195/Makefile b/sound/soc/mediatek/mt8195/Makefile index aae673ec751b..014e93dace26 100644 --- a/sound/soc/mediatek/mt8195/Makefile +++ b/sound/soc/mediatek/mt8195/Makefile @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 # platform driver -snd-soc-mt8195-afe-objs := \ +snd-soc-mt8195-afe-y := \ mt8195-audsys-clk.o \ mt8195-afe-clk.o \ mt8195-afe-pcm.o \ diff --git a/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c b/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c index 620d7ade1992..5d025ad72263 100644 --- a/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c +++ b/sound/soc/mediatek/mt8195/mt8195-afe-pcm.c @@ -84,7 +84,7 @@ int mt8195_afe_fs_timing(unsigned int rate) static int mt8195_memif_fs(struct snd_pcm_substream *substream, unsigned int rate) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); @@ -281,7 +281,7 @@ mt8195_afe_paired_memif_clk_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *dai, int enable) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); struct mt8195_afe_private *afe_priv = afe->platform_priv; int id = snd_soc_rtd_to_cpu(rtd, 0)->id; @@ -310,7 +310,7 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream, struct snd_soc_dai *dai, int enable) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); struct mt8195_afe_private *afe_priv = afe->platform_priv; int id = snd_soc_rtd_to_cpu(rtd, 0)->id; @@ -342,7 +342,7 @@ mt8195_afe_paired_memif_clk_enable(struct snd_pcm_substream *substream, static int mt8195_afe_fe_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_pcm_runtime *runtime = substream->runtime; struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); int id = snd_soc_rtd_to_cpu(rtd, 0)->id; @@ -380,7 +380,7 @@ static int mt8195_afe_fe_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params, struct snd_soc_dai *dai) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); int id = snd_soc_rtd_to_cpu(rtd, 0)->id; struct mtk_base_afe_memif *memif = &afe->memif[id]; @@ -2944,25 +2944,6 @@ skip_regmap: return 0; } -static int mt8195_afe_component_probe(struct snd_soc_component *component) -{ - struct mtk_base_afe *afe = snd_soc_component_get_drvdata(component); - int ret = 0; - - snd_soc_component_init_regmap(component, afe->regmap); - - ret = mtk_afe_add_sub_dai_control(component); - - return ret; -} - -static const struct snd_soc_component_driver mt8195_afe_component = { - .name = AFE_PCM_NAME, - .pointer = mtk_afe_pcm_pointer, - .pcm_construct = mtk_afe_pcm_new, - .probe = mt8195_afe_component_probe, -}; - static int init_memif_priv_data(struct mtk_base_afe *afe) { struct mt8195_afe_private *afe_priv = afe->platform_priv; @@ -3164,7 +3145,7 @@ static int mt8195_afe_pcm_dev_probe(struct platform_device *pdev) } /* register component */ - ret = devm_snd_soc_register_component(dev, &mt8195_afe_component, + ret = devm_snd_soc_register_component(dev, &mtk_afe_pcm_platform, afe->dai_drivers, afe->num_dai_drivers); if (ret) { dev_warn(dev, "err_platform\n"); @@ -3207,18 +3188,18 @@ static const struct of_device_id mt8195_afe_pcm_dt_match[] = { MODULE_DEVICE_TABLE(of, mt8195_afe_pcm_dt_match); static const struct dev_pm_ops mt8195_afe_pm_ops = { - SET_RUNTIME_PM_OPS(mt8195_afe_runtime_suspend, - mt8195_afe_runtime_resume, NULL) + RUNTIME_PM_OPS(mt8195_afe_runtime_suspend, + mt8195_afe_runtime_resume, NULL) }; static struct platform_driver mt8195_afe_pcm_driver = { .driver = { .name = "mt8195-audio", .of_match_table = mt8195_afe_pcm_dt_match, - .pm = &mt8195_afe_pm_ops, + .pm = pm_ptr(&mt8195_afe_pm_ops), }, .probe = mt8195_afe_pcm_dev_probe, - .remove_new = mt8195_afe_pcm_dev_remove, + .remove = mt8195_afe_pcm_dev_remove, }; module_platform_driver(mt8195_afe_pcm_driver); diff --git a/sound/soc/mediatek/mt8195/mt8195-dai-adda.c b/sound/soc/mediatek/mt8195/mt8195-dai-adda.c index 0dd35255066b..8da1587128cc 100644 --- a/sound/soc/mediatek/mt8195/mt8195-dai-adda.c +++ b/sound/soc/mediatek/mt8195/mt8195-dai-adda.c @@ -12,6 +12,7 @@ #include "mt8195-afe-clk.h" #include "mt8195-afe-common.h" #include "mt8195-reg.h" +#include "../common/mtk-dai-adda-common.h" #define ADDA_DL_GAIN_LOOPBACK 0x1800 #define ADDA_HIRES_THRES 48000 @@ -26,35 +27,6 @@ enum { }; enum { - MTK_AFE_ADDA_DL_RATE_8K = 0, - MTK_AFE_ADDA_DL_RATE_11K = 1, - MTK_AFE_ADDA_DL_RATE_12K = 2, - MTK_AFE_ADDA_DL_RATE_16K = 3, - MTK_AFE_ADDA_DL_RATE_22K = 4, - MTK_AFE_ADDA_DL_RATE_24K = 5, - MTK_AFE_ADDA_DL_RATE_32K = 6, - MTK_AFE_ADDA_DL_RATE_44K = 7, - MTK_AFE_ADDA_DL_RATE_48K = 8, - MTK_AFE_ADDA_DL_RATE_96K = 9, - MTK_AFE_ADDA_DL_RATE_192K = 10, -}; - -enum { - MTK_AFE_ADDA_UL_RATE_8K = 0, - MTK_AFE_ADDA_UL_RATE_16K = 1, - MTK_AFE_ADDA_UL_RATE_32K = 2, - MTK_AFE_ADDA_UL_RATE_48K = 3, - MTK_AFE_ADDA_UL_RATE_96K = 4, - MTK_AFE_ADDA_UL_RATE_192K = 5, -}; - -enum { - DELAY_DATA_MISO1 = 0, - DELAY_DATA_MISO0 = 1, - DELAY_DATA_MISO2 = 1, -}; - -enum { MTK_AFE_ADDA, MTK_AFE_ADDA6, }; @@ -63,62 +35,6 @@ struct mtk_dai_adda_priv { bool hires_required; }; -static unsigned int afe_adda_dl_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_DL_RATE_8K; - case 11025: - return MTK_AFE_ADDA_DL_RATE_11K; - case 12000: - return MTK_AFE_ADDA_DL_RATE_12K; - case 16000: - return MTK_AFE_ADDA_DL_RATE_16K; - case 22050: - return MTK_AFE_ADDA_DL_RATE_22K; - case 24000: - return MTK_AFE_ADDA_DL_RATE_24K; - case 32000: - return MTK_AFE_ADDA_DL_RATE_32K; - case 44100: - return MTK_AFE_ADDA_DL_RATE_44K; - case 48000: - return MTK_AFE_ADDA_DL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_DL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_DL_RATE_192K; - default: - dev_info(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_DL_RATE_48K; - } -} - -static unsigned int afe_adda_ul_rate_transform(struct mtk_base_afe *afe, - unsigned int rate) -{ - switch (rate) { - case 8000: - return MTK_AFE_ADDA_UL_RATE_8K; - case 16000: - return MTK_AFE_ADDA_UL_RATE_16K; - case 32000: - return MTK_AFE_ADDA_UL_RATE_32K; - case 48000: - return MTK_AFE_ADDA_UL_RATE_48K; - case 96000: - return MTK_AFE_ADDA_UL_RATE_96K; - case 192000: - return MTK_AFE_ADDA_UL_RATE_192K; - default: - dev_info(afe->dev, "%s(), rate %d invalid, use 48kHz!!!\n", - __func__, rate); - return MTK_AFE_ADDA_UL_RATE_48K; - } -} - static int mt8195_adda_mtkaif_init(struct mtk_base_afe *afe) { struct mt8195_afe_private *afe_priv = afe->platform_priv; @@ -644,7 +560,7 @@ static int mtk_dai_da_configure(struct mtk_base_afe *afe, /* set sampling rate */ mask |= DL_2_INPUT_MODE_CTL_MASK; - val |= DL_2_INPUT_MODE_CTL(afe_adda_dl_rate_transform(afe, rate)); + val |= DL_2_INPUT_MODE_CTL(mtk_adda_dl_rate_transform(afe, rate)); /* turn off saturation */ mask |= DL_2_CH1_SATURATION_EN_CTL; @@ -681,7 +597,7 @@ static int mtk_dai_ad_configure(struct mtk_base_afe *afe, unsigned int mask = 0; mask |= UL_VOICE_MODE_CTL_MASK; - val |= UL_VOICE_MODE_CTL(afe_adda_ul_rate_transform(afe, rate)); + val |= UL_VOICE_MODE_CTL(mtk_adda_ul_rate_transform(afe, rate)); switch (id) { case MT8195_AFE_IO_UL_SRC1: diff --git a/sound/soc/mediatek/mt8195/mt8195-dai-pcm.c b/sound/soc/mediatek/mt8195/mt8195-dai-pcm.c index 6d6d79300d51..cdc16057d50e 100644 --- a/sound/soc/mediatek/mt8195/mt8195-dai-pcm.c +++ b/sound/soc/mediatek/mt8195/mt8195-dai-pcm.c @@ -127,7 +127,7 @@ static int mtk_dai_pcm_configure(struct snd_pcm_substream *substream, unsigned int lrck_inv; unsigned int bck_inv; unsigned int fmt; - unsigned int bit_width = dai->sample_bits; + unsigned int bit_width = dai->symmetric_sample_bits; unsigned int val = 0; unsigned int mask = 0; int fs = 0; diff --git a/sound/soc/mediatek/mt8195/mt8195-mt6359.c b/sound/soc/mediatek/mt8195/mt8195-mt6359.c index 53fd8a897b9d..e57391c213e7 100644 --- a/sound/soc/mediatek/mt8195/mt8195-mt6359.c +++ b/sound/soc/mediatek/mt8195/mt8195-mt6359.c @@ -22,6 +22,7 @@ #include "../common/mtk-afe-platform-driver.h" #include "../common/mtk-dsp-sof-common.h" #include "../common/mtk-soc-card.h" +#include "../common/mtk-soundcard-driver.h" #include "mt8195-afe-clk.h" #include "mt8195-afe-common.h" @@ -29,6 +30,13 @@ #define RT1019_SPEAKER_AMP_PRESENT BIT(1) #define MAX98390_SPEAKER_AMP_PRESENT BIT(2) +#define DUMB_CODEC_INIT BIT(0) +#define MT6359_CODEC_INIT BIT(1) +#define RT1011_CODEC_INIT BIT(2) +#define RT1019_CODEC_INIT BIT(3) +#define MAX98390_CODEC_INIT BIT(4) +#define RT5682_CODEC_INIT BIT(5) + #define RT1011_CODEC_DAI "rt1011-aif" #define RT1011_DEV0_NAME "rt1011.2-0038" #define RT1011_DEV1_NAME "rt1011.2-0039" @@ -51,18 +59,17 @@ #define SOF_DMA_UL4 "SOF_DMA_UL4" #define SOF_DMA_UL5 "SOF_DMA_UL5" -struct mt8195_card_data { - const char *name; - unsigned long quirk; -}; - struct mt8195_mt6359_priv { - struct snd_soc_jack headset_jack; - struct snd_soc_jack dp_jack; - struct snd_soc_jack hdmi_jack; struct clk *i2so1_mclk; }; +enum mt8195_jacks { + MT8195_JACK_HEADSET, + MT8195_JACK_DP, + MT8195_JACK_HDMI, + MT8195_JACK_MAX, +}; + /* Headset jack detection DAPM pins */ static struct snd_soc_jack_pin mt8195_jack_pins[] = { { @@ -85,10 +92,6 @@ static const struct snd_soc_dapm_widget mt8195_mt6359_widgets[] = { }; static const struct snd_soc_dapm_route mt8195_mt6359_routes[] = { - /* headset */ - { "Headphone", NULL, "HPOL" }, - { "Headphone", NULL, "HPOR" }, - { "IN1P", NULL, "Headset Mic" }, /* SOF Uplink */ {SOF_DMA_UL4, NULL, "O034"}, {SOF_DMA_UL4, NULL, "O035"}, @@ -124,6 +127,13 @@ static const struct snd_kcontrol_new mt8195_speaker_controls[] = { SOC_DAPM_PIN_SWITCH("Ext Spk"), }; +static const struct snd_soc_dapm_route mt8195_rt5682_routes[] = { + /* headset */ + { "Headphone", NULL, "HPOL" }, + { "Headphone", NULL, "HPOR" }, + { "IN1P", NULL, "Headset Mic" }, +}; + static const struct snd_soc_dapm_route mt8195_rt1011_routes[] = { { "Left Spk", NULL, "Left SPO" }, { "Right Spk", NULL, "Right SPO" }, @@ -321,44 +331,7 @@ static int mt8195_mt6359_init(struct snd_soc_pcm_runtime *rtd) static int mt8195_hdmitx_dptx_startup(struct snd_pcm_substream *substream) { - static const unsigned int rates[] = { - 48000 - }; - static const unsigned int channels[] = { - 2, 4, 6, 8 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channel failed\n"); - return ret; - } - - return 0; + return mtk_soundcard_startup(substream, MTK_CONSTRAINT_HDMIDP); } static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = { @@ -368,7 +341,7 @@ static const struct snd_soc_ops mt8195_hdmitx_dptx_playback_ops = { static int mt8195_dptx_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); return snd_soc_dai_set_sysclk(cpu_dai, 0, params_rate(params) * 256, @@ -382,33 +355,31 @@ static const struct snd_soc_ops mt8195_dptx_ops = { static int mt8195_dptx_codec_init(struct snd_soc_pcm_runtime *rtd) { struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); - struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8195_JACK_DP]; struct snd_soc_component *cmpnt_codec = snd_soc_rtd_to_codec(rtd, 0)->component; int ret; - ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT, - &priv->dp_jack); + ret = snd_soc_card_jack_new(rtd->card, "DP Jack", SND_JACK_LINEOUT, jack); if (ret) return ret; - return snd_soc_component_set_jack(cmpnt_codec, &priv->dp_jack, NULL); + return snd_soc_component_set_jack(cmpnt_codec, jack, NULL); } static int mt8195_hdmi_codec_init(struct snd_soc_pcm_runtime *rtd) { struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); - struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8195_JACK_HDMI]; struct snd_soc_component *cmpnt_codec = snd_soc_rtd_to_codec(rtd, 0)->component; int ret; - ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, - &priv->hdmi_jack); + ret = snd_soc_card_jack_new(rtd->card, "HDMI Jack", SND_JACK_LINEOUT, jack); if (ret) return ret; - return snd_soc_component_set_jack(cmpnt_codec, &priv->hdmi_jack, NULL); + return snd_soc_component_set_jack(cmpnt_codec, jack, NULL); } static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, @@ -423,102 +394,10 @@ static int mt8195_dptx_hw_params_fixup(struct snd_soc_pcm_runtime *rtd, return 0; } -static int mt8195_playback_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int rates[] = { - 48000 - }; - static const unsigned int channels[] = { - 2 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channel failed\n"); - return ret; - } - - return 0; -} - -static const struct snd_soc_ops mt8195_playback_ops = { - .startup = mt8195_playback_startup, -}; - -static int mt8195_capture_startup(struct snd_pcm_substream *substream) -{ - static const unsigned int rates[] = { - 48000 - }; - static const unsigned int channels[] = { - 1, 2 - }; - static const struct snd_pcm_hw_constraint_list constraints_rates = { - .count = ARRAY_SIZE(rates), - .list = rates, - .mask = 0, - }; - static const struct snd_pcm_hw_constraint_list constraints_channels = { - .count = ARRAY_SIZE(channels), - .list = channels, - .mask = 0, - }; - - struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); - struct snd_pcm_runtime *runtime = substream->runtime; - int ret; - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_RATE, - &constraints_rates); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list rate failed\n"); - return ret; - } - - ret = snd_pcm_hw_constraint_list(runtime, 0, - SNDRV_PCM_HW_PARAM_CHANNELS, - &constraints_channels); - if (ret < 0) { - dev_err(rtd->dev, "hw_constraint_list channel failed\n"); - return ret; - } - - return 0; -} - -static const struct snd_soc_ops mt8195_capture_ops = { - .startup = mt8195_capture_startup, -}; - static int mt8195_rt5682_etdm_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { - struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); struct snd_soc_card *card = rtd->card; struct snd_soc_dai *cpu_dai = snd_soc_rtd_to_cpu(rtd, 0); struct snd_soc_dai *codec_dai = snd_soc_rtd_to_codec(rtd, 0); @@ -566,11 +445,12 @@ static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd) snd_soc_rtd_to_codec(rtd, 0)->component; struct mtk_soc_card_data *soc_card_data = snd_soc_card_get_drvdata(rtd->card); struct mt8195_mt6359_priv *priv = soc_card_data->mach_priv; - struct snd_soc_jack *jack = &priv->headset_jack; + struct snd_soc_jack *jack = &soc_card_data->card_data->jacks[MT8195_JACK_HEADSET]; struct snd_soc_component *cmpnt_afe = snd_soc_rtdcom_lookup(rtd, AFE_PCM_NAME); struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt_afe); struct mt8195_afe_private *afe_priv = afe->platform_priv; + struct snd_soc_card *card = rtd->card; int ret; priv->i2so1_mclk = afe_priv->clk[MT8195_CLK_TOP_APLL12_DIV2]; @@ -597,7 +477,12 @@ static int mt8195_rt5682_init(struct snd_soc_pcm_runtime *rtd) return ret; } - return 0; + ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt5682_routes, + ARRAY_SIZE(mt8195_rt5682_routes)); + if (ret) + dev_err(rtd->dev, "unable to add dapm routes, ret %d\n", ret); + + return ret; }; static int mt8195_rt1011_etdm_hw_params(struct snd_pcm_substream *substream, @@ -687,7 +572,7 @@ static int mt8195_rt1011_init(struct snd_soc_pcm_runtime *rtd) return ret; } -static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd) +static int mt8195_dumb_amp_init(struct snd_soc_pcm_runtime *rtd) { struct snd_soc_card *card = rtd->card; int ret; @@ -707,6 +592,18 @@ static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd) return ret; } + return 0; +} + +static int mt8195_rt1019_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_card *card = rtd->card; + int ret; + + ret = mt8195_dumb_amp_init(rtd); + if (ret) + return ret; + ret = snd_soc_dapm_add_routes(&card->dapm, mt8195_rt1019_routes, ARRAY_SIZE(mt8195_rt1019_routes)); if (ret) @@ -934,11 +831,12 @@ SND_SOC_DAILINK_DEFS(ETDM1_IN_BE, SND_SOC_DAILINK_DEFS(ETDM2_IN_BE, DAILINK_COMP_ARRAY(COMP_CPU("ETDM2_IN")), - DAILINK_COMP_ARRAY(COMP_EMPTY()), + DAILINK_COMP_ARRAY(COMP_DUMMY()), DAILINK_COMP_ARRAY(COMP_EMPTY())); SND_SOC_DAILINK_DEFS(ETDM1_OUT_BE, DAILINK_COMP_ARRAY(COMP_CPU("ETDM1_OUT")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), DAILINK_COMP_ARRAY(COMP_EMPTY())); SND_SOC_DAILINK_DEFS(ETDM2_OUT_BE, @@ -1024,8 +922,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, - .ops = &mt8195_playback_ops, + .playback_only = 1, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(DL2_FE), }, [DAI_LINK_DL3_FE] = { @@ -1036,8 +934,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, - .ops = &mt8195_playback_ops, + .playback_only = 1, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(DL3_FE), }, [DAI_LINK_DL6_FE] = { @@ -1048,8 +946,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, - .ops = &mt8195_playback_ops, + .playback_only = 1, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(DL6_FE), }, [DAI_LINK_DL7_FE] = { @@ -1060,7 +958,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_PRE, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(DL7_FE), }, [DAI_LINK_DL8_FE] = { @@ -1071,8 +969,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, - .ops = &mt8195_playback_ops, + .playback_only = 1, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(DL8_FE), }, [DAI_LINK_DL10_FE] = { @@ -1083,7 +981,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8195_hdmitx_dptx_playback_ops, SND_SOC_DAILINK_REG(DL10_FE), }, @@ -1095,8 +993,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_playback = 1, - .ops = &mt8195_playback_ops, + .playback_only = 1, + .ops = &mtk_soundcard_common_playback_ops, SND_SOC_DAILINK_REG(DL11_FE), }, [DAI_LINK_UL1_FE] = { @@ -1107,7 +1005,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_PRE, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(UL1_FE), }, [DAI_LINK_UL2_FE] = { @@ -1118,8 +1016,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8195_capture_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(UL2_FE), }, [DAI_LINK_UL3_FE] = { @@ -1130,8 +1028,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8195_capture_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(UL3_FE), }, [DAI_LINK_UL4_FE] = { @@ -1142,8 +1040,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8195_capture_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(UL4_FE), }, [DAI_LINK_UL5_FE] = { @@ -1154,8 +1052,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8195_capture_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(UL5_FE), }, [DAI_LINK_UL6_FE] = { @@ -1166,7 +1064,7 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_PRE, }, .dynamic = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(UL6_FE), }, [DAI_LINK_UL8_FE] = { @@ -1177,8 +1075,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8195_capture_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(UL8_FE), }, [DAI_LINK_UL9_FE] = { @@ -1189,8 +1087,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8195_capture_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(UL9_FE), }, [DAI_LINK_UL10_FE] = { @@ -1201,21 +1099,21 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { SND_SOC_DPCM_TRIGGER_POST, }, .dynamic = 1, - .dpcm_capture = 1, - .ops = &mt8195_capture_ops, + .capture_only = 1, + .ops = &mtk_soundcard_common_capture_ops, SND_SOC_DAILINK_REG(UL10_FE), }, /* BE */ [DAI_LINK_DL_SRC_BE] = { .name = "DL_SRC_BE", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, SND_SOC_DAILINK_REG(DL_SRC_BE), }, [DAI_LINK_DPTX_BE] = { .name = "DPTX_BE", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8195_dptx_ops, .be_hw_params_fixup = mt8195_dptx_hw_params_fixup, SND_SOC_DAILINK_REG(DPTX_BE), @@ -1225,8 +1123,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, - .dpcm_capture = 1, + SND_SOC_DAIFMT_CBC_CFC, + .capture_only = 1, SND_SOC_DAILINK_REG(ETDM1_IN_BE), }, [DAI_LINK_ETDM2_IN_BE] = { @@ -1234,8 +1132,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, - .dpcm_capture = 1, + SND_SOC_DAIFMT_CBC_CFC, + .capture_only = 1, .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, SND_SOC_DAILINK_REG(ETDM2_IN_BE), }, @@ -1244,8 +1142,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, - .dpcm_playback = 1, + SND_SOC_DAIFMT_CBC_CFC, + .playback_only = 1, .be_hw_params_fixup = mt8195_etdm_hw_params_fixup, SND_SOC_DAILINK_REG(ETDM1_OUT_BE), }, @@ -1254,8 +1152,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, - .dpcm_playback = 1, + SND_SOC_DAIFMT_CBC_CFC, + .playback_only = 1, SND_SOC_DAILINK_REG(ETDM2_OUT_BE), }, [DAI_LINK_ETDM3_OUT_BE] = { @@ -1263,8 +1161,8 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, - .dpcm_playback = 1, + SND_SOC_DAIFMT_CBC_CFC, + .playback_only = 1, SND_SOC_DAILINK_REG(ETDM3_OUT_BE), }, [DAI_LINK_PCM1_BE] = { @@ -1272,49 +1170,47 @@ static struct snd_soc_dai_link mt8195_mt6359_dai_links[] = { .no_pcm = 1, .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | - SND_SOC_DAIFMT_CBS_CFS, - .dpcm_playback = 1, - .dpcm_capture = 1, + SND_SOC_DAIFMT_CBC_CFC, SND_SOC_DAILINK_REG(PCM1_BE), }, [DAI_LINK_UL_SRC1_BE] = { .name = "UL_SRC1_BE", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(UL_SRC1_BE), }, [DAI_LINK_UL_SRC2_BE] = { .name = "UL_SRC2_BE", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, SND_SOC_DAILINK_REG(UL_SRC2_BE), }, /* SOF BE */ [DAI_LINK_SOF_DL2_BE] = { .name = "AFE_SOF_DL2", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8195_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_DL2), }, [DAI_LINK_SOF_DL3_BE] = { .name = "AFE_SOF_DL3", .no_pcm = 1, - .dpcm_playback = 1, + .playback_only = 1, .ops = &mt8195_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_DL3), }, [DAI_LINK_SOF_UL4_BE] = { .name = "AFE_SOF_UL4", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8195_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_UL4), }, [DAI_LINK_SOF_UL5_BE] = { .name = "AFE_SOF_UL5", .no_pcm = 1, - .dpcm_capture = 1, + .capture_only = 1, .ops = &mt8195_sof_be_ops, SND_SOC_DAILINK_REG(AFE_SOF_UL5), }, @@ -1371,108 +1267,31 @@ static int mt8195_dai_link_fixup(struct snd_soc_pcm_runtime *rtd, return ret; } -static int mt8195_mt6359_dev_probe(struct platform_device *pdev) +static int mt8195_mt6359_legacy_probe(struct mtk_soc_card_data *soc_card_data) { - struct snd_soc_card *card = &mt8195_mt6359_soc_card; + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = card_data->card; + struct device_node *codec_node, *dp_node, *hdmi_node; struct snd_soc_dai_link *dai_link; - struct mtk_soc_card_data *soc_card_data; - struct mt8195_mt6359_priv *mach_priv; - struct device_node *platform_node, *adsp_node, *codec_node, *dp_node, *hdmi_node; - struct mt8195_card_data *card_data; - int is5682s = 0; - int init6359 = 0; - int sof_on = 0; - int ret, i; - - card_data = (struct mt8195_card_data *)of_device_get_match_data(&pdev->dev); - card->dev = &pdev->dev; - - ret = snd_soc_of_parse_card_name(card, "model"); - if (ret) { - dev_err(&pdev->dev, "%s new card name parsing error %d\n", - __func__, ret); - return ret; - } - - if (!card->name) - card->name = card_data->name; + struct device *dev = card->dev; + bool is5682s, init6359 = false; + int i; if (strstr(card->name, "_5682s")) { codec_node = of_find_compatible_node(NULL, NULL, "realtek,rt5682s"); - is5682s = 1; - } else - codec_node = of_find_compatible_node(NULL, NULL, "realtek,rt5682i"); - - soc_card_data = devm_kzalloc(&pdev->dev, sizeof(*card_data), GFP_KERNEL); - if (!soc_card_data) - return -ENOMEM; - - mach_priv = devm_kzalloc(&pdev->dev, sizeof(*mach_priv), GFP_KERNEL); - if (!mach_priv) - return -ENOMEM; - - soc_card_data->mach_priv = mach_priv; - - adsp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,adsp", 0); - if (adsp_node) { - struct mtk_sof_priv *sof_priv; - - sof_priv = devm_kzalloc(&pdev->dev, sizeof(*sof_priv), GFP_KERNEL); - if (!sof_priv) { - ret = -ENOMEM; - goto err_kzalloc; - } - sof_priv->conn_streams = g_sof_conn_streams; - sof_priv->num_streams = ARRAY_SIZE(g_sof_conn_streams); - sof_priv->sof_dai_link_fixup = mt8195_dai_link_fixup; - soc_card_data->sof_priv = sof_priv; - card->probe = mtk_sof_card_probe; - card->late_probe = mtk_sof_card_late_probe; - if (!card->topology_shortname_created) { - snprintf(card->topology_shortname, 32, "sof-%s", card->name); - card->topology_shortname_created = true; - } - card->name = card->topology_shortname; - sof_on = 1; - } - - if (of_property_read_bool(pdev->dev.of_node, "mediatek,dai-link")) { - ret = mtk_sof_dailink_parse_of(card, pdev->dev.of_node, - "mediatek,dai-link", - mt8195_mt6359_dai_links, - ARRAY_SIZE(mt8195_mt6359_dai_links)); - if (ret) { - dev_dbg(&pdev->dev, "Parse dai-link fail\n"); - goto err_parse_of; - } + is5682s = true; } else { - if (!sof_on) - card->num_links = DAI_LINK_REGULAR_NUM; - } - - platform_node = of_parse_phandle(pdev->dev.of_node, - "mediatek,platform", 0); - if (!platform_node) { - dev_dbg(&pdev->dev, "Property 'platform' missing or invalid\n"); - ret = -EINVAL; - goto err_platform_node; + codec_node = of_find_compatible_node(NULL, NULL, "realtek,rt5682i"); + is5682s = false; } - dp_node = of_parse_phandle(pdev->dev.of_node, "mediatek,dptx-codec", 0); - hdmi_node = of_parse_phandle(pdev->dev.of_node, - "mediatek,hdmi-codec", 0); + dp_node = of_parse_phandle(dev->of_node, "mediatek,dptx-codec", 0); + hdmi_node = of_parse_phandle(dev->of_node, "mediatek,hdmi-codec", 0); for_each_card_prelinks(card, i, dai_link) { - if (!dai_link->platforms->name) { - if (!strncmp(dai_link->name, "AFE_SOF", strlen("AFE_SOF")) && sof_on) - dai_link->platforms->of_node = adsp_node; - else - dai_link->platforms->of_node = platform_node; - } - if (strcmp(dai_link->name, "DPTX_BE") == 0) { if (!dp_node) { - dev_dbg(&pdev->dev, "No property 'dptx-codec'\n"); + dev_dbg(dev, "No property 'dptx-codec'\n"); } else { dai_link->codecs->of_node = dp_node; dai_link->codecs->name = NULL; @@ -1481,7 +1300,7 @@ static int mt8195_mt6359_dev_probe(struct platform_device *pdev) } } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { if (!hdmi_node) { - dev_dbg(&pdev->dev, "No property 'hdmi-codec'\n"); + dev_dbg(dev, "No property 'hdmi-codec'\n"); } else { dai_link->codecs->of_node = hdmi_node; dai_link->codecs->name = NULL; @@ -1490,7 +1309,7 @@ static int mt8195_mt6359_dev_probe(struct platform_device *pdev) } } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0) { if (!codec_node) { - dev_err(&pdev->dev, "Codec not found!\n"); + dev_err(dev, "Codec not found!\n"); } else { dai_link->codecs->of_node = codec_node; dai_link->codecs->name = NULL; @@ -1501,7 +1320,7 @@ static int mt8195_mt6359_dev_probe(struct platform_device *pdev) } } else if (strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { if (!codec_node) { - dev_err(&pdev->dev, "Codec not found!\n"); + dev_err(dev, "Codec not found!\n"); } else { dai_link->codecs->of_node = codec_node; dai_link->codecs->name = NULL; @@ -1514,10 +1333,10 @@ static int mt8195_mt6359_dev_probe(struct platform_device *pdev) strcmp(dai_link->name, "UL_SRC2_BE") == 0) { if (!init6359) { dai_link->init = mt8195_mt6359_init; - init6359 = 1; + init6359 = true; } } else if (strcmp(dai_link->name, "ETDM2_OUT_BE") == 0) { - switch (card_data->quirk) { + switch (card_data->flags) { case RT1011_SPEAKER_AMP_PRESENT: dai_link->codecs = rt1011_comps; dai_link->num_codecs = ARRAY_SIZE(rt1011_comps); @@ -1545,33 +1364,176 @@ static int mt8195_mt6359_dev_probe(struct platform_device *pdev) } } - snd_soc_card_set_drvdata(card, soc_card_data); + return 0; +} + +static int mt8195_mt6359_soc_card_probe(struct mtk_soc_card_data *soc_card_data, bool legacy) +{ + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = card_data->card; + struct mt8195_mt6359_priv *mach_priv; + struct snd_soc_dai_link *dai_link; + u8 codec_init = 0; + int i; + + mach_priv = devm_kzalloc(card->dev, sizeof(*mach_priv), GFP_KERNEL); + if (!mach_priv) + return -ENOMEM; - ret = devm_snd_soc_register_card(&pdev->dev, card); + soc_card_data->mach_priv = mach_priv; - of_node_put(platform_node); - of_node_put(dp_node); - of_node_put(hdmi_node); -err_kzalloc: -err_parse_of: -err_platform_node: - of_node_put(adsp_node); - return ret; + if (legacy) + return mt8195_mt6359_legacy_probe(soc_card_data); + + for_each_card_prelinks(card, i, dai_link) { + if (strcmp(dai_link->name, "DPTX_BE") == 0) { + if (dai_link->num_codecs && + !snd_soc_dlc_is_dummy(dai_link->codecs)) + dai_link->init = mt8195_dptx_codec_init; + } else if (strcmp(dai_link->name, "ETDM3_OUT_BE") == 0) { + if (dai_link->num_codecs && + !snd_soc_dlc_is_dummy(dai_link->codecs)) + dai_link->init = mt8195_hdmi_codec_init; + } else if (strcmp(dai_link->name, "DL_SRC_BE") == 0 || + strcmp(dai_link->name, "UL_SRC1_BE") == 0 || + strcmp(dai_link->name, "UL_SRC2_BE") == 0) { + if (!(codec_init & MT6359_CODEC_INIT)) { + dai_link->init = mt8195_mt6359_init; + codec_init |= MT6359_CODEC_INIT; + } + } else if (strcmp(dai_link->name, "ETDM1_OUT_BE") == 0 || + strcmp(dai_link->name, "ETDM2_OUT_BE") == 0 || + strcmp(dai_link->name, "ETDM1_IN_BE") == 0 || + strcmp(dai_link->name, "ETDM2_IN_BE") == 0) { + if (!dai_link->num_codecs) + continue; + + if (!strcmp(dai_link->codecs->dai_name, MAX98390_CODEC_DAI)) { + if (!(codec_init & MAX98390_CODEC_INIT)) { + dai_link->init = mt8195_max98390_init; + codec_init |= MAX98390_CODEC_INIT; + } + } else if (!strcmp(dai_link->codecs->dai_name, RT1011_CODEC_DAI)) { + dai_link->ops = &mt8195_rt1011_etdm_ops; + if (!(codec_init & RT1011_CODEC_INIT)) { + dai_link->init = mt8195_rt1011_init; + codec_init |= RT1011_CODEC_INIT; + } + } else if (!strcmp(dai_link->codecs->dai_name, RT1019_CODEC_DAI)) { + if (!(codec_init & RT1019_CODEC_INIT)) { + dai_link->init = mt8195_rt1019_init; + codec_init |= RT1019_CODEC_INIT; + } + } else if (!strcmp(dai_link->codecs->dai_name, RT5682_CODEC_DAI) || + !strcmp(dai_link->codecs->dai_name, RT5682S_CODEC_DAI)) { + dai_link->ops = &mt8195_rt5682_etdm_ops; + if (!(codec_init & RT5682_CODEC_INIT)) { + dai_link->init = mt8195_rt5682_init; + codec_init |= RT5682_CODEC_INIT; + } + } else { + if (!snd_soc_dlc_is_dummy(dai_link->codecs)) { + if (!(codec_init & DUMB_CODEC_INIT)) { + dai_link->init = mt8195_dumb_amp_init; + codec_init |= DUMB_CODEC_INIT; + } + } + } + } + } + + return 0; } -static struct mt8195_card_data mt8195_mt6359_rt1019_rt5682_card = { - .name = "mt8195_r1019_5682", - .quirk = RT1019_SPEAKER_AMP_PRESENT, +static const unsigned int mt8195_pcm_playback_channels[] = { 2 }; +static const unsigned int mt8195_pcm_capture_channels[] = { 1, 2 }; +static const unsigned int mt8195_pcm_hdmidp_channels[] = { 2, 4, 6, 8 }; +static const unsigned int mt8195_pcm_rates[] = { 48000 }; + +static const struct snd_pcm_hw_constraint_list mt8195_rate_constraint = { + .list = mt8195_pcm_rates, + .count = ARRAY_SIZE(mt8195_pcm_rates) }; -static struct mt8195_card_data mt8195_mt6359_rt1011_rt5682_card = { - .name = "mt8195_r1011_5682", - .quirk = RT1011_SPEAKER_AMP_PRESENT, +static const struct mtk_pcm_constraints_data mt8195_pcm_constraints[MTK_CONSTRAINT_HDMIDP + 1] = { + [MTK_CONSTRAINT_PLAYBACK] = { + .channels = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8195_pcm_playback_channels, + .count = ARRAY_SIZE(mt8195_pcm_playback_channels) + }, + .rates = &mt8195_rate_constraint, + }, + [MTK_CONSTRAINT_CAPTURE] = { + .channels = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8195_pcm_capture_channels, + .count = ARRAY_SIZE(mt8195_pcm_capture_channels) + }, + .rates = &mt8195_rate_constraint, + }, + [MTK_CONSTRAINT_HDMIDP] = { + .channels = &(const struct snd_pcm_hw_constraint_list) { + .list = mt8195_pcm_hdmidp_channels, + .count = ARRAY_SIZE(mt8195_pcm_hdmidp_channels) + }, + .rates = &mt8195_rate_constraint, + }, +}; + +static const struct mtk_sof_priv mt8195_sof_priv = { + .conn_streams = g_sof_conn_streams, + .num_streams = ARRAY_SIZE(g_sof_conn_streams), + .sof_dai_link_fixup = mt8195_dai_link_fixup +}; + +static const struct mtk_soundcard_pdata mt8195_mt6359_rt1019_rt5682_card = { + .card_name = "mt8195_r1019_5682", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8195_mt6359_soc_card, + .num_jacks = MT8195_JACK_MAX, + .pcm_constraints = mt8195_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8195_pcm_constraints), + .flags = RT1019_SPEAKER_AMP_PRESENT + }, + .sof_priv = &mt8195_sof_priv, + .soc_probe = mt8195_mt6359_soc_card_probe +}; + +static const struct mtk_soundcard_pdata mt8195_mt6359_rt1011_rt5682_card = { + .card_name = "mt8195_r1011_5682", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8195_mt6359_soc_card, + .num_jacks = MT8195_JACK_MAX, + .pcm_constraints = mt8195_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8195_pcm_constraints), + .flags = RT1011_SPEAKER_AMP_PRESENT + }, + .sof_priv = &mt8195_sof_priv, + .soc_probe = mt8195_mt6359_soc_card_probe +}; + +static const struct mtk_soundcard_pdata mt8195_mt6359_max98390_rt5682_card = { + .card_name = "mt8195_m98390_r5682", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8195_mt6359_soc_card, + .num_jacks = MT8195_JACK_MAX, + .pcm_constraints = mt8195_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8195_pcm_constraints), + .flags = MAX98390_SPEAKER_AMP_PRESENT + }, + .sof_priv = &mt8195_sof_priv, + .soc_probe = mt8195_mt6359_soc_card_probe }; -static struct mt8195_card_data mt8195_mt6359_max98390_rt5682_card = { - .name = "mt8195_m98390_r5682", - .quirk = MAX98390_SPEAKER_AMP_PRESENT, +static const struct mtk_soundcard_pdata mt8195_mt6359_card = { + .card_name = "mt8195_mt6359", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8195_mt6359_soc_card, + .num_jacks = MT8195_JACK_MAX, + .pcm_constraints = mt8195_pcm_constraints, + .num_pcm_constraints = ARRAY_SIZE(mt8195_pcm_constraints), + }, + .sof_priv = &mt8195_sof_priv, + .soc_probe = mt8195_mt6359_soc_card_probe }; static const struct of_device_id mt8195_mt6359_dt_match[] = { @@ -1587,6 +1549,10 @@ static const struct of_device_id mt8195_mt6359_dt_match[] = { .compatible = "mediatek,mt8195_mt6359_max98390_rt5682", .data = &mt8195_mt6359_max98390_rt5682_card, }, + { + .compatible = "mediatek,mt8195_mt6359", + .data = &mt8195_mt6359_card, + }, {}, }; MODULE_DEVICE_TABLE(of, mt8195_mt6359_dt_match); @@ -1597,7 +1563,7 @@ static struct platform_driver mt8195_mt6359_driver = { .of_match_table = mt8195_mt6359_dt_match, .pm = &snd_soc_pm_ops, }, - .probe = mt8195_mt6359_dev_probe, + .probe = mtk_soundcard_common_probe, }; module_platform_driver(mt8195_mt6359_driver); diff --git a/sound/soc/mediatek/mt8365/Makefile b/sound/soc/mediatek/mt8365/Makefile new file mode 100644 index 000000000000..b197025e34bb --- /dev/null +++ b/sound/soc/mediatek/mt8365/Makefile @@ -0,0 +1,15 @@ +# SPDX-License-Identifier: GPL-2.0 + +# MTK Platform driver +snd-soc-mt8365-pcm-y := \ + mt8365-afe-clk.o \ + mt8365-afe-pcm.o \ + mt8365-dai-adda.o \ + mt8365-dai-dmic.o \ + mt8365-dai-i2s.o \ + mt8365-dai-pcm.o + +obj-$(CONFIG_SND_SOC_MT8365) += snd-soc-mt8365-pcm.o + +# Machine driver +obj-$(CONFIG_SND_SOC_MT8365_MT6357) += mt8365-mt6357.o diff --git a/sound/soc/mediatek/mt8365/mt8365-afe-clk.c b/sound/soc/mediatek/mt8365/mt8365-afe-clk.c new file mode 100644 index 000000000000..7078c01ba19b --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-afe-clk.c @@ -0,0 +1,420 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 AFE clock control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" +#include "mt8365-reg.h" +#include "../common/mtk-base-afe.h" +#include <linux/device.h> +#include <linux/mfd/syscon.h> + +static const char *aud_clks[MT8365_CLK_NUM] = { + [MT8365_CLK_TOP_AUD_SEL] = "top_audio_sel", + [MT8365_CLK_AUD_I2S0_M] = "audio_i2s0_m", + [MT8365_CLK_AUD_I2S1_M] = "audio_i2s1_m", + [MT8365_CLK_AUD_I2S2_M] = "audio_i2s2_m", + [MT8365_CLK_AUD_I2S3_M] = "audio_i2s3_m", + [MT8365_CLK_ENGEN1] = "engen1", + [MT8365_CLK_ENGEN2] = "engen2", + [MT8365_CLK_AUD1] = "aud1", + [MT8365_CLK_AUD2] = "aud2", + [MT8365_CLK_I2S0_M_SEL] = "i2s0_m_sel", + [MT8365_CLK_I2S1_M_SEL] = "i2s1_m_sel", + [MT8365_CLK_I2S2_M_SEL] = "i2s2_m_sel", + [MT8365_CLK_I2S3_M_SEL] = "i2s3_m_sel", + [MT8365_CLK_CLK26M] = "top_clk26m_clk", +}; + +int mt8365_afe_init_audio_clk(struct mtk_base_afe *afe) +{ + size_t i; + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + for (i = 0; i < ARRAY_SIZE(aud_clks); i++) { + afe_priv->clocks[i] = devm_clk_get(afe->dev, aud_clks[i]); + if (IS_ERR(afe_priv->clocks[i])) { + dev_err(afe->dev, "%s devm_clk_get %s fail\n", + __func__, aud_clks[i]); + return PTR_ERR(afe_priv->clocks[i]); + } + } + return 0; +} + +void mt8365_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk) +{ + clk_disable_unprepare(clk); +} + +int mt8365_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk, + unsigned int rate) +{ + int ret; + + if (clk) { + ret = clk_set_rate(clk, rate); + if (ret) { + dev_err(afe->dev, "Failed to set rate\n"); + return ret; + } + } + return 0; +} + +int mt8365_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk, + struct clk *parent) +{ + int ret; + + if (clk && parent) { + ret = clk_set_parent(clk, parent); + if (ret) { + dev_err(afe->dev, "Failed to set parent\n"); + return ret; + } + } + return 0; +} + +static unsigned int get_top_cg_reg(unsigned int cg_type) +{ + switch (cg_type) { + case MT8365_TOP_CG_AFE: + case MT8365_TOP_CG_I2S_IN: + case MT8365_TOP_CG_22M: + case MT8365_TOP_CG_24M: + case MT8365_TOP_CG_INTDIR_CK: + case MT8365_TOP_CG_APLL2_TUNER: + case MT8365_TOP_CG_APLL_TUNER: + case MT8365_TOP_CG_SPDIF: + case MT8365_TOP_CG_TDM_OUT: + case MT8365_TOP_CG_TDM_IN: + case MT8365_TOP_CG_ADC: + case MT8365_TOP_CG_DAC: + case MT8365_TOP_CG_DAC_PREDIS: + case MT8365_TOP_CG_TML: + return AUDIO_TOP_CON0; + case MT8365_TOP_CG_I2S1_BCLK: + case MT8365_TOP_CG_I2S2_BCLK: + case MT8365_TOP_CG_I2S3_BCLK: + case MT8365_TOP_CG_I2S4_BCLK: + case MT8365_TOP_CG_DMIC0_ADC: + case MT8365_TOP_CG_DMIC1_ADC: + case MT8365_TOP_CG_DMIC2_ADC: + case MT8365_TOP_CG_DMIC3_ADC: + case MT8365_TOP_CG_CONNSYS_I2S_ASRC: + case MT8365_TOP_CG_GENERAL1_ASRC: + case MT8365_TOP_CG_GENERAL2_ASRC: + case MT8365_TOP_CG_TDM_ASRC: + return AUDIO_TOP_CON1; + default: + return 0; + } +} + +static unsigned int get_top_cg_mask(unsigned int cg_type) +{ + switch (cg_type) { + case MT8365_TOP_CG_AFE: + return AUD_TCON0_PDN_AFE; + case MT8365_TOP_CG_I2S_IN: + return AUD_TCON0_PDN_I2S_IN; + case MT8365_TOP_CG_22M: + return AUD_TCON0_PDN_22M; + case MT8365_TOP_CG_24M: + return AUD_TCON0_PDN_24M; + case MT8365_TOP_CG_INTDIR_CK: + return AUD_TCON0_PDN_INTDIR; + case MT8365_TOP_CG_APLL2_TUNER: + return AUD_TCON0_PDN_APLL2_TUNER; + case MT8365_TOP_CG_APLL_TUNER: + return AUD_TCON0_PDN_APLL_TUNER; + case MT8365_TOP_CG_SPDIF: + return AUD_TCON0_PDN_SPDIF; + case MT8365_TOP_CG_TDM_OUT: + return AUD_TCON0_PDN_TDM_OUT; + case MT8365_TOP_CG_TDM_IN: + return AUD_TCON0_PDN_TDM_IN; + case MT8365_TOP_CG_ADC: + return AUD_TCON0_PDN_ADC; + case MT8365_TOP_CG_DAC: + return AUD_TCON0_PDN_DAC; + case MT8365_TOP_CG_DAC_PREDIS: + return AUD_TCON0_PDN_DAC_PREDIS; + case MT8365_TOP_CG_TML: + return AUD_TCON0_PDN_TML; + case MT8365_TOP_CG_I2S1_BCLK: + return AUD_TCON1_PDN_I2S1_BCLK; + case MT8365_TOP_CG_I2S2_BCLK: + return AUD_TCON1_PDN_I2S2_BCLK; + case MT8365_TOP_CG_I2S3_BCLK: + return AUD_TCON1_PDN_I2S3_BCLK; + case MT8365_TOP_CG_I2S4_BCLK: + return AUD_TCON1_PDN_I2S4_BCLK; + case MT8365_TOP_CG_DMIC0_ADC: + return AUD_TCON1_PDN_DMIC0_ADC; + case MT8365_TOP_CG_DMIC1_ADC: + return AUD_TCON1_PDN_DMIC1_ADC; + case MT8365_TOP_CG_DMIC2_ADC: + return AUD_TCON1_PDN_DMIC2_ADC; + case MT8365_TOP_CG_DMIC3_ADC: + return AUD_TCON1_PDN_DMIC3_ADC; + case MT8365_TOP_CG_CONNSYS_I2S_ASRC: + return AUD_TCON1_PDN_CONNSYS_I2S_ASRC; + case MT8365_TOP_CG_GENERAL1_ASRC: + return AUD_TCON1_PDN_GENERAL1_ASRC; + case MT8365_TOP_CG_GENERAL2_ASRC: + return AUD_TCON1_PDN_GENERAL2_ASRC; + case MT8365_TOP_CG_TDM_ASRC: + return AUD_TCON1_PDN_TDM_ASRC; + default: + return 0; + } +} + +static unsigned int get_top_cg_on_val(unsigned int cg_type) +{ + return 0; +} + +static unsigned int get_top_cg_off_val(unsigned int cg_type) +{ + return get_top_cg_mask(cg_type); +} + +int mt8365_afe_enable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + unsigned int reg = get_top_cg_reg(cg_type); + unsigned int mask = get_top_cg_mask(cg_type); + unsigned int val = get_top_cg_on_val(cg_type); + unsigned long flags; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + afe_priv->top_cg_ref_cnt[cg_type]++; + if (afe_priv->top_cg_ref_cnt[cg_type] == 1) + regmap_update_bits(afe->regmap, reg, mask, val); + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +int mt8365_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + unsigned int reg = get_top_cg_reg(cg_type); + unsigned int mask = get_top_cg_mask(cg_type); + unsigned int val = get_top_cg_off_val(cg_type); + unsigned long flags; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + afe_priv->top_cg_ref_cnt[cg_type]--; + if (afe_priv->top_cg_ref_cnt[cg_type] == 0) + regmap_update_bits(afe->regmap, reg, mask, val); + else if (afe_priv->top_cg_ref_cnt[cg_type] < 0) + afe_priv->top_cg_ref_cnt[cg_type] = 0; + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +int mt8365_afe_enable_main_clk(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + clk_prepare_enable(afe_priv->clocks[MT8365_CLK_TOP_AUD_SEL]); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_AFE); + mt8365_afe_enable_afe_on(afe); + + return 0; +} + +int mt8365_afe_disable_main_clk(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + mt8365_afe_disable_afe_on(afe); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_AFE); + mt8365_afe_disable_clk(afe, afe_priv->clocks[MT8365_CLK_TOP_AUD_SEL]); + + return 0; +} + +int mt8365_afe_emi_clk_on(struct mtk_base_afe *afe) +{ + return 0; +} + +int mt8365_afe_emi_clk_off(struct mtk_base_afe *afe) +{ + return 0; +} + +int mt8365_afe_enable_afe_on(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + unsigned long flags; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + afe_priv->afe_on_ref_cnt++; + if (afe_priv->afe_on_ref_cnt == 1) + regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x1); + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +int mt8365_afe_disable_afe_on(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + unsigned long flags; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + afe_priv->afe_on_ref_cnt--; + if (afe_priv->afe_on_ref_cnt == 0) + regmap_update_bits(afe->regmap, AFE_DAC_CON0, 0x1, 0x0); + else if (afe_priv->afe_on_ref_cnt < 0) + afe_priv->afe_on_ref_cnt = 0; + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +static int mt8365_afe_hd_engen_enable(struct mtk_base_afe *afe, bool apll1) +{ + if (apll1) + regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE, + AFE_22M_PLL_EN, AFE_22M_PLL_EN); + else + regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE, + AFE_24M_PLL_EN, AFE_24M_PLL_EN); + + return 0; +} + +static int mt8365_afe_hd_engen_disable(struct mtk_base_afe *afe, bool apll1) +{ + if (apll1) + regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE, + AFE_22M_PLL_EN, ~AFE_22M_PLL_EN); + else + regmap_update_bits(afe->regmap, AFE_HD_ENGEN_ENABLE, + AFE_24M_PLL_EN, ~AFE_24M_PLL_EN); + + return 0; +} + +int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + mutex_lock(&afe_priv->afe_clk_mutex); + + afe_priv->apll_tuner_ref_cnt[apll]++; + if (afe_priv->apll_tuner_ref_cnt[apll] != 1) { + mutex_unlock(&afe_priv->afe_clk_mutex); + return 0; + } + + if (apll == MT8365_AFE_APLL1) { + regmap_update_bits(afe->regmap, AFE_APLL_TUNER_CFG, + AFE_APLL_TUNER_CFG_MASK, 0x432); + regmap_update_bits(afe->regmap, AFE_APLL_TUNER_CFG, + AFE_APLL_TUNER_CFG_EN_MASK, 0x1); + } else { + regmap_update_bits(afe->regmap, AFE_APLL_TUNER_CFG1, + AFE_APLL_TUNER_CFG1_MASK, 0x434); + regmap_update_bits(afe->regmap, AFE_APLL_TUNER_CFG1, + AFE_APLL_TUNER_CFG1_EN_MASK, 0x1); + } + + mutex_unlock(&afe_priv->afe_clk_mutex); + return 0; +} + +int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + mutex_lock(&afe_priv->afe_clk_mutex); + + afe_priv->apll_tuner_ref_cnt[apll]--; + if (afe_priv->apll_tuner_ref_cnt[apll] == 0) { + if (apll == MT8365_AFE_APLL1) + regmap_update_bits(afe->regmap, AFE_APLL_TUNER_CFG, + AFE_APLL_TUNER_CFG_EN_MASK, 0x0); + else + regmap_update_bits(afe->regmap, AFE_APLL_TUNER_CFG1, + AFE_APLL_TUNER_CFG1_EN_MASK, 0x0); + + } else if (afe_priv->apll_tuner_ref_cnt[apll] < 0) { + afe_priv->apll_tuner_ref_cnt[apll] = 0; + } + + mutex_unlock(&afe_priv->afe_clk_mutex); + return 0; +} + +int mt8365_afe_enable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + if (apll == MT8365_AFE_APLL1) { + if (clk_prepare_enable(afe_priv->clocks[MT8365_CLK_ENGEN1])) { + dev_info(afe->dev, "%s Failed to enable ENGEN1 clk\n", + __func__); + return 0; + } + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_22M); + mt8365_afe_hd_engen_enable(afe, true); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_APLL_TUNER); + mt8365_afe_enable_apll_tuner_cfg(afe, MT8365_AFE_APLL1); + } else { + if (clk_prepare_enable(afe_priv->clocks[MT8365_CLK_ENGEN2])) { + dev_info(afe->dev, "%s Failed to enable ENGEN2 clk\n", + __func__); + return 0; + } + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_24M); + mt8365_afe_hd_engen_enable(afe, false); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_APLL2_TUNER); + mt8365_afe_enable_apll_tuner_cfg(afe, MT8365_AFE_APLL2); + } + + return 0; +} + +int mt8365_afe_disable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + if (apll == MT8365_AFE_APLL1) { + mt8365_afe_disable_apll_tuner_cfg(afe, MT8365_AFE_APLL1); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_APLL_TUNER); + mt8365_afe_hd_engen_disable(afe, true); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_22M); + clk_disable_unprepare(afe_priv->clocks[MT8365_CLK_ENGEN1]); + } else { + mt8365_afe_disable_apll_tuner_cfg(afe, MT8365_AFE_APLL2); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_APLL2_TUNER); + mt8365_afe_hd_engen_disable(afe, false); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_24M); + clk_disable_unprepare(afe_priv->clocks[MT8365_CLK_ENGEN2]); + } + + return 0; +} diff --git a/sound/soc/mediatek/mt8365/mt8365-afe-clk.h b/sound/soc/mediatek/mt8365/mt8365-afe-clk.h new file mode 100644 index 000000000000..a6fa653f2183 --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-afe-clk.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * MediaTek 8365 AFE clock control definitions + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#ifndef _MT8365_AFE_UTILS_H_ +#define _MT8365_AFE_UTILS_H_ + +struct mtk_base_afe; +struct clk; + +int mt8365_afe_init_audio_clk(struct mtk_base_afe *afe); +void mt8365_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk); +int mt8365_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk, unsigned int rate); +int mt8365_afe_set_clk_parent(struct mtk_base_afe *afe, struct clk *clk, struct clk *parent); +int mt8365_afe_enable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type); +int mt8365_afe_disable_top_cg(struct mtk_base_afe *afe, unsigned int cg_type); +int mt8365_afe_enable_main_clk(struct mtk_base_afe *afe); +int mt8365_afe_disable_main_clk(struct mtk_base_afe *afe); +int mt8365_afe_emi_clk_on(struct mtk_base_afe *afe); +int mt8365_afe_emi_clk_off(struct mtk_base_afe *afe); +int mt8365_afe_enable_afe_on(struct mtk_base_afe *afe); +int mt8365_afe_disable_afe_on(struct mtk_base_afe *afe); +int mt8365_afe_enable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll); +int mt8365_afe_disable_apll_tuner_cfg(struct mtk_base_afe *afe, unsigned int apll); +int mt8365_afe_enable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll); +int mt8365_afe_disable_apll_associated_cfg(struct mtk_base_afe *afe, unsigned int apll); +#endif diff --git a/sound/soc/mediatek/mt8365/mt8365-afe-common.h b/sound/soc/mediatek/mt8365/mt8365-afe-common.h new file mode 100644 index 000000000000..731406e15ac7 --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-afe-common.h @@ -0,0 +1,448 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * MediaTek 8365 audio driver common definitions + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#ifndef _MT8365_AFE_COMMON_H_ +#define _MT8365_AFE_COMMON_H_ + +#include <linux/clk.h> +#include <linux/list.h> +#include <linux/regmap.h> +#include <sound/soc.h> +#include <sound/asound.h> +#include "../common/mtk-base-afe.h" +#include "mt8365-reg.h" + +enum { + MT8365_AFE_MEMIF_DL1, + MT8365_AFE_MEMIF_DL2, + MT8365_AFE_MEMIF_TDM_OUT, + /* + * MT8365_AFE_MEMIF_SPDIF_OUT, + */ + MT8365_AFE_MEMIF_AWB, + MT8365_AFE_MEMIF_VUL, + MT8365_AFE_MEMIF_VUL2, + MT8365_AFE_MEMIF_VUL3, + MT8365_AFE_MEMIF_TDM_IN, + /* + * MT8365_AFE_MEMIF_SPDIF_IN, + */ + MT8365_AFE_MEMIF_NUM, + MT8365_AFE_BACKEND_BASE = MT8365_AFE_MEMIF_NUM, + MT8365_AFE_IO_TDM_OUT = MT8365_AFE_BACKEND_BASE, + MT8365_AFE_IO_TDM_IN, + MT8365_AFE_IO_I2S, + MT8365_AFE_IO_2ND_I2S, + MT8365_AFE_IO_PCM1, + MT8365_AFE_IO_VIRTUAL_DL_SRC, + MT8365_AFE_IO_VIRTUAL_TDM_OUT_SRC, + MT8365_AFE_IO_VIRTUAL_FM, + MT8365_AFE_IO_DMIC, + MT8365_AFE_IO_INT_ADDA, + MT8365_AFE_IO_GASRC1, + MT8365_AFE_IO_GASRC2, + MT8365_AFE_IO_TDM_ASRC, + MT8365_AFE_IO_HW_GAIN1, + MT8365_AFE_IO_HW_GAIN2, + MT8365_AFE_BACKEND_END, + MT8365_AFE_BACKEND_NUM = (MT8365_AFE_BACKEND_END - + MT8365_AFE_BACKEND_BASE), +}; + +enum { + MT8365_AFE_IRQ1, + MT8365_AFE_IRQ2, + MT8365_AFE_IRQ3, + MT8365_AFE_IRQ4, + MT8365_AFE_IRQ5, + MT8365_AFE_IRQ6, + MT8365_AFE_IRQ7, + MT8365_AFE_IRQ8, + MT8365_AFE_IRQ9, + MT8365_AFE_IRQ10, + MT8365_AFE_IRQ_NUM, +}; + +enum { + MT8365_TOP_CG_AFE, + MT8365_TOP_CG_I2S_IN, + MT8365_TOP_CG_22M, + MT8365_TOP_CG_24M, + MT8365_TOP_CG_INTDIR_CK, + MT8365_TOP_CG_APLL2_TUNER, + MT8365_TOP_CG_APLL_TUNER, + MT8365_TOP_CG_SPDIF, + MT8365_TOP_CG_TDM_OUT, + MT8365_TOP_CG_TDM_IN, + MT8365_TOP_CG_ADC, + MT8365_TOP_CG_DAC, + MT8365_TOP_CG_DAC_PREDIS, + MT8365_TOP_CG_TML, + MT8365_TOP_CG_I2S1_BCLK, + MT8365_TOP_CG_I2S2_BCLK, + MT8365_TOP_CG_I2S3_BCLK, + MT8365_TOP_CG_I2S4_BCLK, + MT8365_TOP_CG_DMIC0_ADC, + MT8365_TOP_CG_DMIC1_ADC, + MT8365_TOP_CG_DMIC2_ADC, + MT8365_TOP_CG_DMIC3_ADC, + MT8365_TOP_CG_CONNSYS_I2S_ASRC, + MT8365_TOP_CG_GENERAL1_ASRC, + MT8365_TOP_CG_GENERAL2_ASRC, + MT8365_TOP_CG_TDM_ASRC, + MT8365_TOP_CG_NUM +}; + +enum { + MT8365_CLK_TOP_AUD_SEL, + MT8365_CLK_AUD_I2S0_M, + MT8365_CLK_AUD_I2S1_M, + MT8365_CLK_AUD_I2S2_M, + MT8365_CLK_AUD_I2S3_M, + MT8365_CLK_ENGEN1, + MT8365_CLK_ENGEN2, + MT8365_CLK_AUD1, + MT8365_CLK_AUD2, + MT8365_CLK_I2S0_M_SEL, + MT8365_CLK_I2S1_M_SEL, + MT8365_CLK_I2S2_M_SEL, + MT8365_CLK_I2S3_M_SEL, + MT8365_CLK_CLK26M, + MT8365_CLK_NUM +}; + +enum { + MT8365_AFE_APLL1 = 0, + MT8365_AFE_APLL2, + MT8365_AFE_APLL_NUM, +}; + +enum { + MT8365_AFE_1ST_I2S = 0, + MT8365_AFE_2ND_I2S, + MT8365_AFE_I2S_SETS, +}; + +enum { + MT8365_AFE_I2S_SEPARATE_CLOCK = 0, + MT8365_AFE_I2S_SHARED_CLOCK, +}; + +enum { + MT8365_AFE_TDM_OUT_I2S = 0, + MT8365_AFE_TDM_OUT_TDM, + MT8365_AFE_TDM_OUT_I2S_32BITS, +}; + +enum mt8365_afe_tdm_ch_start { + AFE_TDM_CH_START_O28_O29 = 0, + AFE_TDM_CH_START_O30_O31, + AFE_TDM_CH_START_O32_O33, + AFE_TDM_CH_START_O34_O35, + AFE_TDM_CH_ZERO, +}; + +enum { + MT8365_PCM_FORMAT_I2S = 0, + MT8365_PCM_FORMAT_EIAJ, + MT8365_PCM_FORMAT_PCMA, + MT8365_PCM_FORMAT_PCMB, +}; + +enum { + MT8365_FS_8K = 0, + MT8365_FS_11D025K, + MT8365_FS_12K, + MT8365_FS_384K, + MT8365_FS_16K, + MT8365_FS_22D05K, + MT8365_FS_24K, + MT8365_FS_130K, + MT8365_FS_32K, + MT8365_FS_44D1K, + MT8365_FS_48K, + MT8365_FS_88D2K, + MT8365_FS_96K, + MT8365_FS_176D4K, + MT8365_FS_192K, +}; + +enum { + FS_8000HZ = 0, /* 0000b */ + FS_11025HZ = 1, /* 0001b */ + FS_12000HZ = 2, /* 0010b */ + FS_384000HZ = 3, /* 0011b */ + FS_16000HZ = 4, /* 0100b */ + FS_22050HZ = 5, /* 0101b */ + FS_24000HZ = 6, /* 0110b */ + FS_130000HZ = 7, /* 0111b */ + FS_32000HZ = 8, /* 1000b */ + FS_44100HZ = 9, /* 1001b */ + FS_48000HZ = 10, /* 1010b */ + FS_88200HZ = 11, /* 1011b */ + FS_96000HZ = 12, /* 1100b */ + FS_176400HZ = 13, /* 1101b */ + FS_192000HZ = 14, /* 1110b */ + FS_260000HZ = 15, /* 1111b */ +}; + +enum { + MT8365_AFE_DEBUGFS_AFE, + MT8365_AFE_DEBUGFS_MEMIF, + MT8365_AFE_DEBUGFS_IRQ, + MT8365_AFE_DEBUGFS_CONN, + MT8365_AFE_DEBUGFS_DBG, + MT8365_AFE_DEBUGFS_NUM, +}; + +enum { + MT8365_AFE_IRQ_DIR_MCU = 0, + MT8365_AFE_IRQ_DIR_DSP, + MT8365_AFE_IRQ_DIR_BOTH, +}; + +/* MCLK */ +enum { + MT8365_I2S0_MCK = 0, + MT8365_I2S3_MCK, + MT8365_MCK_NUM, +}; + +struct mt8365_fe_dai_data { + bool use_sram; + unsigned int sram_phy_addr; + void __iomem *sram_vir_addr; + unsigned int sram_size; +}; + +struct mt8365_be_dai_data { + bool prepared[SNDRV_PCM_STREAM_LAST + 1]; + unsigned int fmt_mode; +}; + +#define MT8365_CLK_26M 26000000 +#define MT8365_CLK_24M 24000000 +#define MT8365_CLK_22M 22000000 +#define MT8365_CM_UPDATA_CNT_SET 8 + +enum mt8365_cm_num { + MT8365_CM1 = 0, + MT8365_CM2, + MT8365_CM_NUM, +}; + +enum mt8365_cm2_mux_in { + MT8365_FROM_GASRC1 = 1, + MT8365_FROM_GASRC2, + MT8365_FROM_TDM_ASRC, + MT8365_CM_MUX_NUM, +}; + +enum cm2_mux_conn_in { + GENERAL2_ASRC_OUT_LCH = 0, + GENERAL2_ASRC_OUT_RCH = 1, + TDM_IN_CH0 = 2, + TDM_IN_CH1 = 3, + TDM_IN_CH2 = 4, + TDM_IN_CH3 = 5, + TDM_IN_CH4 = 6, + TDM_IN_CH5 = 7, + TDM_IN_CH6 = 8, + TDM_IN_CH7 = 9, + GENERAL1_ASRC_OUT_LCH = 10, + GENERAL1_ASRC_OUT_RCH = 11, + TDM_OUT_ASRC_CH0 = 12, + TDM_OUT_ASRC_CH1 = 13, + TDM_OUT_ASRC_CH2 = 14, + TDM_OUT_ASRC_CH3 = 15, + TDM_OUT_ASRC_CH4 = 16, + TDM_OUT_ASRC_CH5 = 17, + TDM_OUT_ASRC_CH6 = 18, + TDM_OUT_ASRC_CH7 = 19 +}; + +struct mt8365_cm_ctrl_reg { + unsigned int con0; + unsigned int con1; + unsigned int con2; + unsigned int con3; + unsigned int con4; +}; + +struct mt8365_control_data { + bool bypass_cm1; + bool bypass_cm2; + unsigned int loopback_type; +}; + +enum dmic_input_mode { + DMIC_MODE_3P25M = 0, + DMIC_MODE_1P625M, + DMIC_MODE_812P5K, + DMIC_MODE_406P25K, +}; + +enum iir_mode { + IIR_MODE0 = 0, + IIR_MODE1, + IIR_MODE2, + IIR_MODE3, + IIR_MODE4, + IIR_MODE5, +}; + +enum { + MT8365_GASRC1 = 0, + MT8365_GASRC2, + MT8365_GASRC_NUM, + MT8365_TDM_ASRC1 = MT8365_GASRC_NUM, + MT8365_TDM_ASRC2, + MT8365_TDM_ASRC3, + MT8365_TDM_ASRC4, + MT8365_TDM_ASRC_NUM, +}; + +struct mt8365_gasrc_ctrl_reg { + unsigned int con0; + unsigned int con2; + unsigned int con3; + unsigned int con4; + unsigned int con5; + unsigned int con6; + unsigned int con9; + unsigned int con10; + unsigned int con12; + unsigned int con13; +}; + +struct mt8365_gasrc_data { + bool duplex; + bool tx_mode; + bool cali_on; + bool tdm_asrc_out_cm2; + bool iir_on; +}; + +struct mt8365_afe_private { + struct clk *clocks[MT8365_CLK_NUM]; + struct regmap *topckgen; + struct mt8365_fe_dai_data fe_data[MT8365_AFE_MEMIF_NUM]; + struct mt8365_be_dai_data be_data[MT8365_AFE_BACKEND_NUM]; + struct mt8365_control_data ctrl_data; + struct mt8365_gasrc_data gasrc_data[MT8365_TDM_ASRC_NUM]; + int afe_on_ref_cnt; + int top_cg_ref_cnt[MT8365_TOP_CG_NUM]; + void __iomem *afe_sram_vir_addr; + unsigned int afe_sram_phy_addr; + unsigned int afe_sram_size; + /* locks */ + spinlock_t afe_ctrl_lock; + struct mutex afe_clk_mutex; /* Protect & sync APLL TUNER registers access*/ +#ifdef CONFIG_DEBUG_FS + struct dentry *debugfs_dentry[MT8365_AFE_DEBUGFS_NUM]; +#endif + int apll_tuner_ref_cnt[MT8365_AFE_APLL_NUM]; + unsigned int tdm_out_mode; + unsigned int cm2_mux_input; + + /* dai */ + bool dai_on[MT8365_AFE_BACKEND_END]; + void *dai_priv[MT8365_AFE_BACKEND_END]; +}; + +static inline u32 rx_frequency_palette(unsigned int fs) +{ + /* * + * A = (26M / fs) * 64 + * B = 8125 / A + * return = DEC2HEX(B * 2^23) + */ + switch (fs) { + case FS_8000HZ: return 0x050000; + case FS_11025HZ: return 0x06E400; + case FS_12000HZ: return 0x078000; + case FS_16000HZ: return 0x0A0000; + case FS_22050HZ: return 0x0DC800; + case FS_24000HZ: return 0x0F0000; + case FS_32000HZ: return 0x140000; + case FS_44100HZ: return 0x1B9000; + case FS_48000HZ: return 0x1E0000; + case FS_88200HZ: return 0x372000; + case FS_96000HZ: return 0x3C0000; + case FS_176400HZ: return 0x6E4000; + case FS_192000HZ: return 0x780000; + default: return 0x0; + } +} + +static inline u32 AutoRstThHi(unsigned int fs) +{ + switch (fs) { + case FS_8000HZ: return 0x36000; + case FS_11025HZ: return 0x27000; + case FS_12000HZ: return 0x24000; + case FS_16000HZ: return 0x1B000; + case FS_22050HZ: return 0x14000; + case FS_24000HZ: return 0x12000; + case FS_32000HZ: return 0x0D800; + case FS_44100HZ: return 0x09D00; + case FS_48000HZ: return 0x08E00; + case FS_88200HZ: return 0x04E00; + case FS_96000HZ: return 0x04800; + case FS_176400HZ: return 0x02700; + case FS_192000HZ: return 0x02400; + default: return 0x0; + } +} + +static inline u32 AutoRstThLo(unsigned int fs) +{ + switch (fs) { + case FS_8000HZ: return 0x30000; + case FS_11025HZ: return 0x23000; + case FS_12000HZ: return 0x20000; + case FS_16000HZ: return 0x18000; + case FS_22050HZ: return 0x11000; + case FS_24000HZ: return 0x0FE00; + case FS_32000HZ: return 0x0BE00; + case FS_44100HZ: return 0x08A00; + case FS_48000HZ: return 0x07F00; + case FS_88200HZ: return 0x04500; + case FS_96000HZ: return 0x04000; + case FS_176400HZ: return 0x02300; + case FS_192000HZ: return 0x02000; + default: return 0x0; + } +} + +bool mt8365_afe_rate_supported(unsigned int rate, unsigned int id); +bool mt8365_afe_channel_supported(unsigned int channel, unsigned int id); + +int mt8365_dai_i2s_register(struct mtk_base_afe *afe); +int mt8365_dai_set_priv(struct mtk_base_afe *afe, + int id, + int priv_size, + const void *priv_data); + +int mt8365_afe_fs_timing(unsigned int rate); + +void mt8365_afe_set_i2s_out_enable(struct mtk_base_afe *afe, bool enable); +int mt8365_afe_set_i2s_out(struct mtk_base_afe *afe, unsigned int rate, int bit_width); + +int mt8365_dai_adda_register(struct mtk_base_afe *afe); +int mt8365_dai_enable_adda_on(struct mtk_base_afe *afe); +int mt8365_dai_disable_adda_on(struct mtk_base_afe *afe); + +int mt8365_dai_dmic_register(struct mtk_base_afe *afe); + +int mt8365_dai_pcm_register(struct mtk_base_afe *afe); + +int mt8365_dai_tdm_register(struct mtk_base_afe *afe); + +#endif diff --git a/sound/soc/mediatek/mt8365/mt8365-afe-pcm.c b/sound/soc/mediatek/mt8365/mt8365-afe-pcm.c new file mode 100644 index 000000000000..10793bbe9275 --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-afe-pcm.c @@ -0,0 +1,2273 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 ALSA SoC AFE platform driver + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#include <linux/delay.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/dma-mapping.h> +#include <linux/pm_runtime.h> +#include <sound/soc.h> +#include <sound/pcm_params.h> +#include "mt8365-afe-common.h" +#include "mt8365-afe-clk.h" +#include "mt8365-reg.h" +#include "../common/mtk-base-afe.h" +#include "../common/mtk-afe-platform-driver.h" +#include "../common/mtk-afe-fe-dai.h" + +#define AFE_BASE_END_OFFSET 8 + +static unsigned int mCM2Input; + +static const unsigned int mt8365_afe_backup_list[] = { + AUDIO_TOP_CON0, + AFE_CONN0, + AFE_CONN1, + AFE_CONN3, + AFE_CONN4, + AFE_CONN5, + AFE_CONN6, + AFE_CONN7, + AFE_CONN8, + AFE_CONN9, + AFE_CONN10, + AFE_CONN11, + AFE_CONN12, + AFE_CONN13, + AFE_CONN14, + AFE_CONN15, + AFE_CONN16, + AFE_CONN17, + AFE_CONN18, + AFE_CONN19, + AFE_CONN20, + AFE_CONN21, + AFE_CONN26, + AFE_CONN27, + AFE_CONN28, + AFE_CONN29, + AFE_CONN30, + AFE_CONN31, + AFE_CONN32, + AFE_CONN33, + AFE_CONN34, + AFE_CONN35, + AFE_CONN36, + AFE_CONN_24BIT, + AFE_CONN_24BIT_1, + AFE_DAC_CON0, + AFE_DAC_CON1, + AFE_DL1_BASE, + AFE_DL1_END, + AFE_DL2_BASE, + AFE_DL2_END, + AFE_VUL_BASE, + AFE_VUL_END, + AFE_AWB_BASE, + AFE_AWB_END, + AFE_VUL3_BASE, + AFE_VUL3_END, + AFE_HDMI_OUT_BASE, + AFE_HDMI_OUT_END, + AFE_HDMI_IN_2CH_BASE, + AFE_HDMI_IN_2CH_END, + AFE_ADDA_UL_DL_CON0, + AFE_ADDA_DL_SRC2_CON0, + AFE_ADDA_DL_SRC2_CON1, + AFE_I2S_CON, + AFE_I2S_CON1, + AFE_I2S_CON2, + AFE_I2S_CON3, + AFE_ADDA_UL_SRC_CON0, + AFE_AUD_PAD_TOP, + AFE_HD_ENGEN_ENABLE, +}; + +static const struct snd_pcm_hardware mt8365_afe_hardware = { + .info = (SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_MMAP_VALID), + .buffer_bytes_max = 256 * 1024, + .period_bytes_min = 512, + .period_bytes_max = 128 * 1024, + .periods_min = 2, + .periods_max = 256, + .fifo_size = 0, +}; + +struct mt8365_afe_rate { + unsigned int rate; + unsigned int reg_val; +}; + +static const struct mt8365_afe_rate mt8365_afe_fs_rates[] = { + { .rate = 8000, .reg_val = MT8365_FS_8K }, + { .rate = 11025, .reg_val = MT8365_FS_11D025K }, + { .rate = 12000, .reg_val = MT8365_FS_12K }, + { .rate = 16000, .reg_val = MT8365_FS_16K }, + { .rate = 22050, .reg_val = MT8365_FS_22D05K }, + { .rate = 24000, .reg_val = MT8365_FS_24K }, + { .rate = 32000, .reg_val = MT8365_FS_32K }, + { .rate = 44100, .reg_val = MT8365_FS_44D1K }, + { .rate = 48000, .reg_val = MT8365_FS_48K }, + { .rate = 88200, .reg_val = MT8365_FS_88D2K }, + { .rate = 96000, .reg_val = MT8365_FS_96K }, + { .rate = 176400, .reg_val = MT8365_FS_176D4K }, + { .rate = 192000, .reg_val = MT8365_FS_192K }, +}; + +int mt8365_afe_fs_timing(unsigned int rate) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(mt8365_afe_fs_rates); i++) + if (mt8365_afe_fs_rates[i].rate == rate) + return mt8365_afe_fs_rates[i].reg_val; + + return -EINVAL; +} + +bool mt8365_afe_rate_supported(unsigned int rate, unsigned int id) +{ + switch (id) { + case MT8365_AFE_IO_TDM_IN: + if (rate >= 8000 && rate <= 192000) + return true; + break; + case MT8365_AFE_IO_DMIC: + if (rate >= 8000 && rate <= 48000) + return true; + break; + default: + break; + } + + return false; +} + +bool mt8365_afe_channel_supported(unsigned int channel, unsigned int id) +{ + switch (id) { + case MT8365_AFE_IO_TDM_IN: + if (channel >= 1 && channel <= 8) + return true; + break; + case MT8365_AFE_IO_DMIC: + if (channel >= 1 && channel <= 8) + return true; + break; + default: + break; + } + + return false; +} + +static bool mt8365_afe_clk_group_44k(int sample_rate) +{ + if (sample_rate == 11025 || + sample_rate == 22050 || + sample_rate == 44100 || + sample_rate == 88200 || + sample_rate == 176400) + return true; + else + return false; +} + +static bool mt8365_afe_clk_group_48k(int sample_rate) +{ + return (!mt8365_afe_clk_group_44k(sample_rate)); +} + +int mt8365_dai_set_priv(struct mtk_base_afe *afe, int id, + int priv_size, const void *priv_data) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + void *temp_data; + + temp_data = devm_kzalloc(afe->dev, priv_size, GFP_KERNEL); + if (!temp_data) + return -ENOMEM; + + if (priv_data) + memcpy(temp_data, priv_data, priv_size); + + afe_priv->dai_priv[id] = temp_data; + + return 0; +} + +static int mt8365_afe_irq_direction_enable(struct mtk_base_afe *afe, + int irq_id, int direction) +{ + struct mtk_base_afe_irq *irq; + + if (irq_id >= MT8365_AFE_IRQ_NUM) + return -1; + + irq = &afe->irqs[irq_id]; + + if (direction == MT8365_AFE_IRQ_DIR_MCU) { + regmap_update_bits(afe->regmap, AFE_IRQ_MCU_DSP_EN, + (1 << irq->irq_data->irq_clr_shift), + 0); + regmap_update_bits(afe->regmap, AFE_IRQ_MCU_EN, + (1 << irq->irq_data->irq_clr_shift), + (1 << irq->irq_data->irq_clr_shift)); + } else if (direction == MT8365_AFE_IRQ_DIR_DSP) { + regmap_update_bits(afe->regmap, AFE_IRQ_MCU_DSP_EN, + (1 << irq->irq_data->irq_clr_shift), + (1 << irq->irq_data->irq_clr_shift)); + regmap_update_bits(afe->regmap, AFE_IRQ_MCU_EN, + (1 << irq->irq_data->irq_clr_shift), + 0); + } else { + regmap_update_bits(afe->regmap, AFE_IRQ_MCU_DSP_EN, + (1 << irq->irq_data->irq_clr_shift), + (1 << irq->irq_data->irq_clr_shift)); + regmap_update_bits(afe->regmap, AFE_IRQ_MCU_EN, + (1 << irq->irq_data->irq_clr_shift), + (1 << irq->irq_data->irq_clr_shift)); + } + return 0; +} + +static int mt8365_memif_fs(struct snd_pcm_substream *substream, + unsigned int rate) +{ + return mt8365_afe_fs_timing(rate); +} + +static int mt8365_irq_fs(struct snd_pcm_substream *substream, + unsigned int rate) +{ + return mt8365_memif_fs(substream, rate); +} + +static const struct mt8365_cm_ctrl_reg cm_ctrl_reg[MT8365_CM_NUM] = { + [MT8365_CM1] = { + .con0 = AFE_CM1_CON0, + .con1 = AFE_CM1_CON1, + .con2 = AFE_CM1_CON2, + .con3 = AFE_CM1_CON3, + .con4 = AFE_CM1_CON4, + }, + [MT8365_CM2] = { + .con0 = AFE_CM2_CON0, + .con1 = AFE_CM2_CON1, + .con2 = AFE_CM2_CON2, + .con3 = AFE_CM2_CON3, + .con4 = AFE_CM2_CON4, + } +}; + +static int mt8365_afe_cm2_mux_conn(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + unsigned int input = afe_priv->cm2_mux_input; + + /* TDM_IN interconnect to CM2 */ + regmap_update_bits(afe->regmap, AFE_CM2_CONN0, + CM2_AFE_CM2_CONN_CFG1_MASK, + CM2_AFE_CM2_CONN_CFG1(TDM_IN_CH0)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN0, + CM2_AFE_CM2_CONN_CFG2_MASK, + CM2_AFE_CM2_CONN_CFG2(TDM_IN_CH1)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN0, + CM2_AFE_CM2_CONN_CFG3_MASK, + CM2_AFE_CM2_CONN_CFG3(TDM_IN_CH2)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN0, + CM2_AFE_CM2_CONN_CFG4_MASK, + CM2_AFE_CM2_CONN_CFG4(TDM_IN_CH3)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN0, + CM2_AFE_CM2_CONN_CFG5_MASK, + CM2_AFE_CM2_CONN_CFG5(TDM_IN_CH4)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN0, + CM2_AFE_CM2_CONN_CFG6_MASK, + CM2_AFE_CM2_CONN_CFG6(TDM_IN_CH5)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG7_MASK, + CM2_AFE_CM2_CONN_CFG7(TDM_IN_CH6)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG8_MASK, + CM2_AFE_CM2_CONN_CFG8(TDM_IN_CH7)); + + /* ref data interconnect to CM2 */ + if (input == MT8365_FROM_GASRC1) { + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG9_MASK, + CM2_AFE_CM2_CONN_CFG9(GENERAL1_ASRC_OUT_LCH)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG10_MASK, + CM2_AFE_CM2_CONN_CFG10(GENERAL1_ASRC_OUT_RCH)); + } else if (input == MT8365_FROM_GASRC2) { + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG9_MASK, + CM2_AFE_CM2_CONN_CFG9(GENERAL2_ASRC_OUT_LCH)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG10_MASK, + CM2_AFE_CM2_CONN_CFG10(GENERAL2_ASRC_OUT_RCH)); + } else if (input == MT8365_FROM_TDM_ASRC) { + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG9_MASK, + CM2_AFE_CM2_CONN_CFG9(TDM_OUT_ASRC_CH0)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG10_MASK, + CM2_AFE_CM2_CONN_CFG10(TDM_OUT_ASRC_CH1)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG11_MASK, + CM2_AFE_CM2_CONN_CFG11(TDM_OUT_ASRC_CH2)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN1, + CM2_AFE_CM2_CONN_CFG12_MASK, + CM2_AFE_CM2_CONN_CFG12(TDM_OUT_ASRC_CH3)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN2, + CM2_AFE_CM2_CONN_CFG13_MASK, + CM2_AFE_CM2_CONN_CFG13(TDM_OUT_ASRC_CH4)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN2, + CM2_AFE_CM2_CONN_CFG14_MASK, + CM2_AFE_CM2_CONN_CFG14(TDM_OUT_ASRC_CH5)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN2, + CM2_AFE_CM2_CONN_CFG15_MASK, + CM2_AFE_CM2_CONN_CFG15(TDM_OUT_ASRC_CH6)); + regmap_update_bits(afe->regmap, AFE_CM2_CONN2, + CM2_AFE_CM2_CONN_CFG16_MASK, + CM2_AFE_CM2_CONN_CFG16(TDM_OUT_ASRC_CH7)); + } else { + dev_err(afe->dev, "%s wrong CM2 input %d\n", __func__, input); + return -1; + } + + return 0; +} + +static int mt8365_afe_get_cm_update_cnt(struct mtk_base_afe *afe, + enum mt8365_cm_num cmNum, + unsigned int rate, unsigned int channel) +{ + unsigned int total_cnt, div_cnt, ch_pair, best_cnt; + unsigned int ch_update_cnt[MT8365_CM_UPDATA_CNT_SET]; + int i; + + /* calculate cm update cnt + * total_cnt = clk / fs, clk is 26m or 24m or 22m + * div_cnt = total_cnt / ch_pair, max ch 16ch ,2ch is a set + * best_cnt < div_cnt ,we set best_cnt = div_cnt -10 + * ch01 = best_cnt, ch23 = 2* ch01_up_cnt + * ch45 = 3* ch01_up_cnt ...ch1415 = 8* ch01_up_cnt + */ + + if (cmNum == MT8365_CM1) { + total_cnt = MT8365_CLK_26M / rate; + } else if (cmNum == MT8365_CM2) { + if (mt8365_afe_clk_group_48k(rate)) + total_cnt = MT8365_CLK_24M / rate; + else + total_cnt = MT8365_CLK_22M / rate; + } else { + return -1; + } + + if (channel % 2) + ch_pair = (channel / 2) + 1; + else + ch_pair = channel / 2; + + div_cnt = total_cnt / ch_pair; + best_cnt = div_cnt - 10; + + if (best_cnt <= 0) + return -1; + + for (i = 0; i < ch_pair; i++) + ch_update_cnt[i] = (i + 1) * best_cnt; + + switch (channel) { + case 16: + fallthrough; + case 15: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con4, + CM_AFE_CM_UPDATE_CNT2_MASK, + CM_AFE_CM_UPDATE_CNT2(ch_update_cnt[7])); + fallthrough; + case 14: + fallthrough; + case 13: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con4, + CM_AFE_CM_UPDATE_CNT1_MASK, + CM_AFE_CM_UPDATE_CNT1(ch_update_cnt[6])); + fallthrough; + case 12: + fallthrough; + case 11: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con3, + CM_AFE_CM_UPDATE_CNT2_MASK, + CM_AFE_CM_UPDATE_CNT2(ch_update_cnt[5])); + fallthrough; + case 10: + fallthrough; + case 9: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con3, + CM_AFE_CM_UPDATE_CNT1_MASK, + CM_AFE_CM_UPDATE_CNT1(ch_update_cnt[4])); + fallthrough; + case 8: + fallthrough; + case 7: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con2, + CM_AFE_CM_UPDATE_CNT2_MASK, + CM_AFE_CM_UPDATE_CNT2(ch_update_cnt[3])); + fallthrough; + case 6: + fallthrough; + case 5: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con2, + CM_AFE_CM_UPDATE_CNT1_MASK, + CM_AFE_CM_UPDATE_CNT1(ch_update_cnt[2])); + fallthrough; + case 4: + fallthrough; + case 3: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con1, + CM_AFE_CM_UPDATE_CNT2_MASK, + CM_AFE_CM_UPDATE_CNT2(ch_update_cnt[1])); + fallthrough; + case 2: + fallthrough; + case 1: + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con1, + CM_AFE_CM_UPDATE_CNT1_MASK, + CM_AFE_CM_UPDATE_CNT1(ch_update_cnt[0])); + break; + default: + return -1; + } + + return 0; +} + +static int mt8365_afe_configure_cm(struct mtk_base_afe *afe, + enum mt8365_cm_num cmNum, + unsigned int channels, + unsigned int rate) +{ + unsigned int val, mask; + unsigned int fs = mt8365_afe_fs_timing(rate); + + val = FIELD_PREP(CM_AFE_CM_CH_NUM_MASK, (channels - 1)) | + FIELD_PREP(CM_AFE_CM_START_DATA_MASK, 0); + + mask = CM_AFE_CM_CH_NUM_MASK | + CM_AFE_CM_START_DATA_MASK; + + if (cmNum == MT8365_CM1) { + val |= FIELD_PREP(CM_AFE_CM1_IN_MODE_MASK, fs); + + mask |= CM_AFE_CM1_VUL_SEL | + CM_AFE_CM1_IN_MODE_MASK; + } else if (cmNum == MT8365_CM2) { + if (mt8365_afe_clk_group_48k(rate)) + val |= FIELD_PREP(CM_AFE_CM2_CLK_SEL, 0); + else + val |= FIELD_PREP(CM_AFE_CM2_CLK_SEL, 1); + + val |= FIELD_PREP(CM_AFE_CM2_TDM_SEL, 1); + + mask |= CM_AFE_CM2_TDM_SEL | + CM_AFE_CM1_IN_MODE_MASK | + CM_AFE_CM2_CLK_SEL; + + mt8365_afe_cm2_mux_conn(afe); + } else { + return -1; + } + + regmap_update_bits(afe->regmap, cm_ctrl_reg[cmNum].con0, mask, val); + + mt8365_afe_get_cm_update_cnt(afe, cmNum, rate, channels); + + return 0; +} + +static int mt8365_afe_fe_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct snd_pcm_runtime *runtime = substream->runtime; + int memif_num = snd_soc_rtd_to_cpu(rtd, 0)->id; + struct mtk_base_afe_memif *memif = &afe->memif[memif_num]; + int ret; + + memif->substream = substream; + + snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 16); + + snd_soc_set_runtime_hwparams(substream, afe->mtk_afe_hardware); + + ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) + dev_err(afe->dev, "snd_pcm_hw_constraint_integer failed\n"); + + mt8365_afe_enable_main_clk(afe); + return ret; +} + +static void mt8365_afe_fe_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + int memif_num = snd_soc_rtd_to_cpu(rtd, 0)->id; + struct mtk_base_afe_memif *memif = &afe->memif[memif_num]; + + memif->substream = NULL; + + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_afe_fe_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_control_data *ctrl_data = &afe_priv->ctrl_data; + int dai_id = snd_soc_rtd_to_cpu(rtd, 0)->id; + struct mtk_base_afe_memif *memif = &afe->memif[dai_id]; + struct mt8365_fe_dai_data *fe_data = &afe_priv->fe_data[dai_id]; + size_t request_size = params_buffer_bytes(params); + unsigned int channels = params_channels(params); + unsigned int rate = params_rate(params); + unsigned int base_end_offset = 8; + int ret, fs; + + dev_info(afe->dev, "%s %s period = %d rate = %d channels = %d\n", + __func__, memif->data->name, params_period_size(params), + rate, channels); + + if (dai_id == MT8365_AFE_MEMIF_VUL2) { + if (!ctrl_data->bypass_cm1) + /* configure cm1 */ + mt8365_afe_configure_cm(afe, MT8365_CM1, + channels, rate); + else + regmap_update_bits(afe->regmap, AFE_CM1_CON0, + CM_AFE_CM1_VUL_SEL, + CM_AFE_CM1_VUL_SEL); + } else if (dai_id == MT8365_AFE_MEMIF_TDM_IN) { + if (!ctrl_data->bypass_cm2) + /* configure cm2 */ + mt8365_afe_configure_cm(afe, MT8365_CM2, + channels, rate); + else + regmap_update_bits(afe->regmap, AFE_CM2_CON0, + CM_AFE_CM2_TDM_SEL, + ~CM_AFE_CM2_TDM_SEL); + + base_end_offset = 4; + } + + if (request_size > fe_data->sram_size) { + ret = snd_pcm_lib_malloc_pages(substream, request_size); + if (ret < 0) { + dev_err(afe->dev, + "%s %s malloc pages %zu bytes failed %d\n", + __func__, memif->data->name, request_size, ret); + return ret; + } + + fe_data->use_sram = false; + + mt8365_afe_emi_clk_on(afe); + } else { + struct snd_dma_buffer *dma_buf = &substream->dma_buffer; + + dma_buf->dev.type = SNDRV_DMA_TYPE_DEV; + dma_buf->dev.dev = substream->pcm->card->dev; + dma_buf->area = (unsigned char *)fe_data->sram_vir_addr; + dma_buf->addr = fe_data->sram_phy_addr; + dma_buf->bytes = request_size; + snd_pcm_set_runtime_buffer(substream, dma_buf); + + fe_data->use_sram = true; + } + + memif->phys_buf_addr = lower_32_bits(substream->runtime->dma_addr); + memif->buffer_size = substream->runtime->dma_bytes; + + /* start */ + regmap_write(afe->regmap, memif->data->reg_ofs_base, + memif->phys_buf_addr); + /* end */ + regmap_write(afe->regmap, + memif->data->reg_ofs_base + base_end_offset, + memif->phys_buf_addr + memif->buffer_size - 1); + + /* set channel */ + if (memif->data->mono_shift >= 0) { + unsigned int mono = (params_channels(params) == 1) ? 1 : 0; + + if (memif->data->mono_reg < 0) + dev_info(afe->dev, "%s mono_reg is NULL\n", __func__); + else + regmap_update_bits(afe->regmap, memif->data->mono_reg, + 1 << memif->data->mono_shift, + mono << memif->data->mono_shift); + } + + /* set rate */ + if (memif->data->fs_shift < 0) + return 0; + + fs = afe->memif_fs(substream, params_rate(params)); + + if (fs < 0) + return -EINVAL; + + if (memif->data->fs_reg < 0) + dev_info(afe->dev, "%s fs_reg is NULL\n", __func__); + else + regmap_update_bits(afe->regmap, memif->data->fs_reg, + memif->data->fs_maskbit << memif->data->fs_shift, + fs << memif->data->fs_shift); + + return 0; +} + +static int mt8365_afe_fe_hw_free(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + int dai_id = snd_soc_rtd_to_cpu(rtd, 0)->id; + struct mt8365_fe_dai_data *fe_data = &afe_priv->fe_data[dai_id]; + int ret = 0; + + if (fe_data->use_sram) { + snd_pcm_set_runtime_buffer(substream, NULL); + } else { + ret = snd_pcm_lib_free_pages(substream); + + mt8365_afe_emi_clk_off(afe); + } + + return ret; +} + +static int mt8365_afe_fe_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + int dai_id = snd_soc_rtd_to_cpu(rtd, 0)->id; + struct mtk_base_afe_memif *memif = &afe->memif[dai_id]; + + /* set format */ + if (memif->data->hd_reg >= 0) { + switch (substream->runtime->format) { + case SNDRV_PCM_FORMAT_S16_LE: + regmap_update_bits(afe->regmap, memif->data->hd_reg, + 3 << memif->data->hd_shift, + 0 << memif->data->hd_shift); + break; + case SNDRV_PCM_FORMAT_S32_LE: + regmap_update_bits(afe->regmap, memif->data->hd_reg, + 3 << memif->data->hd_shift, + 3 << memif->data->hd_shift); + + if (dai_id == MT8365_AFE_MEMIF_TDM_IN) { + regmap_update_bits(afe->regmap, + memif->data->hd_reg, + 3 << memif->data->hd_shift, + 1 << memif->data->hd_shift); + regmap_update_bits(afe->regmap, + memif->data->hd_reg, + 1 << memif->data->hd_align_mshift, + 1 << memif->data->hd_align_mshift); + } + break; + case SNDRV_PCM_FORMAT_S24_LE: + regmap_update_bits(afe->regmap, memif->data->hd_reg, + 3 << memif->data->hd_shift, + 1 << memif->data->hd_shift); + break; + default: + return -EINVAL; + } + } + + mt8365_afe_irq_direction_enable(afe, memif->irq_usage, + MT8365_AFE_IRQ_DIR_MCU); + + return 0; +} + +static int mt8365_afe_fe_trigger(struct snd_pcm_substream *substream, int cmd, + struct snd_soc_dai *dai) +{ + struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream); + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + int dai_id = snd_soc_rtd_to_cpu(rtd, 0)->id; + struct mt8365_control_data *ctrl_data = &afe_priv->ctrl_data; + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + case SNDRV_PCM_TRIGGER_RESUME: + /* enable channel merge */ + if (dai_id == MT8365_AFE_MEMIF_VUL2 && + !ctrl_data->bypass_cm1) { + regmap_update_bits(afe->regmap, AFE_CM1_CON0, + CM_AFE_CM_ON, CM_AFE_CM_ON); + } else if (dai_id == MT8365_AFE_MEMIF_TDM_IN && + !ctrl_data->bypass_cm2) { + regmap_update_bits(afe->regmap, AFE_CM2_CON0, + CM_AFE_CM_ON, CM_AFE_CM_ON); + } + break; + case SNDRV_PCM_TRIGGER_STOP: + case SNDRV_PCM_TRIGGER_SUSPEND: + /* disable channel merge */ + if (dai_id == MT8365_AFE_MEMIF_VUL2 && + !ctrl_data->bypass_cm1) { + regmap_update_bits(afe->regmap, AFE_CM1_CON0, + CM_AFE_CM_ON, ~CM_AFE_CM_ON); + } else if (dai_id == MT8365_AFE_MEMIF_TDM_IN && + !ctrl_data->bypass_cm2) { + regmap_update_bits(afe->regmap, AFE_CM2_CON0, + CM_AFE_CM_ON, ~CM_AFE_CM_ON); + } + break; + default: + break; + } + + return mtk_afe_fe_trigger(substream, cmd, dai); +} + +static int mt8365_afe_hw_gain1_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + mt8365_afe_enable_main_clk(afe); + return 0; +} + +static void mt8365_afe_hw_gain1_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + + if (be->prepared[substream->stream]) { + regmap_update_bits(afe->regmap, AFE_GAIN1_CON0, + AFE_GAIN1_CON0_EN_MASK, 0); + be->prepared[substream->stream] = false; + } + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_afe_hw_gain1_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + + int fs; + unsigned int val1 = 0, val2 = 0; + + if (be->prepared[substream->stream]) { + dev_info(afe->dev, "%s prepared already\n", __func__); + return 0; + } + + fs = mt8365_afe_fs_timing(substream->runtime->rate); + regmap_update_bits(afe->regmap, AFE_GAIN1_CON0, + AFE_GAIN1_CON0_MODE_MASK, (unsigned int)fs << 4); + + regmap_read(afe->regmap, AFE_GAIN1_CON1, &val1); + regmap_read(afe->regmap, AFE_GAIN1_CUR, &val2); + if ((val1 & AFE_GAIN1_CON1_MASK) != (val2 & AFE_GAIN1_CUR_MASK)) + regmap_update_bits(afe->regmap, AFE_GAIN1_CUR, + AFE_GAIN1_CUR_MASK, val1); + + regmap_update_bits(afe->regmap, AFE_GAIN1_CON0, + AFE_GAIN1_CON0_EN_MASK, 1); + be->prepared[substream->stream] = true; + + return 0; +} + +static const struct snd_pcm_hardware mt8365_hostless_hardware = { + .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_MMAP_VALID), + .period_bytes_min = 256, + .period_bytes_max = 4 * 48 * 1024, + .periods_min = 2, + .periods_max = 256, + .buffer_bytes_max = 8 * 48 * 1024, + .fifo_size = 0, +}; + +/* dai ops */ +static int mtk_dai_hostless_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct snd_pcm_runtime *runtime = substream->runtime; + int ret; + + snd_soc_set_runtime_hwparams(substream, &mt8365_hostless_hardware); + + ret = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (ret < 0) + dev_err(afe->dev, "snd_pcm_hw_constraint_integer failed\n"); + return ret; +} + +/* FE DAIs */ +static const struct snd_soc_dai_ops mt8365_afe_fe_dai_ops = { + .startup = mt8365_afe_fe_startup, + .shutdown = mt8365_afe_fe_shutdown, + .hw_params = mt8365_afe_fe_hw_params, + .hw_free = mt8365_afe_fe_hw_free, + .prepare = mt8365_afe_fe_prepare, + .trigger = mt8365_afe_fe_trigger, +}; + +static const struct snd_soc_dai_ops mt8365_dai_hostless_ops = { + .startup = mtk_dai_hostless_startup, +}; + +static const struct snd_soc_dai_ops mt8365_afe_hw_gain1_ops = { + .startup = mt8365_afe_hw_gain1_startup, + .shutdown = mt8365_afe_hw_gain1_shutdown, + .prepare = mt8365_afe_hw_gain1_prepare, +}; + +static struct snd_soc_dai_driver mt8365_memif_dai_driver[] = { + /* FE DAIs: memory intefaces to CPU */ + { + .name = "DL1", + .id = MT8365_AFE_MEMIF_DL1, + .playback = { + .stream_name = "DL1", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "DL2", + .id = MT8365_AFE_MEMIF_DL2, + .playback = { + .stream_name = "DL2", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "TDM_OUT", + .id = MT8365_AFE_MEMIF_TDM_OUT, + .playback = { + .stream_name = "TDM_OUT", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "AWB", + .id = MT8365_AFE_MEMIF_AWB, + .capture = { + .stream_name = "AWB", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "VUL", + .id = MT8365_AFE_MEMIF_VUL, + .capture = { + .stream_name = "VUL", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "VUL2", + .id = MT8365_AFE_MEMIF_VUL2, + .capture = { + .stream_name = "VUL2", + .channels_min = 1, + .channels_max = 16, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "VUL3", + .id = MT8365_AFE_MEMIF_VUL3, + .capture = { + .stream_name = "VUL3", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "TDM_IN", + .id = MT8365_AFE_MEMIF_TDM_IN, + .capture = { + .stream_name = "TDM_IN", + .channels_min = 1, + .channels_max = 16, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_fe_dai_ops, + }, { + .name = "Hostless FM DAI", + .id = MT8365_AFE_IO_VIRTUAL_FM, + .playback = { + .stream_name = "Hostless FM DL", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "Hostless FM UL", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_dai_hostless_ops, + }, { + .name = "HW_GAIN1", + .id = MT8365_AFE_IO_HW_GAIN1, + .playback = { + .stream_name = "HW Gain 1 In", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "HW Gain 1 Out", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_hw_gain1_ops, + .symmetric_rate = 1, + .symmetric_channels = 1, + .symmetric_sample_bits = 1, + }, +}; + +static const struct snd_kcontrol_new mt8365_afe_o00_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN0, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I07 Switch", AFE_CONN0, 7, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o01_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN1, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I08 Switch", AFE_CONN1, 8, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o03_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN3, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I07 Switch", AFE_CONN3, 7, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I00 Switch", AFE_CONN3, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I10 Switch", AFE_CONN3, 10, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o04_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN4, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I08 Switch", AFE_CONN4, 8, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I01 Switch", AFE_CONN4, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I11 Switch", AFE_CONN4, 11, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o05_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I00 Switch", AFE_CONN5, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN5, 3, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN5, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I07 Switch", AFE_CONN5, 7, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I09 Switch", AFE_CONN5, 9, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I14 Switch", AFE_CONN5, 14, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I16 Switch", AFE_CONN5, 16, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN5, 18, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I20 Switch", AFE_CONN5, 20, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I23 Switch", AFE_CONN5, 23, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I10L Switch", AFE_CONN5, 10, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o06_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I01 Switch", AFE_CONN6, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN6, 4, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN6, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I08 Switch", AFE_CONN6, 8, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I22 Switch", AFE_CONN6, 22, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I15 Switch", AFE_CONN6, 15, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN6, 17, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I19 Switch", AFE_CONN6, 19, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I21 Switch", AFE_CONN6, 21, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I24 Switch", AFE_CONN6, 24, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I11L Switch", AFE_CONN6, 11, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o07_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN7, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I07 Switch", AFE_CONN7, 7, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o08_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN8, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I08 Switch", AFE_CONN8, 8, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o09_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I00 Switch", AFE_CONN9, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN9, 3, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I09 Switch", AFE_CONN9, 9, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I14 Switch", AFE_CONN9, 14, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I16 Switch", AFE_CONN9, 16, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN9, 18, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I20 Switch", AFE_CONN9, 20, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o10_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I01 Switch", AFE_CONN10, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN10, 4, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I22 Switch", AFE_CONN10, 22, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I15 Switch", AFE_CONN10, 15, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN10, 17, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I19 Switch", AFE_CONN10, 19, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I21 Switch", AFE_CONN10, 21, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o11_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I00 Switch", AFE_CONN11, 0, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN11, 3, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I09 Switch", AFE_CONN11, 9, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I14 Switch", AFE_CONN11, 14, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I16 Switch", AFE_CONN11, 16, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN11, 18, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I20 Switch", AFE_CONN11, 20, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o12_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I01 Switch", AFE_CONN12, 1, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN12, 4, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I22 Switch", AFE_CONN12, 22, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I15 Switch", AFE_CONN12, 15, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN12, 17, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I19 Switch", AFE_CONN12, 19, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I21 Switch", AFE_CONN12, 21, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o13_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I00 Switch", AFE_CONN13, 0, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o14_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I01 Switch", AFE_CONN14, 1, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o15_mix[] = { +}; + +static const struct snd_kcontrol_new mt8365_afe_o16_mix[] = { +}; + +static const struct snd_kcontrol_new mt8365_afe_o17_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I03 Switch", AFE_CONN17, 3, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I14 Switch", AFE_CONN17, 14, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o18_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN18, 4, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I15 Switch", AFE_CONN18, 15, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I23 Switch", AFE_CONN18, 23, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I25 Switch", AFE_CONN18, 25, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o19_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I04 Switch", AFE_CONN19, 4, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I16 Switch", AFE_CONN19, 16, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I23 Switch", AFE_CONN19, 23, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I24 Switch", AFE_CONN19, 24, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I25 Switch", AFE_CONN19, 25, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I26 Switch", AFE_CONN19, 26, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o20_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I17 Switch", AFE_CONN20, 17, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I24 Switch", AFE_CONN20, 24, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I26 Switch", AFE_CONN20, 26, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o21_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I18 Switch", AFE_CONN21, 18, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I23 Switch", AFE_CONN21, 23, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I25 Switch", AFE_CONN21, 25, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o22_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I19 Switch", AFE_CONN22, 19, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I24 Switch", AFE_CONN22, 24, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I26 Switch", AFE_CONN22, 26, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o23_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I20 Switch", AFE_CONN23, 20, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I23 Switch", AFE_CONN23, 23, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I25 Switch", AFE_CONN23, 25, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o24_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I21 Switch", AFE_CONN24, 21, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I24 Switch", AFE_CONN24, 24, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I26 Switch", AFE_CONN24, 26, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I23 Switch", AFE_CONN24, 23, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I25 Switch", AFE_CONN24, 25, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o25_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I27 Switch", AFE_CONN25, 27, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I23 Switch", AFE_CONN25, 23, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I25 Switch", AFE_CONN25, 25, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o26_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I28 Switch", AFE_CONN26, 28, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I24 Switch", AFE_CONN26, 24, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I26 Switch", AFE_CONN26, 26, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o27_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN27, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I07 Switch", AFE_CONN27, 7, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o28_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN28, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I08 Switch", AFE_CONN28, 8, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o29_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I05 Switch", AFE_CONN29, 5, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I07 Switch", AFE_CONN29, 7, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o30_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I06 Switch", AFE_CONN30, 6, 1, 0), + SOC_DAPM_SINGLE_AUTODISABLE("I08 Switch", AFE_CONN30, 8, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o31_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I29 Switch", AFE_CONN31, 29, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o32_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I30 Switch", AFE_CONN32, 30, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o33_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I31 Switch", AFE_CONN33, 31, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o34_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I32 Switch", AFE_CONN34_1, 0, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o35_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I33 Switch", AFE_CONN35_1, 1, 1, 0), +}; + +static const struct snd_kcontrol_new mt8365_afe_o36_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("I34 Switch", AFE_CONN36_1, 2, 1, 0), +}; + +static const struct snd_kcontrol_new mtk_hw_gain1_in_ch1_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("CONNSYS_I2S_CH1 Switch", AFE_CONN13, + 0, 1, 0), +}; + +static const struct snd_kcontrol_new mtk_hw_gain1_in_ch2_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("CONNSYS_I2S_CH2 Switch", AFE_CONN14, + 1, 1, 0), +}; + +static int mt8365_afe_cm2_io_input_mux_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + ucontrol->value.integer.value[0] = mCM2Input; + + return 0; +} + +static int mt8365_afe_cm2_io_input_mux_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_soc_dapm_context *dapm = + snd_soc_dapm_kcontrol_dapm(kcontrol); + struct snd_soc_component *comp = snd_soc_dapm_to_component(dapm); + struct mtk_base_afe *afe = snd_soc_component_get_drvdata(comp); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + int ret; + + mCM2Input = ucontrol->value.enumerated.item[0]; + + afe_priv->cm2_mux_input = mCM2Input; + ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol); + + return ret; +} + +static const char * const fmhwgain_text[] = { + "OPEN", "FM_HW_GAIN_IO" +}; + +static const char * const ain_text[] = { + "INT ADC", "EXT ADC", +}; + +static const char * const vul2_in_input_text[] = { + "VUL2_IN_FROM_O17O18", "VUL2_IN_FROM_CM1", +}; + +static const char * const mt8365_afe_cm2_mux_text[] = { + "OPEN", "FROM_GASRC1_OUT", "FROM_GASRC2_OUT", "FROM_TDM_ASRC_OUT", +}; + +static SOC_ENUM_SINGLE_VIRT_DECL(fmhwgain_enum, fmhwgain_text); +static SOC_ENUM_SINGLE_DECL(ain_enum, AFE_ADDA_TOP_CON0, 0, ain_text); +static SOC_ENUM_SINGLE_VIRT_DECL(vul2_in_input_enum, vul2_in_input_text); +static SOC_ENUM_SINGLE_VIRT_DECL(mt8365_afe_cm2_mux_input_enum, + mt8365_afe_cm2_mux_text); + +static const struct snd_kcontrol_new fmhwgain_mux = + SOC_DAPM_ENUM("FM HW Gain Source", fmhwgain_enum); + +static const struct snd_kcontrol_new ain_mux = + SOC_DAPM_ENUM("AIN Source", ain_enum); + +static const struct snd_kcontrol_new vul2_in_input_mux = + SOC_DAPM_ENUM("VUL2 Input", vul2_in_input_enum); + +static const struct snd_kcontrol_new mt8365_afe_cm2_mux_input_mux = + SOC_DAPM_ENUM_EXT("CM2_MUX Source", mt8365_afe_cm2_mux_input_enum, + mt8365_afe_cm2_io_input_mux_get, + mt8365_afe_cm2_io_input_mux_put); + +static const struct snd_soc_dapm_widget mt8365_memif_widgets[] = { + /* inter-connections */ + SND_SOC_DAPM_MIXER("I00", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I01", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I03", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I04", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I05", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I06", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I07", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I08", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I05L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I06L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I07L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I08L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I09", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I10", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I11", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I10L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I11L", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I12", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I13", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I14", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I15", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I16", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I17", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I18", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I19", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I20", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I21", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I22", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I23", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I24", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I25", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I26", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I27", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I28", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I29", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I30", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I31", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I32", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I33", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("I34", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("O00", SND_SOC_NOPM, 0, 0, + mt8365_afe_o00_mix, ARRAY_SIZE(mt8365_afe_o00_mix)), + SND_SOC_DAPM_MIXER("O01", SND_SOC_NOPM, 0, 0, + mt8365_afe_o01_mix, ARRAY_SIZE(mt8365_afe_o01_mix)), + SND_SOC_DAPM_MIXER("O03", SND_SOC_NOPM, 0, 0, + mt8365_afe_o03_mix, ARRAY_SIZE(mt8365_afe_o03_mix)), + SND_SOC_DAPM_MIXER("O04", SND_SOC_NOPM, 0, 0, + mt8365_afe_o04_mix, ARRAY_SIZE(mt8365_afe_o04_mix)), + SND_SOC_DAPM_MIXER("O05", SND_SOC_NOPM, 0, 0, + mt8365_afe_o05_mix, ARRAY_SIZE(mt8365_afe_o05_mix)), + SND_SOC_DAPM_MIXER("O06", SND_SOC_NOPM, 0, 0, + mt8365_afe_o06_mix, ARRAY_SIZE(mt8365_afe_o06_mix)), + SND_SOC_DAPM_MIXER("O07", SND_SOC_NOPM, 0, 0, + mt8365_afe_o07_mix, ARRAY_SIZE(mt8365_afe_o07_mix)), + SND_SOC_DAPM_MIXER("O08", SND_SOC_NOPM, 0, 0, + mt8365_afe_o08_mix, ARRAY_SIZE(mt8365_afe_o08_mix)), + SND_SOC_DAPM_MIXER("O09", SND_SOC_NOPM, 0, 0, + mt8365_afe_o09_mix, ARRAY_SIZE(mt8365_afe_o09_mix)), + SND_SOC_DAPM_MIXER("O10", SND_SOC_NOPM, 0, 0, + mt8365_afe_o10_mix, ARRAY_SIZE(mt8365_afe_o10_mix)), + SND_SOC_DAPM_MIXER("O11", SND_SOC_NOPM, 0, 0, + mt8365_afe_o11_mix, ARRAY_SIZE(mt8365_afe_o11_mix)), + SND_SOC_DAPM_MIXER("O12", SND_SOC_NOPM, 0, 0, + mt8365_afe_o12_mix, ARRAY_SIZE(mt8365_afe_o12_mix)), + SND_SOC_DAPM_MIXER("O13", SND_SOC_NOPM, 0, 0, + mt8365_afe_o13_mix, ARRAY_SIZE(mt8365_afe_o13_mix)), + SND_SOC_DAPM_MIXER("O14", SND_SOC_NOPM, 0, 0, + mt8365_afe_o14_mix, ARRAY_SIZE(mt8365_afe_o14_mix)), + SND_SOC_DAPM_MIXER("O15", SND_SOC_NOPM, 0, 0, + mt8365_afe_o15_mix, ARRAY_SIZE(mt8365_afe_o15_mix)), + SND_SOC_DAPM_MIXER("O16", SND_SOC_NOPM, 0, 0, + mt8365_afe_o16_mix, ARRAY_SIZE(mt8365_afe_o16_mix)), + SND_SOC_DAPM_MIXER("O17", SND_SOC_NOPM, 0, 0, + mt8365_afe_o17_mix, ARRAY_SIZE(mt8365_afe_o17_mix)), + SND_SOC_DAPM_MIXER("O18", SND_SOC_NOPM, 0, 0, + mt8365_afe_o18_mix, ARRAY_SIZE(mt8365_afe_o18_mix)), + SND_SOC_DAPM_MIXER("O19", SND_SOC_NOPM, 0, 0, + mt8365_afe_o19_mix, ARRAY_SIZE(mt8365_afe_o19_mix)), + SND_SOC_DAPM_MIXER("O20", SND_SOC_NOPM, 0, 0, + mt8365_afe_o20_mix, ARRAY_SIZE(mt8365_afe_o20_mix)), + SND_SOC_DAPM_MIXER("O21", SND_SOC_NOPM, 0, 0, + mt8365_afe_o21_mix, ARRAY_SIZE(mt8365_afe_o21_mix)), + SND_SOC_DAPM_MIXER("O22", SND_SOC_NOPM, 0, 0, + mt8365_afe_o22_mix, ARRAY_SIZE(mt8365_afe_o22_mix)), + SND_SOC_DAPM_MIXER("O23", SND_SOC_NOPM, 0, 0, + mt8365_afe_o23_mix, ARRAY_SIZE(mt8365_afe_o23_mix)), + SND_SOC_DAPM_MIXER("O24", SND_SOC_NOPM, 0, 0, + mt8365_afe_o24_mix, ARRAY_SIZE(mt8365_afe_o24_mix)), + SND_SOC_DAPM_MIXER("O25", SND_SOC_NOPM, 0, 0, + mt8365_afe_o25_mix, ARRAY_SIZE(mt8365_afe_o25_mix)), + SND_SOC_DAPM_MIXER("O26", SND_SOC_NOPM, 0, 0, + mt8365_afe_o26_mix, ARRAY_SIZE(mt8365_afe_o26_mix)), + SND_SOC_DAPM_MIXER("O27", SND_SOC_NOPM, 0, 0, + mt8365_afe_o27_mix, ARRAY_SIZE(mt8365_afe_o27_mix)), + SND_SOC_DAPM_MIXER("O28", SND_SOC_NOPM, 0, 0, + mt8365_afe_o28_mix, ARRAY_SIZE(mt8365_afe_o28_mix)), + SND_SOC_DAPM_MIXER("O29", SND_SOC_NOPM, 0, 0, + mt8365_afe_o29_mix, ARRAY_SIZE(mt8365_afe_o29_mix)), + SND_SOC_DAPM_MIXER("O30", SND_SOC_NOPM, 0, 0, + mt8365_afe_o30_mix, ARRAY_SIZE(mt8365_afe_o30_mix)), + SND_SOC_DAPM_MIXER("O31", SND_SOC_NOPM, 0, 0, + mt8365_afe_o31_mix, ARRAY_SIZE(mt8365_afe_o31_mix)), + SND_SOC_DAPM_MIXER("O32", SND_SOC_NOPM, 0, 0, + mt8365_afe_o32_mix, ARRAY_SIZE(mt8365_afe_o32_mix)), + SND_SOC_DAPM_MIXER("O33", SND_SOC_NOPM, 0, 0, + mt8365_afe_o33_mix, ARRAY_SIZE(mt8365_afe_o33_mix)), + SND_SOC_DAPM_MIXER("O34", SND_SOC_NOPM, 0, 0, + mt8365_afe_o34_mix, ARRAY_SIZE(mt8365_afe_o34_mix)), + SND_SOC_DAPM_MIXER("O35", SND_SOC_NOPM, 0, 0, + mt8365_afe_o35_mix, ARRAY_SIZE(mt8365_afe_o35_mix)), + SND_SOC_DAPM_MIXER("O36", SND_SOC_NOPM, 0, 0, + mt8365_afe_o36_mix, ARRAY_SIZE(mt8365_afe_o36_mix)), + SND_SOC_DAPM_MIXER("CM2_Mux IO", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("CM1_IO", SND_SOC_NOPM, 0, 0, NULL, 0), + SND_SOC_DAPM_MIXER("O17O18", SND_SOC_NOPM, 0, 0, NULL, 0), + /* inter-connections */ + SND_SOC_DAPM_MIXER("HW_GAIN1_IN_CH1", SND_SOC_NOPM, 0, 0, + mtk_hw_gain1_in_ch1_mix, + ARRAY_SIZE(mtk_hw_gain1_in_ch1_mix)), + SND_SOC_DAPM_MIXER("HW_GAIN1_IN_CH2", SND_SOC_NOPM, 0, 0, + mtk_hw_gain1_in_ch2_mix, + ARRAY_SIZE(mtk_hw_gain1_in_ch2_mix)), + + SND_SOC_DAPM_INPUT("DL Source"), + + SND_SOC_DAPM_MUX("CM2_Mux_IO Input Mux", SND_SOC_NOPM, 0, 0, + &mt8365_afe_cm2_mux_input_mux), + + SND_SOC_DAPM_MUX("AIN Mux", SND_SOC_NOPM, 0, 0, &ain_mux), + SND_SOC_DAPM_MUX("VUL2 Input Mux", SND_SOC_NOPM, 0, 0, + &vul2_in_input_mux), + + SND_SOC_DAPM_MUX("FM HW Gain Mux", SND_SOC_NOPM, 0, 0, &fmhwgain_mux), + + SND_SOC_DAPM_INPUT("HW Gain 1 Out Endpoint"), + SND_SOC_DAPM_OUTPUT("HW Gain 1 In Endpoint"), +}; + +static const struct snd_soc_dapm_route mt8365_memif_routes[] = { + /* downlink */ + {"I00", NULL, "2ND I2S Capture"}, + {"I01", NULL, "2ND I2S Capture"}, + {"I05", NULL, "DL1"}, + {"I06", NULL, "DL1"}, + {"I07", NULL, "DL2"}, + {"I08", NULL, "DL2"}, + + {"O03", "I05 Switch", "I05"}, + {"O04", "I06 Switch", "I06"}, + {"O00", "I05 Switch", "I05"}, + {"O01", "I06 Switch", "I06"}, + {"O07", "I05 Switch", "I05"}, + {"O08", "I06 Switch", "I06"}, + {"O27", "I05 Switch", "I05"}, + {"O28", "I06 Switch", "I06"}, + {"O29", "I05 Switch", "I05"}, + {"O30", "I06 Switch", "I06"}, + + {"O03", "I07 Switch", "I07"}, + {"O04", "I08 Switch", "I08"}, + {"O00", "I07 Switch", "I07"}, + {"O01", "I08 Switch", "I08"}, + {"O07", "I07 Switch", "I07"}, + {"O08", "I08 Switch", "I08"}, + + /* uplink */ + {"AWB", NULL, "O05"}, + {"AWB", NULL, "O06"}, + {"VUL", NULL, "O09"}, + {"VUL", NULL, "O10"}, + {"VUL3", NULL, "O11"}, + {"VUL3", NULL, "O12"}, + + {"AIN Mux", "EXT ADC", "I2S Capture"}, + {"I03", NULL, "AIN Mux"}, + {"I04", NULL, "AIN Mux"}, + + {"HW_GAIN1_IN_CH1", "CONNSYS_I2S_CH1", "Hostless FM DL"}, + {"HW_GAIN1_IN_CH2", "CONNSYS_I2S_CH2", "Hostless FM DL"}, + + {"HW Gain 1 In Endpoint", NULL, "HW Gain 1 In"}, + {"HW Gain 1 Out", NULL, "HW Gain 1 Out Endpoint"}, + {"HW Gain 1 In", NULL, "HW_GAIN1_IN_CH1"}, + {"HW Gain 1 In", NULL, "HW_GAIN1_IN_CH2"}, + + {"FM HW Gain Mux", "FM_HW_GAIN_IO", "HW Gain 1 Out"}, + {"Hostless FM UL", NULL, "FM HW Gain Mux"}, + {"Hostless FM UL", NULL, "FM 2ND I2S Mux"}, + + {"O05", "I05 Switch", "I05L"}, + {"O06", "I06 Switch", "I06L"}, + {"O05", "I07 Switch", "I07L"}, + {"O06", "I08 Switch", "I08L"}, + + {"O05", "I03 Switch", "I03"}, + {"O06", "I04 Switch", "I04"}, + {"O05", "I00 Switch", "I00"}, + {"O06", "I01 Switch", "I01"}, + {"O05", "I09 Switch", "I09"}, + {"O06", "I22 Switch", "I22"}, + {"O05", "I14 Switch", "I14"}, + {"O06", "I15 Switch", "I15"}, + {"O05", "I16 Switch", "I16"}, + {"O06", "I17 Switch", "I17"}, + {"O05", "I18 Switch", "I18"}, + {"O06", "I19 Switch", "I19"}, + {"O05", "I20 Switch", "I20"}, + {"O06", "I21 Switch", "I21"}, + {"O05", "I23 Switch", "I23"}, + {"O06", "I24 Switch", "I24"}, + + {"O09", "I03 Switch", "I03"}, + {"O10", "I04 Switch", "I04"}, + {"O09", "I00 Switch", "I00"}, + {"O10", "I01 Switch", "I01"}, + {"O09", "I09 Switch", "I09"}, + {"O10", "I22 Switch", "I22"}, + {"O09", "I14 Switch", "I14"}, + {"O10", "I15 Switch", "I15"}, + {"O09", "I16 Switch", "I16"}, + {"O10", "I17 Switch", "I17"}, + {"O09", "I18 Switch", "I18"}, + {"O10", "I19 Switch", "I19"}, + {"O09", "I20 Switch", "I20"}, + {"O10", "I21 Switch", "I21"}, + + {"O11", "I03 Switch", "I03"}, + {"O12", "I04 Switch", "I04"}, + {"O11", "I00 Switch", "I00"}, + {"O12", "I01 Switch", "I01"}, + {"O11", "I09 Switch", "I09"}, + {"O12", "I22 Switch", "I22"}, + {"O11", "I14 Switch", "I14"}, + {"O12", "I15 Switch", "I15"}, + {"O11", "I16 Switch", "I16"}, + {"O12", "I17 Switch", "I17"}, + {"O11", "I18 Switch", "I18"}, + {"O12", "I19 Switch", "I19"}, + {"O11", "I20 Switch", "I20"}, + {"O12", "I21 Switch", "I21"}, + + /* CM2_Mux*/ + {"CM2_Mux IO", NULL, "CM2_Mux_IO Input Mux"}, + + /* VUL2 */ + {"VUL2", NULL, "VUL2 Input Mux"}, + {"VUL2 Input Mux", "VUL2_IN_FROM_O17O18", "O17O18"}, + {"VUL2 Input Mux", "VUL2_IN_FROM_CM1", "CM1_IO"}, + + {"O17O18", NULL, "O17"}, + {"O17O18", NULL, "O18"}, + {"CM1_IO", NULL, "O17"}, + {"CM1_IO", NULL, "O18"}, + {"CM1_IO", NULL, "O19"}, + {"CM1_IO", NULL, "O20"}, + {"CM1_IO", NULL, "O21"}, + {"CM1_IO", NULL, "O22"}, + {"CM1_IO", NULL, "O23"}, + {"CM1_IO", NULL, "O24"}, + {"CM1_IO", NULL, "O25"}, + {"CM1_IO", NULL, "O26"}, + {"CM1_IO", NULL, "O31"}, + {"CM1_IO", NULL, "O32"}, + {"CM1_IO", NULL, "O33"}, + {"CM1_IO", NULL, "O34"}, + {"CM1_IO", NULL, "O35"}, + {"CM1_IO", NULL, "O36"}, + + {"O17", "I14 Switch", "I14"}, + {"O18", "I15 Switch", "I15"}, + {"O19", "I16 Switch", "I16"}, + {"O20", "I17 Switch", "I17"}, + {"O21", "I18 Switch", "I18"}, + {"O22", "I19 Switch", "I19"}, + {"O23", "I20 Switch", "I20"}, + {"O24", "I21 Switch", "I21"}, + {"O25", "I23 Switch", "I23"}, + {"O26", "I24 Switch", "I24"}, + {"O25", "I25 Switch", "I25"}, + {"O26", "I26 Switch", "I26"}, + + {"O17", "I03 Switch", "I03"}, + {"O18", "I04 Switch", "I04"}, + {"O18", "I23 Switch", "I23"}, + {"O18", "I25 Switch", "I25"}, + {"O19", "I04 Switch", "I04"}, + {"O19", "I23 Switch", "I23"}, + {"O19", "I24 Switch", "I24"}, + {"O19", "I25 Switch", "I25"}, + {"O19", "I26 Switch", "I26"}, + {"O20", "I24 Switch", "I24"}, + {"O20", "I26 Switch", "I26"}, + {"O21", "I23 Switch", "I23"}, + {"O21", "I25 Switch", "I25"}, + {"O22", "I24 Switch", "I24"}, + {"O22", "I26 Switch", "I26"}, + + {"O23", "I23 Switch", "I23"}, + {"O23", "I25 Switch", "I25"}, + {"O24", "I24 Switch", "I24"}, + {"O24", "I26 Switch", "I26"}, + {"O24", "I23 Switch", "I23"}, + {"O24", "I25 Switch", "I25"}, + {"O13", "I00 Switch", "I00"}, + {"O14", "I01 Switch", "I01"}, + {"O03", "I10 Switch", "I10"}, + {"O04", "I11 Switch", "I11"}, +}; + +static const struct mtk_base_memif_data memif_data[MT8365_AFE_MEMIF_NUM] = { + { + .name = "DL1", + .id = MT8365_AFE_MEMIF_DL1, + .reg_ofs_base = AFE_DL1_BASE, + .reg_ofs_cur = AFE_DL1_CUR, + .fs_reg = AFE_DAC_CON1, + .fs_shift = 0, + .fs_maskbit = 0xf, + .mono_reg = AFE_DAC_CON1, + .mono_shift = 21, + .hd_reg = AFE_MEMIF_PBUF_SIZE, + .hd_shift = 16, + .enable_reg = AFE_DAC_CON0, + .enable_shift = 1, + .msb_reg = -1, + .msb_shift = -1, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, { + .name = "DL2", + .id = MT8365_AFE_MEMIF_DL2, + .reg_ofs_base = AFE_DL2_BASE, + .reg_ofs_cur = AFE_DL2_CUR, + .fs_reg = AFE_DAC_CON1, + .fs_shift = 4, + .fs_maskbit = 0xf, + .mono_reg = AFE_DAC_CON1, + .mono_shift = 22, + .hd_reg = AFE_MEMIF_PBUF_SIZE, + .hd_shift = 18, + .enable_reg = AFE_DAC_CON0, + .enable_shift = 2, + .msb_reg = -1, + .msb_shift = -1, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, { + .name = "TDM OUT", + .id = MT8365_AFE_MEMIF_TDM_OUT, + .reg_ofs_base = AFE_HDMI_OUT_BASE, + .reg_ofs_cur = AFE_HDMI_OUT_CUR, + .fs_reg = -1, + .fs_shift = -1, + .fs_maskbit = -1, + .mono_reg = -1, + .mono_shift = -1, + .hd_reg = AFE_MEMIF_PBUF_SIZE, + .hd_shift = 28, + .enable_reg = AFE_HDMI_OUT_CON0, + .enable_shift = 0, + .msb_reg = -1, + .msb_shift = -1, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, { + .name = "AWB", + .id = MT8365_AFE_MEMIF_AWB, + .reg_ofs_base = AFE_AWB_BASE, + .reg_ofs_cur = AFE_AWB_CUR, + .fs_reg = AFE_DAC_CON1, + .fs_shift = 12, + .fs_maskbit = 0xf, + .mono_reg = AFE_DAC_CON1, + .mono_shift = 24, + .hd_reg = AFE_MEMIF_PBUF_SIZE, + .hd_shift = 20, + .enable_reg = AFE_DAC_CON0, + .enable_shift = 6, + .msb_reg = AFE_MEMIF_MSB, + .msb_shift = 17, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, { + .name = "VUL", + .id = MT8365_AFE_MEMIF_VUL, + .reg_ofs_base = AFE_VUL_BASE, + .reg_ofs_cur = AFE_VUL_CUR, + .fs_reg = AFE_DAC_CON1, + .fs_shift = 16, + .fs_maskbit = 0xf, + .mono_reg = AFE_DAC_CON1, + .mono_shift = 27, + .hd_reg = AFE_MEMIF_PBUF_SIZE, + .hd_shift = 22, + .enable_reg = AFE_DAC_CON0, + .enable_shift = 3, + .msb_reg = AFE_MEMIF_MSB, + .msb_shift = 20, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, { + .name = "VUL2", + .id = MT8365_AFE_MEMIF_VUL2, + .reg_ofs_base = AFE_VUL_D2_BASE, + .reg_ofs_cur = AFE_VUL_D2_CUR, + .fs_reg = AFE_DAC_CON0, + .fs_shift = 20, + .fs_maskbit = 0xf, + .mono_reg = -1, + .mono_shift = -1, + .hd_reg = AFE_MEMIF_PBUF_SIZE, + .hd_shift = 14, + .enable_reg = AFE_DAC_CON0, + .enable_shift = 9, + .msb_reg = AFE_MEMIF_MSB, + .msb_shift = 21, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, { + .name = "VUL3", + .id = MT8365_AFE_MEMIF_VUL3, + .reg_ofs_base = AFE_VUL3_BASE, + .reg_ofs_cur = AFE_VUL3_CUR, + .fs_reg = AFE_DAC_CON1, + .fs_shift = 8, + .fs_maskbit = 0xf, + .mono_reg = AFE_DAC_CON0, + .mono_shift = 13, + .hd_reg = AFE_MEMIF_PBUF2_SIZE, + .hd_shift = 10, + .enable_reg = AFE_DAC_CON0, + .enable_shift = 12, + .msb_reg = AFE_MEMIF_MSB, + .msb_shift = 27, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, { + .name = "TDM IN", + .id = MT8365_AFE_MEMIF_TDM_IN, + .reg_ofs_base = AFE_HDMI_IN_2CH_BASE, + .reg_ofs_cur = AFE_HDMI_IN_2CH_CUR, + .fs_reg = -1, + .fs_shift = -1, + .fs_maskbit = -1, + .mono_reg = AFE_HDMI_IN_2CH_CON0, + .mono_shift = 1, + .hd_reg = AFE_MEMIF_PBUF2_SIZE, + .hd_shift = 8, + .hd_align_mshift = 5, + .enable_reg = AFE_HDMI_IN_2CH_CON0, + .enable_shift = 0, + .msb_reg = AFE_MEMIF_MSB, + .msb_shift = 28, + .agent_disable_reg = -1, + .agent_disable_shift = -1, + }, +}; + +static const struct mtk_base_irq_data irq_data[MT8365_AFE_IRQ_NUM] = { + { + .id = MT8365_AFE_IRQ1, + .irq_cnt_reg = AFE_IRQ_MCU_CNT1, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON, + .irq_en_shift = 0, + .irq_fs_reg = AFE_IRQ_MCU_CON, + .irq_fs_shift = 4, + .irq_fs_maskbit = 0xf, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 0, + }, { + .id = MT8365_AFE_IRQ2, + .irq_cnt_reg = AFE_IRQ_MCU_CNT2, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON, + .irq_en_shift = 1, + .irq_fs_reg = AFE_IRQ_MCU_CON, + .irq_fs_shift = 8, + .irq_fs_maskbit = 0xf, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 1, + }, { + .id = MT8365_AFE_IRQ3, + .irq_cnt_reg = AFE_IRQ_MCU_CNT3, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON, + .irq_en_shift = 2, + .irq_fs_reg = AFE_IRQ_MCU_CON, + .irq_fs_shift = 16, + .irq_fs_maskbit = 0xf, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 2, + }, { + .id = MT8365_AFE_IRQ4, + .irq_cnt_reg = AFE_IRQ_MCU_CNT4, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON, + .irq_en_shift = 3, + .irq_fs_reg = AFE_IRQ_MCU_CON, + .irq_fs_shift = 20, + .irq_fs_maskbit = 0xf, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 3, + }, { + .id = MT8365_AFE_IRQ5, + .irq_cnt_reg = AFE_IRQ_MCU_CNT5, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON2, + .irq_en_shift = 3, + .irq_fs_reg = -1, + .irq_fs_shift = 0, + .irq_fs_maskbit = 0x0, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 4, + }, { + .id = MT8365_AFE_IRQ6, + .irq_cnt_reg = -1, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x0, + .irq_en_reg = AFE_IRQ_MCU_CON, + .irq_en_shift = 13, + .irq_fs_reg = -1, + .irq_fs_shift = 0, + .irq_fs_maskbit = 0x0, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 5, + }, { + .id = MT8365_AFE_IRQ7, + .irq_cnt_reg = AFE_IRQ_MCU_CNT7, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON, + .irq_en_shift = 14, + .irq_fs_reg = AFE_IRQ_MCU_CON, + .irq_fs_shift = 24, + .irq_fs_maskbit = 0xf, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 6, + }, { + .id = MT8365_AFE_IRQ8, + .irq_cnt_reg = AFE_IRQ_MCU_CNT8, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON, + .irq_en_shift = 15, + .irq_fs_reg = AFE_IRQ_MCU_CON, + .irq_fs_shift = 28, + .irq_fs_maskbit = 0xf, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 7, + }, { + .id = MT8365_AFE_IRQ9, + .irq_cnt_reg = -1, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x0, + .irq_en_reg = AFE_IRQ_MCU_CON2, + .irq_en_shift = 2, + .irq_fs_reg = -1, + .irq_fs_shift = 0, + .irq_fs_maskbit = 0x0, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 8, + }, { + .id = MT8365_AFE_IRQ10, + .irq_cnt_reg = AFE_IRQ_MCU_CNT10, + .irq_cnt_shift = 0, + .irq_cnt_maskbit = 0x3ffff, + .irq_en_reg = AFE_IRQ_MCU_CON2, + .irq_en_shift = 4, + .irq_fs_reg = -1, + .irq_fs_shift = 0, + .irq_fs_maskbit = 0x0, + .irq_clr_reg = AFE_IRQ_MCU_CLR, + .irq_clr_shift = 9, + }, +}; + +static int memif_specified_irqs[MT8365_AFE_MEMIF_NUM] = { + [MT8365_AFE_MEMIF_DL1] = MT8365_AFE_IRQ1, + [MT8365_AFE_MEMIF_DL2] = MT8365_AFE_IRQ2, + [MT8365_AFE_MEMIF_TDM_OUT] = MT8365_AFE_IRQ5, + [MT8365_AFE_MEMIF_AWB] = MT8365_AFE_IRQ3, + [MT8365_AFE_MEMIF_VUL] = MT8365_AFE_IRQ4, + [MT8365_AFE_MEMIF_VUL2] = MT8365_AFE_IRQ7, + [MT8365_AFE_MEMIF_VUL3] = MT8365_AFE_IRQ8, + [MT8365_AFE_MEMIF_TDM_IN] = MT8365_AFE_IRQ10, +}; + +static const struct regmap_config mt8365_afe_regmap_config = { + .reg_bits = 32, + .reg_stride = 4, + .val_bits = 32, + .max_register = MAX_REGISTER, + .cache_type = REGCACHE_NONE, +}; + +static irqreturn_t mt8365_afe_irq_handler(int irq, void *dev_id) +{ + struct mtk_base_afe *afe = dev_id; + unsigned int reg_value; + unsigned int mcu_irq_mask; + int i, ret; + + ret = regmap_read(afe->regmap, AFE_IRQ_MCU_STATUS, ®_value); + if (ret) { + dev_err_ratelimited(afe->dev, "%s irq status err\n", __func__); + reg_value = AFE_IRQ_STATUS_BITS; + goto err_irq; + } + + ret = regmap_read(afe->regmap, AFE_IRQ_MCU_EN, &mcu_irq_mask); + if (ret) { + dev_err_ratelimited(afe->dev, "%s irq mcu_en err\n", __func__); + reg_value = AFE_IRQ_STATUS_BITS; + goto err_irq; + } + + /* only clr cpu irq */ + reg_value &= mcu_irq_mask; + + for (i = 0; i < MT8365_AFE_MEMIF_NUM; i++) { + struct mtk_base_afe_memif *memif = &afe->memif[i]; + struct mtk_base_afe_irq *mcu_irq; + + if (memif->irq_usage < 0) + continue; + + mcu_irq = &afe->irqs[memif->irq_usage]; + + if (!(reg_value & (1 << mcu_irq->irq_data->irq_clr_shift))) + continue; + + snd_pcm_period_elapsed(memif->substream); + } + +err_irq: + /* clear irq */ + regmap_write(afe->regmap, AFE_IRQ_MCU_CLR, + reg_value & AFE_IRQ_STATUS_BITS); + + return IRQ_HANDLED; +} + +static int mt8365_afe_runtime_suspend(struct device *dev) +{ + return 0; +} + +static int mt8365_afe_runtime_resume(struct device *dev) +{ + return 0; +} + +static int mt8365_afe_suspend(struct device *dev) +{ + struct mtk_base_afe *afe = dev_get_drvdata(dev); + struct regmap *regmap = afe->regmap; + int i; + + mt8365_afe_enable_main_clk(afe); + + if (!afe->reg_back_up) + afe->reg_back_up = + devm_kcalloc(dev, afe->reg_back_up_list_num, + sizeof(unsigned int), GFP_KERNEL); + + for (i = 0; i < afe->reg_back_up_list_num; i++) + regmap_read(regmap, afe->reg_back_up_list[i], + &afe->reg_back_up[i]); + + mt8365_afe_disable_main_clk(afe); + + return 0; +} + +static int mt8365_afe_resume(struct device *dev) +{ + struct mtk_base_afe *afe = dev_get_drvdata(dev); + struct regmap *regmap = afe->regmap; + int i = 0; + + if (!afe->reg_back_up) + return 0; + + mt8365_afe_enable_main_clk(afe); + + for (i = 0; i < afe->reg_back_up_list_num; i++) + regmap_write(regmap, afe->reg_back_up_list[i], + afe->reg_back_up[i]); + + mt8365_afe_disable_main_clk(afe); + + return 0; +} + +static int mt8365_afe_dev_runtime_suspend(struct device *dev) +{ + struct mtk_base_afe *afe = dev_get_drvdata(dev); + + if (pm_runtime_status_suspended(dev) || afe->suspended) + return 0; + + mt8365_afe_suspend(dev); + afe->suspended = true; + return 0; +} + +static int mt8365_afe_dev_runtime_resume(struct device *dev) +{ + struct mtk_base_afe *afe = dev_get_drvdata(dev); + + if (pm_runtime_status_suspended(dev) || !afe->suspended) + return 0; + + mt8365_afe_resume(dev); + afe->suspended = false; + return 0; +} + +static int mt8365_afe_init_registers(struct mtk_base_afe *afe) +{ + size_t i; + + static struct { + unsigned int reg; + unsigned int mask; + unsigned int val; + } init_regs[] = { + { AFE_CONN_24BIT, GENMASK(31, 0), GENMASK(31, 0) }, + { AFE_CONN_24BIT_1, GENMASK(21, 0), GENMASK(21, 0) }, + }; + + mt8365_afe_enable_main_clk(afe); + + for (i = 0; i < ARRAY_SIZE(init_regs); i++) + regmap_update_bits(afe->regmap, init_regs[i].reg, + init_regs[i].mask, init_regs[i].val); + + mt8365_afe_disable_main_clk(afe); + + return 0; +} + +static int mt8365_dai_memif_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + + list_add(&dai->list, &afe->sub_dais); + + dai->dai_drivers = mt8365_memif_dai_driver; + dai->num_dai_drivers = ARRAY_SIZE(mt8365_memif_dai_driver); + + dai->dapm_widgets = mt8365_memif_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mt8365_memif_widgets); + dai->dapm_routes = mt8365_memif_routes; + dai->num_dapm_routes = ARRAY_SIZE(mt8365_memif_routes); + return 0; +} + +typedef int (*dai_register_cb)(struct mtk_base_afe *); +static const dai_register_cb dai_register_cbs[] = { + mt8365_dai_pcm_register, + mt8365_dai_i2s_register, + mt8365_dai_adda_register, + mt8365_dai_dmic_register, + mt8365_dai_memif_register, +}; + +static int mt8365_afe_pcm_dev_probe(struct platform_device *pdev) +{ + struct mtk_base_afe *afe; + struct mt8365_afe_private *afe_priv; + struct device *dev; + int ret, i, sel_irq; + unsigned int irq_id; + struct resource *res; + + afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL); + if (!afe) + return -ENOMEM; + platform_set_drvdata(pdev, afe); + + afe->platform_priv = devm_kzalloc(&pdev->dev, sizeof(*afe_priv), + GFP_KERNEL); + if (!afe->platform_priv) + return -ENOMEM; + + afe_priv = afe->platform_priv; + afe->dev = &pdev->dev; + dev = afe->dev; + + spin_lock_init(&afe_priv->afe_ctrl_lock); + mutex_init(&afe_priv->afe_clk_mutex); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + afe->base_addr = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(afe->base_addr)) + return PTR_ERR(afe->base_addr); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (res) { + afe_priv->afe_sram_vir_addr = + devm_ioremap_resource(&pdev->dev, res); + if (!IS_ERR(afe_priv->afe_sram_vir_addr)) { + afe_priv->afe_sram_phy_addr = res->start; + afe_priv->afe_sram_size = resource_size(res); + } + } + + /* initial audio related clock */ + ret = mt8365_afe_init_audio_clk(afe); + if (ret) + return dev_err_probe(afe->dev, ret, "mt8365_afe_init_audio_clk fail\n"); + + afe->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "top_audio_sel", + afe->base_addr, + &mt8365_afe_regmap_config); + if (IS_ERR(afe->regmap)) + return PTR_ERR(afe->regmap); + + /* memif % irq initialize*/ + afe->memif_size = MT8365_AFE_MEMIF_NUM; + afe->memif = devm_kcalloc(afe->dev, afe->memif_size, + sizeof(*afe->memif), GFP_KERNEL); + if (!afe->memif) + return -ENOMEM; + + afe->irqs_size = MT8365_AFE_IRQ_NUM; + afe->irqs = devm_kcalloc(afe->dev, afe->irqs_size, + sizeof(*afe->irqs), GFP_KERNEL); + if (!afe->irqs) + return -ENOMEM; + + for (i = 0; i < afe->irqs_size; i++) + afe->irqs[i].irq_data = &irq_data[i]; + + ret = platform_get_irq(pdev, 0); + if (ret < 0) + return ret; + + irq_id = ret; + ret = devm_request_irq(afe->dev, irq_id, mt8365_afe_irq_handler, + 0, "Afe_ISR_Handle", (void *)afe); + if (ret) + return dev_err_probe(afe->dev, ret, "could not request_irq\n"); + + /* init sub_dais */ + INIT_LIST_HEAD(&afe->sub_dais); + + for (i = 0; i < ARRAY_SIZE(dai_register_cbs); i++) { + ret = dai_register_cbs[i](afe); + if (ret) { + dev_warn(afe->dev, "dai register i %d fail, ret %d\n", + i, ret); + return ret; + } + } + + /* init dai_driver and component_driver */ + ret = mtk_afe_combine_sub_dai(afe); + if (ret) { + dev_warn(afe->dev, "mtk_afe_combine_sub_dai fail, ret %d\n", + ret); + return ret; + } + + for (i = 0; i < afe->memif_size; i++) { + afe->memif[i].data = &memif_data[i]; + sel_irq = memif_specified_irqs[i]; + if (sel_irq >= 0) { + afe->memif[i].irq_usage = sel_irq; + afe->memif[i].const_irq = 1; + afe->irqs[sel_irq].irq_occupyed = true; + } else { + afe->memif[i].irq_usage = -1; + } + } + + afe->mtk_afe_hardware = &mt8365_afe_hardware; + afe->memif_fs = mt8365_memif_fs; + afe->irq_fs = mt8365_irq_fs; + + ret = devm_pm_runtime_enable(&pdev->dev); + if (ret) + return ret; + + pm_runtime_get_sync(&pdev->dev); + afe->reg_back_up_list = mt8365_afe_backup_list; + afe->reg_back_up_list_num = ARRAY_SIZE(mt8365_afe_backup_list); + afe->runtime_resume = mt8365_afe_runtime_resume; + afe->runtime_suspend = mt8365_afe_runtime_suspend; + + /* open afe pdn for dapm read/write audio register */ + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_AFE); + + /* Set 26m parent clk */ + mt8365_afe_set_clk_parent(afe, + afe_priv->clocks[MT8365_CLK_TOP_AUD_SEL], + afe_priv->clocks[MT8365_CLK_CLK26M]); + + ret = devm_snd_soc_register_component(&pdev->dev, + &mtk_afe_pcm_platform, + afe->dai_drivers, + afe->num_dai_drivers); + if (ret) { + dev_warn(dev, "err_platform\n"); + return ret; + } + + mt8365_afe_init_registers(afe); + + return 0; +} + +static void mt8365_afe_pcm_dev_remove(struct platform_device *pdev) +{ + struct mtk_base_afe *afe = platform_get_drvdata(pdev); + + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_AFE); + + pm_runtime_disable(&pdev->dev); + if (!pm_runtime_status_suspended(&pdev->dev)) + mt8365_afe_runtime_suspend(&pdev->dev); +} + +static const struct of_device_id mt8365_afe_pcm_dt_match[] = { + { .compatible = "mediatek,mt8365-afe-pcm", }, + { } +}; +MODULE_DEVICE_TABLE(of, mt8365_afe_pcm_dt_match); + +static const struct dev_pm_ops mt8365_afe_pm_ops = { + RUNTIME_PM_OPS(mt8365_afe_dev_runtime_suspend, + mt8365_afe_dev_runtime_resume, NULL) + SYSTEM_SLEEP_PM_OPS(mt8365_afe_suspend, mt8365_afe_resume) +}; + +static struct platform_driver mt8365_afe_pcm_driver = { + .driver = { + .name = "mt8365-afe-pcm", + .of_match_table = mt8365_afe_pcm_dt_match, + .pm = pm_ptr(&mt8365_afe_pm_ops), + }, + .probe = mt8365_afe_pcm_dev_probe, + .remove = mt8365_afe_pcm_dev_remove, +}; + +module_platform_driver(mt8365_afe_pcm_driver); + +MODULE_DESCRIPTION("MediaTek ALSA SoC AFE platform driver"); +MODULE_AUTHOR("Jia Zeng <jia.zeng@mediatek.com>"); +MODULE_AUTHOR("Alexandre Mergnat <amergnat@baylibre.com>"); +MODULE_LICENSE("GPL"); diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-adda.c b/sound/soc/mediatek/mt8365/mt8365-dai-adda.c new file mode 100644 index 000000000000..a04c24bbfcff --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-dai-adda.c @@ -0,0 +1,311 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 ALSA SoC Audio DAI ADDA Control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#include <linux/bitops.h> +#include <linux/regmap.h> +#include <sound/pcm_params.h> +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" +#include "../common/mtk-dai-adda-common.h" + +static int adda_afe_on_ref_cnt; + +/* DAI Drivers */ + +static int mt8365_dai_set_adda_out(struct mtk_base_afe *afe, unsigned int rate) +{ + unsigned int val; + + if (rate == 8000 || rate == 16000) + val = AFE_ADDA_DL_VOICE_DATA; + else + val = 0; + + val |= FIELD_PREP(AFE_ADDA_DL_SAMPLING_RATE, + mtk_adda_dl_rate_transform(afe, rate)); + val |= AFE_ADDA_DL_8X_UPSAMPLE | + AFE_ADDA_DL_MUTE_OFF_CH1 | + AFE_ADDA_DL_MUTE_OFF_CH2 | + AFE_ADDA_DL_DEGRADE_GAIN; + + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON0, 0xffffffff, 0); + regmap_update_bits(afe->regmap, AFE_ADDA_PREDIS_CON1, 0xffffffff, 0); + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, 0xffffffff, val); + /* SA suggest apply -0.3db to audio/speech path */ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON1, + 0xffffffff, 0xf74f0000); + /* SA suggest use default value for sdm */ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SDM_DCCOMP_CON, + 0xffffffff, 0x0700701e); + + return 0; +} + +static int mt8365_dai_set_adda_in(struct mtk_base_afe *afe, unsigned int rate) +{ + unsigned int val; + + val = FIELD_PREP(AFE_ADDA_UL_SAMPLING_RATE, + mtk_adda_ul_rate_transform(afe, rate)); + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, + AFE_ADDA_UL_SAMPLING_RATE, val); + /* Using Internal ADC */ + regmap_update_bits(afe->regmap, AFE_ADDA_TOP_CON0, 0x1, 0x0); + + return 0; +} + +int mt8365_dai_enable_adda_on(struct mtk_base_afe *afe) +{ + unsigned long flags; + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + adda_afe_on_ref_cnt++; + if (adda_afe_on_ref_cnt == 1) + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_ADDA_AFE_ON, + AFE_ADDA_UL_DL_ADDA_AFE_ON); + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +int mt8365_dai_disable_adda_on(struct mtk_base_afe *afe) +{ + unsigned long flags; + struct mt8365_afe_private *afe_priv = afe->platform_priv; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + adda_afe_on_ref_cnt--; + if (adda_afe_on_ref_cnt == 0) + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_ADDA_AFE_ON, + ~AFE_ADDA_UL_DL_ADDA_AFE_ON); + else if (adda_afe_on_ref_cnt < 0) { + adda_afe_on_ref_cnt = 0; + dev_warn(afe->dev, "Abnormal adda_on ref count. Force it to 0\n"); + } + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); + + return 0; +} + +static void mt8365_dai_set_adda_out_enable(struct mtk_base_afe *afe, + bool enable) +{ + regmap_update_bits(afe->regmap, AFE_ADDA_DL_SRC2_CON0, 0x1, enable); + + if (enable) + mt8365_dai_enable_adda_on(afe); + else + mt8365_dai_disable_adda_on(afe); +} + +static void mt8365_dai_set_adda_in_enable(struct mtk_base_afe *afe, bool enable) +{ + if (enable) { + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, 0x1, 0x1); + mt8365_dai_enable_adda_on(afe); + /* enable aud_pad_top fifo */ + regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, + 0xffffffff, 0x31); + } else { + /* disable aud_pad_top fifo */ + regmap_update_bits(afe->regmap, AFE_AUD_PAD_TOP, + 0xffffffff, 0x30); + regmap_update_bits(afe->regmap, AFE_ADDA_UL_SRC_CON0, 0x1, 0x0); + /* de suggest disable ADDA_UL_SRC at least wait 125us */ + usleep_range(150, 300); + mt8365_dai_disable_adda_on(afe); + } +} + +static int mt8365_dai_int_adda_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + unsigned int stream = substream->stream; + + mt8365_afe_enable_main_clk(afe); + + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DAC); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DAC_PREDIS); + } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_ADC); + } + + return 0; +} + +static void mt8365_dai_int_adda_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + unsigned int stream = substream->stream; + + if (be->prepared[stream]) { + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_dai_set_adda_out_enable(afe, false); + mt8365_afe_set_i2s_out_enable(afe, false); + } else { + mt8365_dai_set_adda_in_enable(afe, false); + } + be->prepared[stream] = false; + } + + if (stream == SNDRV_PCM_STREAM_PLAYBACK) { + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DAC_PREDIS); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DAC); + } else if (stream == SNDRV_PCM_STREAM_CAPTURE) { + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_ADC); + } + + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_dai_int_adda_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = + &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + unsigned int rate = substream->runtime->rate; + int bit_width = snd_pcm_format_width(substream->runtime->format); + int ret; + + dev_info(afe->dev, "%s '%s' rate = %u\n", __func__, + snd_pcm_stream_str(substream), rate); + + if (be->prepared[substream->stream]) { + dev_info(afe->dev, "%s '%s' prepared already\n", + __func__, snd_pcm_stream_str(substream)); + return 0; + } + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + ret = mt8365_dai_set_adda_out(afe, rate); + if (ret) + return ret; + + ret = mt8365_afe_set_i2s_out(afe, rate, bit_width); + if (ret) + return ret; + + mt8365_dai_set_adda_out_enable(afe, true); + mt8365_afe_set_i2s_out_enable(afe, true); + } else { + ret = mt8365_dai_set_adda_in(afe, rate); + if (ret) + return ret; + + mt8365_dai_set_adda_in_enable(afe, true); + } + be->prepared[substream->stream] = true; + return 0; +} + +static const struct snd_soc_dai_ops mt8365_afe_int_adda_ops = { + .startup = mt8365_dai_int_adda_startup, + .shutdown = mt8365_dai_int_adda_shutdown, + .prepare = mt8365_dai_int_adda_prepare, +}; + +static struct snd_soc_dai_driver mtk_dai_adda_driver[] = { + { + .name = "INT ADDA", + .id = MT8365_AFE_IO_INT_ADDA, + .playback = { + .stream_name = "INT ADDA Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE, + }, + .capture = { + .stream_name = "INT ADDA Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_int_adda_ops, + } +}; + +/* DAI Controls */ + +static const struct snd_kcontrol_new mtk_adda_dl_ch1_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH1 Switch", AFE_CONN3, + 10, 1, 0), +}; + +static const struct snd_kcontrol_new mtk_adda_dl_ch2_mix[] = { + SOC_DAPM_SINGLE_AUTODISABLE("GAIN1_OUT_CH2 Switch", AFE_CONN4, + 11, 1, 0), +}; + +static const struct snd_kcontrol_new int_adda_o03_o04_enable_ctl = + SOC_DAPM_SINGLE_VIRT("Switch", 1); + +/* DAI widget */ + +static const struct snd_soc_dapm_widget mtk_dai_adda_widgets[] = { + SND_SOC_DAPM_SWITCH("INT ADDA O03_O04", SND_SOC_NOPM, 0, 0, + &int_adda_o03_o04_enable_ctl), + /* inter-connections */ + SND_SOC_DAPM_MIXER("ADDA_DL_CH1", SND_SOC_NOPM, 0, 0, + mtk_adda_dl_ch1_mix, + ARRAY_SIZE(mtk_adda_dl_ch1_mix)), + SND_SOC_DAPM_MIXER("ADDA_DL_CH2", SND_SOC_NOPM, 0, 0, + mtk_adda_dl_ch2_mix, + ARRAY_SIZE(mtk_adda_dl_ch2_mix)), +}; + +/* DAI route */ + +static const struct snd_soc_dapm_route mtk_dai_adda_routes[] = { + {"INT ADDA O03_O04", "Switch", "O03"}, + {"INT ADDA O03_O04", "Switch", "O04"}, + {"INT ADDA Playback", NULL, "INT ADDA O03_O04"}, + {"INT ADDA Playback", NULL, "ADDA_DL_CH1"}, + {"INT ADDA Playback", NULL, "ADDA_DL_CH2"}, + {"AIN Mux", "INT ADC", "INT ADDA Capture"}, + {"ADDA_DL_CH1", "GAIN1_OUT_CH1", "Hostless FM DL"}, + {"ADDA_DL_CH2", "GAIN1_OUT_CH2", "Hostless FM DL"}, +}; + +int mt8365_dai_adda_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + list_add(&dai->list, &afe->sub_dais); + dai->dai_drivers = mtk_dai_adda_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_adda_driver); + dai->dapm_widgets = mtk_dai_adda_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_adda_widgets); + dai->dapm_routes = mtk_dai_adda_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_adda_routes); + return 0; +} diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-dmic.c b/sound/soc/mediatek/mt8365/mt8365-dai-dmic.c new file mode 100644 index 000000000000..0bac143b48bf --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-dai-dmic.c @@ -0,0 +1,310 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 ALSA SoC Audio DAI DMIC Control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#include <linux/bitops.h> +#include <linux/regmap.h> +#include <sound/pcm_params.h> +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" + +struct mt8365_dmic_data { + bool two_wire_mode; + unsigned int clk_phase_sel_ch1; + unsigned int clk_phase_sel_ch2; + bool iir_on; + unsigned int irr_mode; + unsigned int dmic_mode; + unsigned int dmic_channel; +}; + +static int get_chan_reg(unsigned int channel) +{ + switch (channel) { + case 8: + fallthrough; + case 7: + return AFE_DMIC3_UL_SRC_CON0; + case 6: + fallthrough; + case 5: + return AFE_DMIC2_UL_SRC_CON0; + case 4: + fallthrough; + case 3: + return AFE_DMIC1_UL_SRC_CON0; + case 2: + fallthrough; + case 1: + return AFE_DMIC0_UL_SRC_CON0; + default: + return -EINVAL; + } +} + +/* DAI Drivers */ + +static void audio_dmic_adda_enable(struct mtk_base_afe *afe) +{ + mt8365_dai_enable_adda_on(afe); + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_DMIC_CLKDIV_ON, + AFE_ADDA_UL_DL_DMIC_CLKDIV_ON); +} + +static void audio_dmic_adda_disable(struct mtk_base_afe *afe) +{ + regmap_update_bits(afe->regmap, AFE_ADDA_UL_DL_CON0, + AFE_ADDA_UL_DL_DMIC_CLKDIV_ON, + ~AFE_ADDA_UL_DL_DMIC_CLKDIV_ON); + mt8365_dai_disable_adda_on(afe); +} + +static void mt8365_dai_enable_dmic(struct mtk_base_afe *afe, + struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_dmic_data *dmic_data = afe_priv->dai_priv[MT8365_AFE_IO_DMIC]; + unsigned int val_mask; + int reg = get_chan_reg(dmic_data->dmic_channel); + + if (reg < 0) + return; + + /* val and mask will be always same to enable */ + val_mask = DMIC_TOP_CON_CH1_ON | + DMIC_TOP_CON_CH2_ON | + DMIC_TOP_CON_SRC_ON; + + regmap_update_bits(afe->regmap, reg, val_mask, val_mask); +} + +static void mt8365_dai_disable_dmic(struct mtk_base_afe *afe, + struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_dmic_data *dmic_data = afe_priv->dai_priv[MT8365_AFE_IO_DMIC]; + unsigned int mask; + int reg = get_chan_reg(dmic_data->dmic_channel); + + if (reg < 0) + return; + + dev_dbg(afe->dev, "%s dmic_channel %d\n", __func__, dmic_data->dmic_channel); + + mask = DMIC_TOP_CON_CH1_ON | + DMIC_TOP_CON_CH2_ON | + DMIC_TOP_CON_SRC_ON | + DMIC_TOP_CON_SDM3_LEVEL_MODE; + + /* Set all masked values to 0 */ + regmap_update_bits(afe->regmap, reg, mask, 0); +} + +static int mt8365_dai_configure_dmic(struct mtk_base_afe *afe, + struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_dmic_data *dmic_data = afe_priv->dai_priv[MT8365_AFE_IO_DMIC]; + bool two_wire_mode = dmic_data->two_wire_mode; + unsigned int clk_phase_sel_ch1 = dmic_data->clk_phase_sel_ch1; + unsigned int clk_phase_sel_ch2 = dmic_data->clk_phase_sel_ch2; + unsigned int val = 0; + unsigned int rate = dai->symmetric_rate; + int reg = get_chan_reg(dai->symmetric_channels); + + if (reg < 0) + return -EINVAL; + + dmic_data->dmic_channel = dai->symmetric_channels; + + val |= DMIC_TOP_CON_SDM3_LEVEL_MODE; + + if (two_wire_mode) { + val |= DMIC_TOP_CON_TWO_WIRE_MODE; + } else { + val |= FIELD_PREP(DMIC_TOP_CON_CK_PHASE_SEL_CH1, + clk_phase_sel_ch1); + val |= FIELD_PREP(DMIC_TOP_CON_CK_PHASE_SEL_CH2, + clk_phase_sel_ch2); + } + + switch (rate) { + case 48000: + val |= DMIC_TOP_CON_VOICE_MODE_48K; + break; + case 32000: + val |= DMIC_TOP_CON_VOICE_MODE_32K; + break; + case 16000: + val |= DMIC_TOP_CON_VOICE_MODE_16K; + break; + case 8000: + val |= DMIC_TOP_CON_VOICE_MODE_8K; + break; + default: + return -EINVAL; + } + + regmap_update_bits(afe->regmap, reg, DMIC_TOP_CON_CONFIG_MASK, val); + + return 0; +} + +static int mt8365_dai_dmic_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + mt8365_afe_enable_main_clk(afe); + + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DMIC0_ADC); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DMIC1_ADC); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DMIC2_ADC); + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_DMIC3_ADC); + + audio_dmic_adda_enable(afe); + + return 0; +} + +static void mt8365_dai_dmic_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + mt8365_dai_disable_dmic(afe, substream, dai); + audio_dmic_adda_disable(afe); + /* HW Request delay 125us before CG off */ + usleep_range(125, 300); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DMIC3_ADC); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DMIC2_ADC); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DMIC1_ADC); + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_DMIC0_ADC); + + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_dai_dmic_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + mt8365_dai_configure_dmic(afe, substream, dai); + mt8365_dai_enable_dmic(afe, substream, dai); + + return 0; +} + +static const struct snd_soc_dai_ops mt8365_afe_dmic_ops = { + .startup = mt8365_dai_dmic_startup, + .shutdown = mt8365_dai_dmic_shutdown, + .prepare = mt8365_dai_dmic_prepare, +}; + +static struct snd_soc_dai_driver mtk_dai_dmic_driver[] = { + { + .name = "DMIC", + .id = MT8365_AFE_IO_DMIC, + .capture = { + .stream_name = "DMIC Capture", + .channels_min = 1, + .channels_max = 8, + .rates = SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_dmic_ops, + } +}; + +/* DAI Controls */ + +/* Values for 48kHz mode */ +static const char * const iir_mode_src[] = { + "SW custom", "5Hz", "10Hz", "25Hz", "50Hz", "65Hz" +}; + +static SOC_ENUM_SINGLE_DECL(iir_mode, AFE_DMIC0_UL_SRC_CON0, 7, iir_mode_src); + +static const struct snd_kcontrol_new mtk_dai_dmic_controls[] = { + SOC_SINGLE("DMIC IIR Switch", AFE_DMIC0_UL_SRC_CON0, DMIC_TOP_CON_IIR_ON, 1, 0), + SOC_ENUM("DMIC IIR Mode", iir_mode), +}; + +/* DAI widget */ + +static const struct snd_soc_dapm_widget mtk_dai_dmic_widgets[] = { + SND_SOC_DAPM_INPUT("DMIC In"), +}; + +/* DAI route */ + +static const struct snd_soc_dapm_route mtk_dai_dmic_routes[] = { + {"I14", NULL, "DMIC Capture"}, + {"I15", NULL, "DMIC Capture"}, + {"I16", NULL, "DMIC Capture"}, + {"I17", NULL, "DMIC Capture"}, + {"I18", NULL, "DMIC Capture"}, + {"I19", NULL, "DMIC Capture"}, + {"I20", NULL, "DMIC Capture"}, + {"I21", NULL, "DMIC Capture"}, + {"DMIC Capture", NULL, "DMIC In"}, +}; + +static int init_dmic_priv_data(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_dmic_data *dmic_priv; + struct device_node *np = afe->dev->of_node; + unsigned int temps[4]; + int ret; + + dmic_priv = devm_kzalloc(afe->dev, sizeof(*dmic_priv), GFP_KERNEL); + if (!dmic_priv) + return -ENOMEM; + + ret = of_property_read_u32_array(np, "mediatek,dmic-mode", + &temps[0], + 1); + if (ret == 0) + dmic_priv->two_wire_mode = !!temps[0]; + + if (!dmic_priv->two_wire_mode) { + dmic_priv->clk_phase_sel_ch1 = 0; + dmic_priv->clk_phase_sel_ch2 = 4; + } + + afe_priv->dai_priv[MT8365_AFE_IO_DMIC] = dmic_priv; + return 0; +} + +int mt8365_dai_dmic_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + + list_add(&dai->list, &afe->sub_dais); + dai->dai_drivers = mtk_dai_dmic_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_dmic_driver); + dai->controls = mtk_dai_dmic_controls; + dai->num_controls = ARRAY_SIZE(mtk_dai_dmic_controls); + dai->dapm_widgets = mtk_dai_dmic_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_dmic_widgets); + dai->dapm_routes = mtk_dai_dmic_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_dmic_routes); + return init_dmic_priv_data(afe); +} diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-i2s.c b/sound/soc/mediatek/mt8365/mt8365-dai-i2s.c new file mode 100644 index 000000000000..cb9beb172ed5 --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-dai-i2s.c @@ -0,0 +1,845 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 ALSA SoC Audio DAI I2S Control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#include <linux/bitops.h> +#include <linux/regmap.h> +#include <sound/pcm_params.h> +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" + +#define IIR_RATIOVER 9 +#define IIR_INV_COEF 10 +#define IIR_NO_NEED 11 + +struct mtk_afe_i2s_priv { + bool adda_link; + int i2s_out_on_ref_cnt; + int id; + int low_jitter_en; + int mclk_id; + int share_i2s_id; + unsigned int clk_id_in; + unsigned int clk_id_in_m_sel; + unsigned int clk_id_out; + unsigned int clk_id_out_m_sel; + unsigned int clk_in_mult; + unsigned int clk_out_mult; + unsigned int config_val_in; + unsigned int config_val_out; + unsigned int dynamic_bck; + unsigned int reg_off_in; + unsigned int reg_off_out; +}; + +/* This enum is merely for mtk_afe_i2s_priv declare */ +enum { + DAI_I2S0 = 0, + DAI_I2S3, + DAI_I2S_NUM, +}; + +static const struct mtk_afe_i2s_priv mt8365_i2s_priv[DAI_I2S_NUM] = { + [DAI_I2S0] = { + .id = MT8365_AFE_IO_I2S, + .mclk_id = MT8365_I2S0_MCK, + .share_i2s_id = -1, + .clk_id_in = MT8365_CLK_AUD_I2S2_M, + .clk_id_out = MT8365_CLK_AUD_I2S1_M, + .clk_id_in_m_sel = MT8365_CLK_I2S2_M_SEL, + .clk_id_out_m_sel = MT8365_CLK_I2S1_M_SEL, + .clk_in_mult = 256, + .clk_out_mult = 256, + .adda_link = true, + .config_val_out = AFE_I2S_CON1_I2S2_TO_PAD, + .reg_off_in = AFE_I2S_CON2, + .reg_off_out = AFE_I2S_CON1, + }, + [DAI_I2S3] = { + .id = MT8365_AFE_IO_2ND_I2S, + .mclk_id = MT8365_I2S3_MCK, + .share_i2s_id = -1, + .clk_id_in = MT8365_CLK_AUD_I2S0_M, + .clk_id_out = MT8365_CLK_AUD_I2S3_M, + .clk_id_in_m_sel = MT8365_CLK_I2S0_M_SEL, + .clk_id_out_m_sel = MT8365_CLK_I2S3_M_SEL, + .clk_in_mult = 256, + .clk_out_mult = 256, + .adda_link = false, + .config_val_in = AFE_I2S_CON_FROM_IO_MUX, + .reg_off_in = AFE_I2S_CON, + .reg_off_out = AFE_I2S_CON3, + }, +}; + +static const u32 *get_iir_coef(unsigned int input_fs, + unsigned int output_fs, unsigned int *count) +{ + static const u32 IIR_COEF_48_TO_44p1[30] = { + 0x061fb0, 0x0bd256, 0x061fb0, 0xe3a3e6, 0xf0a300, 0x000003, + 0x0e416d, 0x1bb577, 0x0e416d, 0xe59178, 0xf23637, 0x000003, + 0x0c7d72, 0x189060, 0x0c7d72, 0xe96f09, 0xf505b2, 0x000003, + 0x126054, 0x249143, 0x126054, 0xe1fc0c, 0xf4b20a, 0x000002, + 0x000000, 0x323c85, 0x323c85, 0xf76d4e, 0x000000, 0x000002, + }; + + static const u32 IIR_COEF_44p1_TO_32[42] = { + 0x0a6074, 0x0d237a, 0x0a6074, 0xdd8d6c, 0xe0b3f6, 0x000002, + 0x0e41f8, 0x128d48, 0x0e41f8, 0xefc14e, 0xf12d7a, 0x000003, + 0x0cfa60, 0x11e89c, 0x0cfa60, 0xf1b09e, 0xf27205, 0x000003, + 0x15b69c, 0x20e7e4, 0x15b69c, 0xea799a, 0xe9314a, 0x000002, + 0x0f79e2, 0x1a7064, 0x0f79e2, 0xf65e4a, 0xf03d8e, 0x000002, + 0x10c34f, 0x1ffe4b, 0x10c34f, 0x0bbecb, 0xf2bc4b, 0x000001, + 0x000000, 0x23b063, 0x23b063, 0x07335f, 0x000000, 0x000002, + }; + + static const u32 IIR_COEF_48_TO_32[42] = { + 0x0a2a9b, 0x0a2f05, 0x0a2a9b, 0xe73873, 0xe0c525, 0x000002, + 0x0dd4ad, 0x0e765a, 0x0dd4ad, 0xf49808, 0xf14844, 0x000003, + 0x18a8cd, 0x1c40d0, 0x18a8cd, 0xed2aab, 0xe542ec, 0x000002, + 0x13e044, 0x1a47c4, 0x13e044, 0xf44aed, 0xe9acc7, 0x000002, + 0x1abd9c, 0x2a5429, 0x1abd9c, 0xff3441, 0xe0fc5f, 0x000001, + 0x0d86db, 0x193e2e, 0x0d86db, 0x1a6f15, 0xf14507, 0x000001, + 0x000000, 0x1f820c, 0x1f820c, 0x0a1b1f, 0x000000, 0x000002, + }; + + static const u32 IIR_COEF_32_TO_16[48] = { + 0x122893, 0xffadd4, 0x122893, 0x0bc205, 0xc0ee1c, 0x000001, + 0x1bab8a, 0x00750d, 0x1bab8a, 0x06a983, 0xe18a5c, 0x000002, + 0x18f68e, 0x02706f, 0x18f68e, 0x0886a9, 0xe31bcb, 0x000002, + 0x149c05, 0x054487, 0x149c05, 0x0bec31, 0xe5973e, 0x000002, + 0x0ea303, 0x07f24a, 0x0ea303, 0x115ff9, 0xe967b6, 0x000002, + 0x0823fd, 0x085531, 0x0823fd, 0x18d5b4, 0xee8d21, 0x000002, + 0x06888e, 0x0acbbb, 0x06888e, 0x40b55c, 0xe76dce, 0x000001, + 0x000000, 0x2d31a9, 0x2d31a9, 0x23ba4f, 0x000000, 0x000001, + }; + + static const u32 IIR_COEF_96_TO_44p1[48] = { + 0x08b543, 0xfd80f4, 0x08b543, 0x0e2332, 0xe06ed0, 0x000002, + 0x1b6038, 0xf90e7e, 0x1b6038, 0x0ec1ac, 0xe16f66, 0x000002, + 0x188478, 0xfbb921, 0x188478, 0x105859, 0xe2e596, 0x000002, + 0x13eff3, 0xffa707, 0x13eff3, 0x13455c, 0xe533b7, 0x000002, + 0x0dc239, 0x03d458, 0x0dc239, 0x17f120, 0xe8b617, 0x000002, + 0x0745f1, 0x05d790, 0x0745f1, 0x1e3d75, 0xed5f18, 0x000002, + 0x05641f, 0x085e2b, 0x05641f, 0x48efd0, 0xe3e9c8, 0x000001, + 0x000000, 0x28f632, 0x28f632, 0x273905, 0x000000, 0x000001, + }; + + static const u32 IIR_COEF_44p1_TO_16[48] = { + 0x0998fb, 0xf7f925, 0x0998fb, 0x1e54a0, 0xe06605, 0x000002, + 0x0d828e, 0xf50f97, 0x0d828e, 0x0f41b5, 0xf0a999, 0x000003, + 0x17ebeb, 0xee30d8, 0x17ebeb, 0x1f48ca, 0xe2ae88, 0x000002, + 0x12fab5, 0xf46ddc, 0x12fab5, 0x20cc51, 0xe4d068, 0x000002, + 0x0c7ac6, 0xfbd00e, 0x0c7ac6, 0x2337da, 0xe8028c, 0x000002, + 0x060ddc, 0x015b3e, 0x060ddc, 0x266754, 0xec21b6, 0x000002, + 0x0407b5, 0x04f827, 0x0407b5, 0x52e3d0, 0xe0149f, 0x000001, + 0x000000, 0x1f9521, 0x1f9521, 0x2ac116, 0x000000, 0x000001, + }; + + static const u32 IIR_COEF_48_TO_16[48] = { + 0x0955ff, 0xf6544a, 0x0955ff, 0x2474e5, 0xe062e6, 0x000002, + 0x0d4180, 0xf297f4, 0x0d4180, 0x12415b, 0xf0a3b0, 0x000003, + 0x0ba079, 0xf4f0b0, 0x0ba079, 0x1285d3, 0xf1488b, 0x000003, + 0x12247c, 0xf1033c, 0x12247c, 0x2625be, 0xe48e0d, 0x000002, + 0x0b98e0, 0xf96d1a, 0x0b98e0, 0x27e79c, 0xe7798a, 0x000002, + 0x055e3b, 0xffed09, 0x055e3b, 0x2a2e2d, 0xeb2854, 0x000002, + 0x01a934, 0x01ca03, 0x01a934, 0x2c4fea, 0xee93ab, 0x000002, + 0x000000, 0x1c46c5, 0x1c46c5, 0x2d37dc, 0x000000, 0x000001, + }; + + static const u32 IIR_COEF_96_TO_16[48] = { + 0x0805a1, 0xf21ae3, 0x0805a1, 0x3840bb, 0xe02a2e, 0x000002, + 0x0d5dd8, 0xe8f259, 0x0d5dd8, 0x1c0af6, 0xf04700, 0x000003, + 0x0bb422, 0xec08d9, 0x0bb422, 0x1bfccc, 0xf09216, 0x000003, + 0x08fde6, 0xf108be, 0x08fde6, 0x1bf096, 0xf10ae0, 0x000003, + 0x0ae311, 0xeeeda3, 0x0ae311, 0x37c646, 0xe385f5, 0x000002, + 0x044089, 0xfa7242, 0x044089, 0x37a785, 0xe56526, 0x000002, + 0x00c75c, 0xffb947, 0x00c75c, 0x378ba3, 0xe72c5f, 0x000002, + 0x000000, 0x0ef76e, 0x0ef76e, 0x377fda, 0x000000, 0x000001, + }; + + static const struct { + const u32 *coef; + unsigned int cnt; + } iir_coef_tbl_list[8] = { + /* 0: 0.9188 */ + { IIR_COEF_48_TO_44p1, ARRAY_SIZE(IIR_COEF_48_TO_44p1) }, + /* 1: 0.7256 */ + { IIR_COEF_44p1_TO_32, ARRAY_SIZE(IIR_COEF_44p1_TO_32) }, + /* 2: 0.6667 */ + { IIR_COEF_48_TO_32, ARRAY_SIZE(IIR_COEF_48_TO_32) }, + /* 3: 0.5 */ + { IIR_COEF_32_TO_16, ARRAY_SIZE(IIR_COEF_32_TO_16) }, + /* 4: 0.4594 */ + { IIR_COEF_96_TO_44p1, ARRAY_SIZE(IIR_COEF_96_TO_44p1) }, + /* 5: 0.3628 */ + { IIR_COEF_44p1_TO_16, ARRAY_SIZE(IIR_COEF_44p1_TO_16) }, + /* 6: 0.3333 */ + { IIR_COEF_48_TO_16, ARRAY_SIZE(IIR_COEF_48_TO_16) }, + /* 7: 0.1667 */ + { IIR_COEF_96_TO_16, ARRAY_SIZE(IIR_COEF_96_TO_16) }, + }; + + static const u32 freq_new_index[16] = { + 0, 1, 2, 99, 3, 4, 5, 99, 6, 7, 8, 9, 10, 11, 12, 99 + }; + + static const u32 iir_coef_tbl_matrix[13][13] = { + {/*0*/ + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*1*/ + 1, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*2*/ + 2, 0, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*3*/ + 3, IIR_INV_COEF, IIR_INV_COEF, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*4*/ + 5, 3, IIR_INV_COEF, 2, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*5*/ + 6, 4, 3, 2, 0, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED + }, + {/*6*/ + IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, 3, IIR_INV_COEF, + IIR_INV_COEF, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*7*/ + IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, 5, 3, + IIR_INV_COEF, 1, IIR_NO_NEED, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*8*/ + 7, IIR_INV_COEF, IIR_INV_COEF, 6, 4, 3, 2, 0, IIR_NO_NEED, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*9*/ + IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, + IIR_INV_COEF, IIR_INV_COEF, 5, 3, IIR_INV_COEF, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + {/*10*/ + IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, 7, IIR_INV_COEF, + IIR_INV_COEF, 6, 4, 3, 0, + IIR_NO_NEED, IIR_NO_NEED, IIR_NO_NEED + }, + { /*11*/ + IIR_RATIOVER, IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, + IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, IIR_INV_COEF, + IIR_INV_COEF, 3, IIR_INV_COEF, IIR_NO_NEED, IIR_NO_NEED + }, + {/*12*/ + IIR_RATIOVER, IIR_RATIOVER, IIR_INV_COEF, IIR_INV_COEF, + IIR_INV_COEF, IIR_INV_COEF, 7, IIR_INV_COEF, + IIR_INV_COEF, 4, 3, 0, IIR_NO_NEED + }, + }; + + const u32 *coef = NULL; + unsigned int cnt = 0; + u32 i = freq_new_index[input_fs]; + u32 j = freq_new_index[output_fs]; + + if (i < 13 && j < 13) { + u32 k = iir_coef_tbl_matrix[i][j]; + + if (k >= IIR_NO_NEED) { + } else if (k == IIR_RATIOVER) { + } else if (k == IIR_INV_COEF) { + } else { + coef = iir_coef_tbl_list[k].coef; + cnt = iir_coef_tbl_list[k].cnt; + } + } + *count = cnt; + return coef; +} + +static int mt8365_dai_set_config(struct mtk_base_afe *afe, + struct mtk_afe_i2s_priv *i2s_data, + bool is_input, unsigned int rate, + int bit_width) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = + &afe_priv->be_data[i2s_data->id - MT8365_AFE_BACKEND_BASE]; + unsigned int val, reg_off; + int fs = mt8365_afe_fs_timing(rate); + + if (fs < 0) + return -EINVAL; + + val = AFE_I2S_CON_LOW_JITTER_CLK | AFE_I2S_CON_FORMAT_I2S; + val |= FIELD_PREP(AFE_I2S_CON_RATE_MASK, fs); + + if (is_input) { + reg_off = i2s_data->reg_off_in; + if (i2s_data->adda_link) + val |= i2s_data->config_val_in; + } else { + reg_off = i2s_data->reg_off_out; + val |= i2s_data->config_val_in; + } + + /* 1:bck=32lrck(16bit) or bck=64lrck(32bit) 0:fix bck=64lrck */ + if (i2s_data->dynamic_bck) { + if (bit_width > 16) + val |= AFE_I2S_CON_WLEN_32BIT; + else + val &= ~(u32)AFE_I2S_CON_WLEN_32BIT; + } else { + val |= AFE_I2S_CON_WLEN_32BIT; + } + + if ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) == + SND_SOC_DAIFMT_CBP_CFP) { + val |= AFE_I2S_CON_SRC_SLAVE; + val &= ~(u32)AFE_I2S_CON_FROM_IO_MUX;//from consys + } + + regmap_update_bits(afe->regmap, reg_off, ~(u32)AFE_I2S_CON_EN, val); + + if (i2s_data->adda_link && is_input) + regmap_update_bits(afe->regmap, AFE_ADDA_TOP_CON0, 0x1, 0x1); + + return 0; +} + +int mt8365_afe_set_i2s_out(struct mtk_base_afe *afe, + unsigned int rate, int bit_width) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mtk_afe_i2s_priv *i2s_data = + afe_priv->dai_priv[MT8365_AFE_IO_I2S]; + + return mt8365_dai_set_config(afe, i2s_data, false, rate, bit_width); +} + +static int mt8365_afe_set_2nd_i2s_asrc(struct mtk_base_afe *afe, + unsigned int rate_in, + unsigned int rate_out, + unsigned int width, + unsigned int mono, + int o16bit, int tracking) +{ + int ifs, ofs = 0; + unsigned int val = 0; + unsigned int mask = 0; + const u32 *coef; + u32 iir_stage; + unsigned int coef_count = 0; + + ifs = mt8365_afe_fs_timing(rate_in); + + if (ifs < 0) + return -EINVAL; + + ofs = mt8365_afe_fs_timing(rate_out); + + if (ofs < 0) + return -EINVAL; + + val = FIELD_PREP(O16BIT, o16bit) | FIELD_PREP(IS_MONO, mono); + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON2, + O16BIT | IS_MONO, val); + + coef = get_iir_coef(ifs, ofs, &coef_count); + iir_stage = ((u32)coef_count / 6) - 1; + + if (coef) { + unsigned int i; + + /* CPU control IIR coeff SRAM */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON0, + COEFF_SRAM_CTRL, COEFF_SRAM_CTRL); + + /* set to 0, IIR coeff SRAM addr */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON13, + 0xffffffff, 0x0); + + for (i = 0; i < coef_count; ++i) + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON12, + 0xffffffff, coef[i]); + + /* disable IIR coeff SRAM access */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON0, + COEFF_SRAM_CTRL, + ~COEFF_SRAM_CTRL); + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON2, + CLR_IIR_HISTORY | IIR_EN | IIR_STAGE_MASK, + CLR_IIR_HISTORY | IIR_EN | + FIELD_PREP(IIR_STAGE_MASK, iir_stage)); + } else { + /* disable IIR */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON2, + IIR_EN, ~IIR_EN); + } + + /* CON3 setting (RX OFS) */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON3, + 0x00FFFFFF, rx_frequency_palette(ofs)); + /* CON4 setting (RX IFS) */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON4, + 0x00FFFFFF, rx_frequency_palette(ifs)); + + /* CON5 setting */ + if (tracking) { + val = CALI_64_CYCLE | + CALI_AUTORST | + AUTO_TUNE_FREQ5 | + COMP_FREQ_RES | + CALI_BP_DGL | + CALI_AUTO_RESTART | + CALI_USE_FREQ_OUT | + CALI_SEL_01; + + mask = CALI_CYCLE_MASK | + CALI_AUTORST | + AUTO_TUNE_FREQ5 | + COMP_FREQ_RES | + CALI_SEL_MASK | + CALI_BP_DGL | + AUTO_TUNE_FREQ4 | + CALI_AUTO_RESTART | + CALI_USE_FREQ_OUT | + CALI_ON; + + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON5, + mask, val); + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON5, + CALI_ON, CALI_ON); + } else { + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON5, + 0xffffffff, 0x0); + } + /* CON6 setting fix 8125 */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON6, + 0x0000ffff, 0x1FBD); + /* CON9 setting (RX IFS) */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON9, + 0x000fffff, AutoRstThHi(ifs)); + /* CON10 setting (RX IFS) */ + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON10, + 0x000fffff, AutoRstThLo(ifs)); + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON0, + CHSET_STR_CLR, CHSET_STR_CLR); + + return 0; +} + +static int mt8365_afe_set_2nd_i2s_asrc_enable(struct mtk_base_afe *afe, + bool enable) +{ + if (enable) + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON0, + ASM_ON, ASM_ON); + else + regmap_update_bits(afe->regmap, AFE_ASRC_2CH_CON0, + ASM_ON, ~ASM_ON); + return 0; +} + +void mt8365_afe_set_i2s_out_enable(struct mtk_base_afe *afe, bool enable) +{ + int i; + unsigned long flags; + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mtk_afe_i2s_priv *i2s_data = NULL; + + for (i = 0; i < DAI_I2S_NUM; i++) { + if (mt8365_i2s_priv[i].adda_link) + i2s_data = afe_priv->dai_priv[mt8365_i2s_priv[i].id]; + } + + if (!i2s_data) + return; + + spin_lock_irqsave(&afe_priv->afe_ctrl_lock, flags); + + if (enable) { + i2s_data->i2s_out_on_ref_cnt++; + if (i2s_data->i2s_out_on_ref_cnt == 1) + regmap_update_bits(afe->regmap, AFE_I2S_CON1, + 0x1, enable); + } else { + i2s_data->i2s_out_on_ref_cnt--; + if (i2s_data->i2s_out_on_ref_cnt == 0) + regmap_update_bits(afe->regmap, AFE_I2S_CON1, + 0x1, enable); + else if (i2s_data->i2s_out_on_ref_cnt < 0) + i2s_data->i2s_out_on_ref_cnt = 0; + } + + spin_unlock_irqrestore(&afe_priv->afe_ctrl_lock, flags); +} + +static void mt8365_dai_set_enable(struct mtk_base_afe *afe, + struct mtk_afe_i2s_priv *i2s_data, + bool is_input, bool enable) +{ + unsigned int reg_off; + + if (is_input) { + reg_off = i2s_data->reg_off_in; + } else { + if (i2s_data->adda_link) { + mt8365_afe_set_i2s_out_enable(afe, enable); + return; + } + reg_off = i2s_data->reg_off_out; + } + regmap_update_bits(afe->regmap, reg_off, + 0x1, enable); +} + +static int mt8365_dai_i2s_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mtk_afe_i2s_priv *i2s_data = afe_priv->dai_priv[dai->id]; + struct mt8365_be_dai_data *be = &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + bool i2s_in_slave = + (substream->stream == SNDRV_PCM_STREAM_CAPTURE) && + ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) == + SND_SOC_DAIFMT_CBP_CFP); + + mt8365_afe_enable_main_clk(afe); + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + clk_prepare_enable(afe_priv->clocks[i2s_data->clk_id_out]); + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE && !i2s_in_slave) + clk_prepare_enable(afe_priv->clocks[i2s_data->clk_id_in]); + + if (i2s_in_slave) + mt8365_afe_enable_top_cg(afe, MT8365_TOP_CG_I2S_IN); + + return 0; +} + +static void mt8365_dai_i2s_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mtk_afe_i2s_priv *i2s_data = afe_priv->dai_priv[dai->id]; + struct mt8365_be_dai_data *be = &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + bool reset_i2s_out_change = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); + bool reset_i2s_in_change = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); + bool i2s_in_slave = + (substream->stream == SNDRV_PCM_STREAM_CAPTURE) && + ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) == + SND_SOC_DAIFMT_CBP_CFP); + + if (be->prepared[substream->stream]) { + if (reset_i2s_out_change) + mt8365_dai_set_enable(afe, i2s_data, false, false); + + if (reset_i2s_in_change) + mt8365_dai_set_enable(afe, i2s_data, true, false); + + if (substream->runtime->rate % 8000) + mt8365_afe_disable_apll_associated_cfg(afe, MT8365_AFE_APLL1); + else + mt8365_afe_disable_apll_associated_cfg(afe, MT8365_AFE_APLL2); + + if (reset_i2s_out_change) + be->prepared[SNDRV_PCM_STREAM_PLAYBACK] = false; + + if (reset_i2s_in_change) + be->prepared[SNDRV_PCM_STREAM_CAPTURE] = false; + } + + if (reset_i2s_out_change) + mt8365_afe_disable_clk(afe, + afe_priv->clocks[i2s_data->clk_id_out]); + + if (reset_i2s_in_change && !i2s_in_slave) + mt8365_afe_disable_clk(afe, + afe_priv->clocks[i2s_data->clk_id_in]); + + if (i2s_in_slave) + mt8365_afe_disable_top_cg(afe, MT8365_TOP_CG_I2S_IN); + + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_dai_i2s_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mtk_afe_i2s_priv *i2s_data = afe_priv->dai_priv[dai->id]; + struct mt8365_be_dai_data *be = &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + bool apply_i2s_out_change = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK); + bool apply_i2s_in_change = (substream->stream == SNDRV_PCM_STREAM_CAPTURE); + unsigned int rate = substream->runtime->rate; + int bit_width = snd_pcm_format_width(substream->runtime->format); + int ret; + + if (be->prepared[substream->stream]) { + dev_info(afe->dev, "%s '%s' prepared already\n", + __func__, snd_pcm_stream_str(substream)); + return 0; + } + + if (apply_i2s_out_change) { + ret = mt8365_dai_set_config(afe, i2s_data, false, rate, bit_width); + if (ret) + return ret; + } + + if (apply_i2s_in_change) { + if ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) + == SND_SOC_DAIFMT_CBP_CFP) { + ret = mt8365_afe_set_2nd_i2s_asrc(afe, 32000, rate, + (unsigned int)bit_width, + 0, 0, 1); + if (ret < 0) + return ret; + } + ret = mt8365_dai_set_config(afe, i2s_data, true, rate, bit_width); + if (ret) + return ret; + } + + if (rate % 8000) + mt8365_afe_enable_apll_associated_cfg(afe, MT8365_AFE_APLL1); + else + mt8365_afe_enable_apll_associated_cfg(afe, MT8365_AFE_APLL2); + + if (apply_i2s_out_change) { + mt8365_afe_set_clk_parent(afe, + afe_priv->clocks[i2s_data->clk_id_out_m_sel], + ((rate % 8000) ? + afe_priv->clocks[MT8365_CLK_AUD1] : + afe_priv->clocks[MT8365_CLK_AUD2])); + + mt8365_afe_set_clk_rate(afe, + afe_priv->clocks[i2s_data->clk_id_out], + rate * i2s_data->clk_out_mult); + + mt8365_dai_set_enable(afe, i2s_data, false, true); + be->prepared[SNDRV_PCM_STREAM_PLAYBACK] = true; + } + + if (apply_i2s_in_change) { + mt8365_afe_set_clk_parent(afe, + afe_priv->clocks[i2s_data->clk_id_in_m_sel], + ((rate % 8000) ? + afe_priv->clocks[MT8365_CLK_AUD1] : + afe_priv->clocks[MT8365_CLK_AUD2])); + + mt8365_afe_set_clk_rate(afe, + afe_priv->clocks[i2s_data->clk_id_in], + rate * i2s_data->clk_in_mult); + + mt8365_dai_set_enable(afe, i2s_data, true, true); + + if ((be->fmt_mode & SND_SOC_DAIFMT_MASTER_MASK) + == SND_SOC_DAIFMT_CBP_CFP) + mt8365_afe_set_2nd_i2s_asrc_enable(afe, true); + + be->prepared[SNDRV_PCM_STREAM_CAPTURE] = true; + } + return 0; +} + +static int mt8365_afe_2nd_i2s_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + unsigned int width_val = params_width(params) > 16 ? + (AFE_CONN_24BIT_O00 | AFE_CONN_24BIT_O01) : 0; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) + regmap_update_bits(afe->regmap, AFE_CONN_24BIT, + AFE_CONN_24BIT_O00 | AFE_CONN_24BIT_O01, width_val); + + return 0; +} + +static int mt8365_afe_2nd_i2s_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_be_dai_data *be = &afe_priv->be_data[dai->id - MT8365_AFE_BACKEND_BASE]; + + be->fmt_mode = 0; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + be->fmt_mode |= SND_SOC_DAIFMT_I2S; + break; + case SND_SOC_DAIFMT_LEFT_J: + be->fmt_mode |= SND_SOC_DAIFMT_LEFT_J; + break; + default: + dev_err(afe->dev, "invalid audio format for 2nd i2s!\n"); + return -EINVAL; + } + + if (((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_NF) && + ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_NB_IF) && + ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_IB_NF) && + ((fmt & SND_SOC_DAIFMT_INV_MASK) != SND_SOC_DAIFMT_IB_IF)) { + dev_err(afe->dev, "invalid audio format for 2nd i2s!\n"); + return -EINVAL; + } + + be->fmt_mode |= (fmt & SND_SOC_DAIFMT_INV_MASK); + + if (((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBP_CFP)) + be->fmt_mode |= (fmt & SND_SOC_DAIFMT_MASTER_MASK); + + return 0; +} + +static const struct snd_soc_dai_ops mt8365_afe_i2s_ops = { + .startup = mt8365_dai_i2s_startup, + .shutdown = mt8365_dai_i2s_shutdown, + .prepare = mt8365_dai_i2s_prepare, +}; + +static const struct snd_soc_dai_ops mt8365_afe_2nd_i2s_ops = { + .startup = mt8365_dai_i2s_startup, + .shutdown = mt8365_dai_i2s_shutdown, + .hw_params = mt8365_afe_2nd_i2s_hw_params, + .prepare = mt8365_dai_i2s_prepare, + .set_fmt = mt8365_afe_2nd_i2s_set_fmt, +}; + +static struct snd_soc_dai_driver mtk_dai_i2s_driver[] = { + { + .name = "I2S", + .id = MT8365_AFE_IO_I2S, + .playback = { + .stream_name = "I2S Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "I2S Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_i2s_ops, + }, { + .name = "2ND I2S", + .id = MT8365_AFE_IO_2ND_I2S, + .playback = { + .stream_name = "2ND I2S Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "2ND I2S Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000_192000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S24_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_afe_2nd_i2s_ops, + } +}; + +static const char * const fmi2sin_text[] = { + "OPEN", "FM_2ND_I2S_IN" +}; + +static SOC_ENUM_SINGLE_VIRT_DECL(fmi2sin_enum, fmi2sin_text); + +static const struct snd_kcontrol_new fmi2sin_mux = + SOC_DAPM_ENUM("FM 2ND I2S Source", fmi2sin_enum); + +static const struct snd_kcontrol_new i2s_o03_o04_enable_ctl = + SOC_DAPM_SINGLE_VIRT("Switch", 1); + +static const struct snd_soc_dapm_widget mtk_dai_i2s_widgets[] = { + SND_SOC_DAPM_SWITCH("I2S O03_O04", SND_SOC_NOPM, 0, 0, + &i2s_o03_o04_enable_ctl), + SND_SOC_DAPM_MUX("FM 2ND I2S Mux", SND_SOC_NOPM, 0, 0, &fmi2sin_mux), + SND_SOC_DAPM_INPUT("2ND I2S In"), +}; + +static const struct snd_soc_dapm_route mtk_dai_i2s_routes[] = { + {"I2S O03_O04", "Switch", "O03"}, + {"I2S O03_O04", "Switch", "O04"}, + {"I2S Playback", NULL, "I2S O03_O04"}, + {"2ND I2S Playback", NULL, "O00"}, + {"2ND I2S Playback", NULL, "O01"}, + {"2ND I2S Capture", NULL, "2ND I2S In"}, + {"FM 2ND I2S Mux", "FM_2ND_I2S_IN", "2ND I2S Capture"}, +}; + +static int mt8365_dai_i2s_set_priv(struct mtk_base_afe *afe) +{ + int i, ret; + + for (i = 0; i < DAI_I2S_NUM; i++) { + ret = mt8365_dai_set_priv(afe, mt8365_i2s_priv[i].id, + sizeof(mt8365_i2s_priv[i]), + &mt8365_i2s_priv[i]); + if (ret) + return ret; + } + return 0; +} + +int mt8365_dai_i2s_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + + list_add(&dai->list, &afe->sub_dais); + + dai->dai_drivers = mtk_dai_i2s_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_i2s_driver); + dai->dapm_widgets = mtk_dai_i2s_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_i2s_widgets); + dai->dapm_routes = mtk_dai_i2s_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_i2s_routes); + + /* set all dai i2s private data */ + return mt8365_dai_i2s_set_priv(afe); +} diff --git a/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c b/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c new file mode 100644 index 000000000000..0ec114a566ad --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-dai-pcm.c @@ -0,0 +1,293 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek 8365 ALSA SoC Audio DAI PCM Control + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#include <linux/bitops.h> +#include <linux/regmap.h> +#include <sound/pcm_params.h> +#include "mt8365-afe-clk.h" +#include "mt8365-afe-common.h" + +struct mt8365_pcm_intf_data { + bool slave_mode; + bool lrck_inv; + bool bck_inv; + unsigned int format; +}; + +/* DAI Drivers */ + +static void mt8365_dai_enable_pcm1(struct mtk_base_afe *afe) +{ + regmap_update_bits(afe->regmap, PCM_INTF_CON1, + PCM_INTF_CON1_EN, PCM_INTF_CON1_EN); +} + +static void mt8365_dai_disable_pcm1(struct mtk_base_afe *afe) +{ + regmap_update_bits(afe->regmap, PCM_INTF_CON1, + PCM_INTF_CON1_EN, 0x0); +} + +static int mt8365_dai_configure_pcm1(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_pcm_intf_data *pcm_priv = afe_priv->dai_priv[MT8365_AFE_IO_PCM1]; + bool slave_mode = pcm_priv->slave_mode; + bool lrck_inv = pcm_priv->lrck_inv; + bool bck_inv = pcm_priv->bck_inv; + unsigned int fmt = pcm_priv->format; + unsigned int bit_width = dai->symmetric_sample_bits; + unsigned int val = 0; + + if (!slave_mode) { + val |= PCM_INTF_CON1_MASTER_MODE | + PCM_INTF_CON1_BYPASS_ASRC; + + if (lrck_inv) + val |= PCM_INTF_CON1_SYNC_OUT_INV; + if (bck_inv) + val |= PCM_INTF_CON1_BCLK_OUT_INV; + } else { + val |= PCM_INTF_CON1_SLAVE_MODE; + + if (lrck_inv) + val |= PCM_INTF_CON1_SYNC_IN_INV; + if (bck_inv) + val |= PCM_INTF_CON1_BCLK_IN_INV; + + /* TODO: add asrc setting */ + } + + val |= FIELD_PREP(PCM_INTF_CON1_FORMAT_MASK, fmt); + + if (fmt == MT8365_PCM_FORMAT_PCMA || + fmt == MT8365_PCM_FORMAT_PCMB) + val |= PCM_INTF_CON1_SYNC_LEN(1); + else + val |= PCM_INTF_CON1_SYNC_LEN(bit_width); + + switch (substream->runtime->rate) { + case 48000: + val |= PCM_INTF_CON1_FS_48K; + break; + case 32000: + val |= PCM_INTF_CON1_FS_32K; + break; + case 16000: + val |= PCM_INTF_CON1_FS_16K; + break; + case 8000: + val |= PCM_INTF_CON1_FS_8K; + break; + default: + return -EINVAL; + } + + if (bit_width > 16) + val |= PCM_INTF_CON1_24BIT | PCM_INTF_CON1_64BCK; + else + val |= PCM_INTF_CON1_16BIT | PCM_INTF_CON1_32BCK; + + val |= PCM_INTF_CON1_EXT_MODEM; + + regmap_update_bits(afe->regmap, PCM_INTF_CON1, + PCM_INTF_CON1_CONFIG_MASK, val); + + return 0; +} + +static int mt8365_dai_pcm1_startup(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + if (snd_soc_dai_active(dai)) + return 0; + + mt8365_afe_enable_main_clk(afe); + + return 0; +} + +static void mt8365_dai_pcm1_shutdown(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + + if (snd_soc_dai_active(dai)) + return; + + mt8365_dai_disable_pcm1(afe); + mt8365_afe_disable_main_clk(afe); +} + +static int mt8365_dai_pcm1_prepare(struct snd_pcm_substream *substream, + struct snd_soc_dai *dai) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + int ret; + + if ((snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_PLAYBACK) + + snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_CAPTURE)) > 1) { + dev_info(afe->dev, "%s '%s' active(%u-%u) already\n", + __func__, snd_pcm_stream_str(substream), + snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_PLAYBACK), + snd_soc_dai_stream_active(dai, SNDRV_PCM_STREAM_CAPTURE)); + return 0; + } + + ret = mt8365_dai_configure_pcm1(substream, dai); + if (ret) + return ret; + + mt8365_dai_enable_pcm1(afe); + + return 0; +} + +static int mt8365_dai_pcm1_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) +{ + struct mtk_base_afe *afe = snd_soc_dai_get_drvdata(dai); + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_pcm_intf_data *pcm_priv = afe_priv->dai_priv[MT8365_AFE_IO_PCM1]; + + switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + pcm_priv->format = MT8365_PCM_FORMAT_I2S; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + pcm_priv->bck_inv = false; + pcm_priv->lrck_inv = false; + break; + case SND_SOC_DAIFMT_NB_IF: + pcm_priv->bck_inv = false; + pcm_priv->lrck_inv = true; + break; + case SND_SOC_DAIFMT_IB_NF: + pcm_priv->bck_inv = true; + pcm_priv->lrck_inv = false; + break; + case SND_SOC_DAIFMT_IB_IF: + pcm_priv->bck_inv = true; + pcm_priv->lrck_inv = true; + break; + default: + return -EINVAL; + } + + switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { + case SND_SOC_DAIFMT_CBP_CFP: + pcm_priv->slave_mode = true; + break; + case SND_SOC_DAIFMT_CBC_CFC: + pcm_priv->slave_mode = false; + break; + default: + return -EINVAL; + } + + return 0; +} + +static const struct snd_soc_dai_ops mt8365_dai_pcm1_ops = { + .startup = mt8365_dai_pcm1_startup, + .shutdown = mt8365_dai_pcm1_shutdown, + .prepare = mt8365_dai_pcm1_prepare, + .set_fmt = mt8365_dai_pcm1_set_fmt, +}; + +static struct snd_soc_dai_driver mtk_dai_pcm_driver[] = { + { + .name = "PCM1", + .id = MT8365_AFE_IO_PCM1, + .playback = { + .stream_name = "PCM1 Playback", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | + SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .capture = { + .stream_name = "PCM1 Capture", + .channels_min = 1, + .channels_max = 2, + .rates = SNDRV_PCM_RATE_8000 | + SNDRV_PCM_RATE_16000 | + SNDRV_PCM_RATE_32000 | + SNDRV_PCM_RATE_48000, + .formats = SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S32_LE, + }, + .ops = &mt8365_dai_pcm1_ops, + .symmetric_rate = 1, + .symmetric_sample_bits = 1, + } +}; + +/* DAI widget */ + +static const struct snd_soc_dapm_widget mtk_dai_pcm_widgets[] = { + SND_SOC_DAPM_OUTPUT("PCM1 Out"), + SND_SOC_DAPM_INPUT("PCM1 In"), +}; + +/* DAI route */ + +static const struct snd_soc_dapm_route mtk_dai_pcm_routes[] = { + {"PCM1 Playback", NULL, "O07"}, + {"PCM1 Playback", NULL, "O08"}, + {"PCM1 Out", NULL, "PCM1 Playback"}, + + {"I09", NULL, "PCM1 Capture"}, + {"I22", NULL, "PCM1 Capture"}, + {"PCM1 Capture", NULL, "PCM1 In"}, +}; + +static int init_pcmif_priv_data(struct mtk_base_afe *afe) +{ + struct mt8365_afe_private *afe_priv = afe->platform_priv; + struct mt8365_pcm_intf_data *pcmif_priv; + + pcmif_priv = devm_kzalloc(afe->dev, sizeof(struct mt8365_pcm_intf_data), + GFP_KERNEL); + if (!pcmif_priv) + return -ENOMEM; + + afe_priv->dai_priv[MT8365_AFE_IO_PCM1] = pcmif_priv; + return 0; +} + +int mt8365_dai_pcm_register(struct mtk_base_afe *afe) +{ + struct mtk_base_afe_dai *dai; + + dai = devm_kzalloc(afe->dev, sizeof(*dai), GFP_KERNEL); + if (!dai) + return -ENOMEM; + + list_add(&dai->list, &afe->sub_dais); + dai->dai_drivers = mtk_dai_pcm_driver; + dai->num_dai_drivers = ARRAY_SIZE(mtk_dai_pcm_driver); + dai->dapm_widgets = mtk_dai_pcm_widgets; + dai->num_dapm_widgets = ARRAY_SIZE(mtk_dai_pcm_widgets); + dai->dapm_routes = mtk_dai_pcm_routes; + dai->num_dapm_routes = ARRAY_SIZE(mtk_dai_pcm_routes); + return init_pcmif_priv_data(afe); +} diff --git a/sound/soc/mediatek/mt8365/mt8365-mt6357.c b/sound/soc/mediatek/mt8365/mt8365-mt6357.c new file mode 100644 index 000000000000..a998fba82bfe --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-mt6357.c @@ -0,0 +1,346 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MediaTek MT8365 Sound Card driver + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Nicolas Belin <nbelin@baylibre.com> + */ + +#include <linux/array_size.h> +#include <linux/dev_printk.h> +#include <linux/err.h> +#include <linux/mod_devicetable.h> +#include <linux/module.h> +#include <linux/pinctrl/consumer.h> +#include <linux/platform_device.h> +#include <linux/types.h> + +#include <sound/soc.h> +#include <sound/pcm_params.h> + +#include "mt8365-afe-common.h" +#include "../common/mtk-soc-card.h" +#include "../common/mtk-soundcard-driver.h" + +enum pinctrl_pin_state { + PIN_STATE_DEFAULT, + PIN_STATE_DMIC, + PIN_STATE_MISO_OFF, + PIN_STATE_MISO_ON, + PIN_STATE_MOSI_OFF, + PIN_STATE_MOSI_ON, + PIN_STATE_MAX +}; + +static const char * const mt8365_mt6357_pin_str[PIN_STATE_MAX] = { + "default", + "dmic", + "miso_off", + "miso_on", + "mosi_off", + "mosi_on", +}; + +struct mt8365_mt6357_priv { + struct pinctrl *pinctrl; + struct pinctrl_state *pin_states[PIN_STATE_MAX]; +}; + +enum { + /* FE */ + DAI_LINK_DL1_PLAYBACK = 0, + DAI_LINK_DL2_PLAYBACK, + DAI_LINK_AWB_CAPTURE, + DAI_LINK_VUL_CAPTURE, + /* BE */ + DAI_LINK_2ND_I2S_INTF, + DAI_LINK_DMIC, + DAI_LINK_INT_ADDA, + DAI_LINK_NUM +}; + +static const struct snd_soc_dapm_widget mt8365_mt6357_widgets[] = { + SND_SOC_DAPM_OUTPUT("HDMI Out"), +}; + +static const struct snd_soc_dapm_route mt8365_mt6357_routes[] = { + {"HDMI Out", NULL, "2ND I2S Playback"}, + {"DMIC In", NULL, "MICBIAS0"}, +}; + +static int mt8365_mt6357_int_adda_startup(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct mt8365_mt6357_priv *priv = snd_soc_card_get_drvdata(rtd->card); + int ret = 0; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (IS_ERR(priv->pin_states[PIN_STATE_MOSI_ON])) + return ret; + + ret = pinctrl_select_state(priv->pinctrl, + priv->pin_states[PIN_STATE_MOSI_ON]); + if (ret) + dev_err(rtd->card->dev, "%s failed to select state %d\n", + __func__, ret); + } + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + if (IS_ERR(priv->pin_states[PIN_STATE_MISO_ON])) + return ret; + + ret = pinctrl_select_state(priv->pinctrl, + priv->pin_states[PIN_STATE_MISO_ON]); + if (ret) + dev_err(rtd->card->dev, "%s failed to select state %d\n", + __func__, ret); + } + + return 0; +} + +static void mt8365_mt6357_int_adda_shutdown(struct snd_pcm_substream *substream) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct mt8365_mt6357_priv *priv = snd_soc_card_get_drvdata(rtd->card); + int ret = 0; + + if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { + if (IS_ERR(priv->pin_states[PIN_STATE_MOSI_OFF])) + return; + + ret = pinctrl_select_state(priv->pinctrl, + priv->pin_states[PIN_STATE_MOSI_OFF]); + if (ret) + dev_err(rtd->card->dev, "%s failed to select state %d\n", + __func__, ret); + } + + if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { + if (IS_ERR(priv->pin_states[PIN_STATE_MISO_OFF])) + return; + + ret = pinctrl_select_state(priv->pinctrl, + priv->pin_states[PIN_STATE_MISO_OFF]); + if (ret) + dev_err(rtd->card->dev, "%s failed to select state %d\n", + __func__, ret); + } +} + +static const struct snd_soc_ops mt8365_mt6357_int_adda_ops = { + .startup = mt8365_mt6357_int_adda_startup, + .shutdown = mt8365_mt6357_int_adda_shutdown, +}; + +SND_SOC_DAILINK_DEFS(playback1, + DAILINK_COMP_ARRAY(COMP_CPU("DL1")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); +SND_SOC_DAILINK_DEFS(playback2, + DAILINK_COMP_ARRAY(COMP_CPU("DL2")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); +SND_SOC_DAILINK_DEFS(awb_capture, + DAILINK_COMP_ARRAY(COMP_CPU("AWB")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); +SND_SOC_DAILINK_DEFS(vul, + DAILINK_COMP_ARRAY(COMP_CPU("VUL")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +SND_SOC_DAILINK_DEFS(i2s3, + DAILINK_COMP_ARRAY(COMP_CPU("2ND I2S")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); +SND_SOC_DAILINK_DEFS(dmic, + DAILINK_COMP_ARRAY(COMP_CPU("DMIC")), + DAILINK_COMP_ARRAY(COMP_DUMMY()), + DAILINK_COMP_ARRAY(COMP_EMPTY())); +SND_SOC_DAILINK_DEFS(primary_codec, + DAILINK_COMP_ARRAY(COMP_CPU("INT ADDA")), + DAILINK_COMP_ARRAY(COMP_CODEC("mt6357-sound", "mt6357-snd-codec-aif1")), + DAILINK_COMP_ARRAY(COMP_EMPTY())); + +/* Digital audio interface glue - connects codec <---> CPU */ +static struct snd_soc_dai_link mt8365_mt6357_dais[] = { + /* Front End DAI links */ + [DAI_LINK_DL1_PLAYBACK] = { + .name = "DL1_FE", + .stream_name = "MultiMedia1_PLayback", + .id = DAI_LINK_DL1_PLAYBACK, + .trigger = { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST + }, + .dynamic = 1, + .playback_only = 1, + .dpcm_merged_rate = 1, + SND_SOC_DAILINK_REG(playback1), + }, + [DAI_LINK_DL2_PLAYBACK] = { + .name = "DL2_FE", + .stream_name = "MultiMedia2_PLayback", + .id = DAI_LINK_DL2_PLAYBACK, + .trigger = { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST + }, + .dynamic = 1, + .playback_only = 1, + .dpcm_merged_rate = 1, + SND_SOC_DAILINK_REG(playback2), + }, + [DAI_LINK_AWB_CAPTURE] = { + .name = "AWB_FE", + .stream_name = "DL1_AWB_Record", + .id = DAI_LINK_AWB_CAPTURE, + .trigger = { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST + }, + .dynamic = 1, + .capture_only = 1, + .dpcm_merged_rate = 1, + SND_SOC_DAILINK_REG(awb_capture), + }, + [DAI_LINK_VUL_CAPTURE] = { + .name = "VUL_FE", + .stream_name = "MultiMedia1_Capture", + .id = DAI_LINK_VUL_CAPTURE, + .trigger = { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST + }, + .dynamic = 1, + .capture_only = 1, + .dpcm_merged_rate = 1, + SND_SOC_DAILINK_REG(vul), + }, + /* Back End DAI links */ + [DAI_LINK_2ND_I2S_INTF] = { + .name = "I2S_OUT_BE", + .no_pcm = 1, + .id = DAI_LINK_2ND_I2S_INTF, + .dai_fmt = SND_SOC_DAIFMT_I2S | + SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBC_CFC, + SND_SOC_DAILINK_REG(i2s3), + }, + [DAI_LINK_DMIC] = { + .name = "DMIC_BE", + .no_pcm = 1, + .id = DAI_LINK_DMIC, + .capture_only = 1, + SND_SOC_DAILINK_REG(dmic), + }, + [DAI_LINK_INT_ADDA] = { + .name = "MTK_Codec", + .no_pcm = 1, + .id = DAI_LINK_INT_ADDA, + .ops = &mt8365_mt6357_int_adda_ops, + SND_SOC_DAILINK_REG(primary_codec), + }, +}; + +static int mt8365_mt6357_gpio_probe(struct snd_soc_card *card) +{ + struct mt8365_mt6357_priv *priv = snd_soc_card_get_drvdata(card); + int ret, i; + + priv->pinctrl = devm_pinctrl_get(card->dev); + if (IS_ERR(priv->pinctrl)) { + ret = PTR_ERR(priv->pinctrl); + return dev_err_probe(card->dev, ret, + "Failed to get pinctrl\n"); + } + + for (i = PIN_STATE_DEFAULT ; i < PIN_STATE_MAX ; i++) { + priv->pin_states[i] = pinctrl_lookup_state(priv->pinctrl, + mt8365_mt6357_pin_str[i]); + if (IS_ERR(priv->pin_states[i])) { + dev_info(card->dev, "No pin state for %s\n", + mt8365_mt6357_pin_str[i]); + } else { + ret = pinctrl_select_state(priv->pinctrl, + priv->pin_states[i]); + if (ret) { + dev_err_probe(card->dev, ret, + "Failed to select pin state %s\n", + mt8365_mt6357_pin_str[i]); + return ret; + } + } + } + return 0; +} + +static struct snd_soc_card mt8365_mt6357_soc_card = { + .name = "mt8365-evk", + .owner = THIS_MODULE, + .dai_link = mt8365_mt6357_dais, + .num_links = ARRAY_SIZE(mt8365_mt6357_dais), + .dapm_widgets = mt8365_mt6357_widgets, + .num_dapm_widgets = ARRAY_SIZE(mt8365_mt6357_widgets), + .dapm_routes = mt8365_mt6357_routes, + .num_dapm_routes = ARRAY_SIZE(mt8365_mt6357_routes), +}; + +static int mt8365_mt6357_dev_probe(struct mtk_soc_card_data *soc_card_data, bool legacy) +{ + struct mtk_platform_card_data *card_data = soc_card_data->card_data; + struct snd_soc_card *card = card_data->card; + struct device *dev = card->dev; + struct mt8365_mt6357_priv *mach_priv; + int ret; + + card->dev = dev; + ret = parse_dai_link_info(card); + if (ret) + goto err; + + mach_priv = devm_kzalloc(dev, sizeof(*mach_priv), + GFP_KERNEL); + if (!mach_priv) + return -ENOMEM; + soc_card_data->mach_priv = mach_priv; + snd_soc_card_set_drvdata(card, soc_card_data); + mt8365_mt6357_gpio_probe(card); + return 0; + +err: + clean_card_reference(card); + return ret; +} + +static const struct mtk_soundcard_pdata mt8365_mt6357_card = { + .card_name = "mt8365-mt6357", + .card_data = &(struct mtk_platform_card_data) { + .card = &mt8365_mt6357_soc_card, + }, + .soc_probe = mt8365_mt6357_dev_probe +}; + +static const struct of_device_id mt8365_mt6357_dt_match[] = { + { .compatible = "mediatek,mt8365-mt6357", .data = &mt8365_mt6357_card }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, mt8365_mt6357_dt_match); + +static struct platform_driver mt8365_mt6357_driver = { + .driver = { + .name = "mt8365_mt6357", + .of_match_table = mt8365_mt6357_dt_match, + .pm = &snd_soc_pm_ops, + }, + .probe = mtk_soundcard_common_probe, +}; + +module_platform_driver(mt8365_mt6357_driver); + +/* Module information */ +MODULE_DESCRIPTION("MT8365 EVK SoC machine driver"); +MODULE_AUTHOR("Nicolas Belin <nbelin@baylibre.com>"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("platform: mt8365_mt6357"); diff --git a/sound/soc/mediatek/mt8365/mt8365-reg.h b/sound/soc/mediatek/mt8365/mt8365-reg.h new file mode 100644 index 000000000000..4ebbb94ff02e --- /dev/null +++ b/sound/soc/mediatek/mt8365/mt8365-reg.h @@ -0,0 +1,993 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * MediaTek 8365 audio driver reg definition + * + * Copyright (c) 2024 MediaTek Inc. + * Authors: Jia Zeng <jia.zeng@mediatek.com> + * Alexandre Mergnat <amergnat@baylibre.com> + */ + +#ifndef _MT8365_REG_H_ +#define _MT8365_REG_H_ + +#include <linux/bitfield.h> + +#define AUDIO_TOP_CON0 (0x0000) +#define AUDIO_TOP_CON1 (0x0004) +#define AUDIO_TOP_CON2 (0x0008) +#define AUDIO_TOP_CON3 (0x000c) + +#define AFE_DAC_CON0 (0x0010) +#define AFE_DAC_CON1 (0x0014) +#define AFE_I2S_CON (0x0018) +#define AFE_CONN0 (0x0020) +#define AFE_CONN1 (0x0024) +#define AFE_CONN2 (0x0028) +#define AFE_CONN3 (0x002c) +#define AFE_CONN4 (0x0030) +#define AFE_I2S_CON1 (0x0034) +#define AFE_I2S_CON2 (0x0038) +#define AFE_MRGIF_CON (0x003c) +#define AFE_DL1_BASE (0x0040) +#define AFE_DL1_CUR (0x0044) +#define AFE_DL1_END (0x0048) +#define AFE_I2S_CON3 (0x004c) +#define AFE_DL2_BASE (0x0050) +#define AFE_DL2_CUR (0x0054) +#define AFE_DL2_END (0x0058) +#define AFE_CONN5 (0x005c) +#define AFE_AWB_BASE (0x0070) +#define AFE_AWB_END (0x0078) +#define AFE_AWB_CUR (0x007c) +#define AFE_VUL_BASE (0x0080) +#define AFE_VUL_END (0x0088) +#define AFE_VUL_CUR (0x008c) +#define AFE_CONN6 (0x00bc) +#define AFE_MEMIF_MSB (0x00cc) +#define AFE_MEMIF_MON0 (0x00d0) +#define AFE_MEMIF_MON1 (0x00d4) +#define AFE_MEMIF_MON2 (0x00d8) +#define AFE_MEMIF_MON3 (0x00dc) +#define AFE_MEMIF_MON4 (0x00e0) +#define AFE_MEMIF_MON5 (0x00e4) +#define AFE_MEMIF_MON6 (0x00e8) +#define AFE_MEMIF_MON7 (0x00ec) +#define AFE_MEMIF_MON8 (0x00f0) +#define AFE_MEMIF_MON9 (0x00f4) +#define AFE_MEMIF_MON10 (0x00f8) +#define AFE_MEMIF_MON11 (0x00fc) +#define AFE_ADDA_DL_SRC2_CON0 (0x0108) +#define AFE_ADDA_DL_SRC2_CON1 (0x010c) +#define AFE_ADDA_UL_SRC_CON0 (0x0114) +#define AFE_ADDA_UL_SRC_CON1 (0x0118) +#define AFE_ADDA_TOP_CON0 (0x0120) +#define AFE_ADDA_UL_DL_CON0 (0x0124) +#define AFE_ADDA_SRC_DEBUG (0x012c) +#define AFE_ADDA_SRC_DEBUG_MON0 (0x0130) +#define AFE_ADDA_SRC_DEBUG_MON1 (0x0134) +#define AFE_ADDA_UL_SRC_MON0 (0x0148) +#define AFE_ADDA_UL_SRC_MON1 (0x014c) +#define AFE_SRAM_BOUND (0x0170) +#define AFE_SECURE_CON (0x0174) +#define AFE_SECURE_CONN0 (0x0178) +#define AFE_SIDETONE_DEBUG (0x01d0) +#define AFE_SIDETONE_MON (0x01d4) +#define AFE_SIDETONE_CON0 (0x01e0) +#define AFE_SIDETONE_COEFF (0x01e4) +#define AFE_SIDETONE_CON1 (0x01e8) +#define AFE_SIDETONE_GAIN (0x01ec) +#define AFE_SGEN_CON0 (0x01f0) +#define AFE_SINEGEN_CON_TDM (0x01f8) +#define AFE_SINEGEN_CON_TDM_IN (0x01fc) +#define AFE_TOP_CON0 (0x0200) +#define AFE_BUS_CFG (0x0240) +#define AFE_BUS_MON0 (0x0244) +#define AFE_ADDA_PREDIS_CON0 (0x0260) +#define AFE_ADDA_PREDIS_CON1 (0x0264) +#define AFE_CONN_MON0 (0x0280) +#define AFE_CONN_MON1 (0x0284) +#define AFE_CONN_MON2 (0x0288) +#define AFE_CONN_MON3 (0x028c) +#define AFE_ADDA_IIR_COEF_02_01 (0x0290) +#define AFE_ADDA_IIR_COEF_04_03 (0x0294) +#define AFE_ADDA_IIR_COEF_06_05 (0x0298) +#define AFE_ADDA_IIR_COEF_08_07 (0x029c) +#define AFE_ADDA_IIR_COEF_10_09 (0x02a0) +#define AFE_VUL_D2_BASE (0x0350) +#define AFE_VUL_D2_END (0x0358) +#define AFE_VUL_D2_CUR (0x035c) +#define AFE_HDMI_OUT_CON0 (0x0370) +#define AFE_HDMI_OUT_BASE (0x0374) +#define AFE_HDMI_OUT_CUR (0x0378) +#define AFE_HDMI_OUT_END (0x037c) +#define AFE_SPDIF_OUT_CON0 (0x0380) +#define AFE_SPDIF_OUT_BASE (0x0384) +#define AFE_SPDIF_OUT_CUR (0x0388) +#define AFE_SPDIF_OUT_END (0x038c) +#define AFE_HDMI_CONN0 (0x0390) +#define AFE_HDMI_CONN1 (0x0398) +#define AFE_CONN_TDMIN_CON (0x039c) +#define AFE_IRQ_MCU_CON (0x03a0) +#define AFE_IRQ_MCU_STATUS (0x03a4) +#define AFE_IRQ_MCU_CLR (0x03a8) +#define AFE_IRQ_MCU_CNT1 (0x03ac) +#define AFE_IRQ_MCU_CNT2 (0x03b0) +#define AFE_IRQ_MCU_EN (0x03b4) +#define AFE_IRQ_MCU_MON2 (0x03b8) +#define AFE_IRQ_MCU_CNT5 (0x03bc) +#define AFE_IRQ1_MCU_CNT_MON (0x03c0) +#define AFE_IRQ2_MCU_CNT_MON (0x03c4) +#define AFE_IRQ1_MCU_EN_CNT_MON (0x03c8) +#define AFE_IRQ5_MCU_CNT_MON (0x03cc) +#define AFE_MEMIF_MINLEN (0x03d0) +#define AFE_MEMIF_MAXLEN (0x03d4) +#define AFE_MEMIF_PBUF_SIZE (0x03d8) +#define AFE_IRQ_MCU_CNT7 (0x03dc) +#define AFE_IRQ7_MCU_CNT_MON (0x03e0) +#define AFE_MEMIF_PBUF2_SIZE (0x03ec) +#define AFE_APLL_TUNER_CFG (0x03f0) +#define AFE_APLL_TUNER_CFG1 (0x03f4) +#define AFE_IRQ_MCU_CON2 (0x03f8) +#define IRQ13_MCU_CNT (0x0408) +#define IRQ13_MCU_CNT_MON (0x040c) +#define AFE_GAIN1_CON0 (0x0410) +#define AFE_GAIN1_CON1 (0x0414) +#define AFE_GAIN1_CON2 (0x0418) +#define AFE_GAIN1_CON3 (0x041c) +#define AFE_GAIN2_CON0 (0x0428) +#define AFE_GAIN2_CON1 (0x042c) +#define AFE_GAIN2_CON2 (0x0430) +#define AFE_GAIN2_CON3 (0x0434) +#define AFE_GAIN2_CUR (0x043c) +#define AFE_CONN11 (0x0448) +#define AFE_CONN12 (0x044c) +#define AFE_CONN13 (0x0450) +#define AFE_CONN14 (0x0454) +#define AFE_CONN15 (0x0458) +#define AFE_CONN16 (0x045c) +#define AFE_CONN7 (0x0460) +#define AFE_CONN8 (0x0464) +#define AFE_CONN9 (0x0468) +#define AFE_CONN10 (0x046c) +#define AFE_CONN21 (0x0470) +#define AFE_CONN22 (0x0474) +#define AFE_CONN23 (0x0478) +#define AFE_CONN24 (0x047c) +#define AFE_IEC_CFG (0x0480) +#define AFE_IEC_NSNUM (0x0484) +#define AFE_IEC_BURST_INFO (0x0488) +#define AFE_IEC_BURST_LEN (0x048c) +#define AFE_IEC_NSADR (0x0490) +#define AFE_CONN_RS (0x0494) +#define AFE_CONN_DI (0x0498) +#define AFE_IEC_CHL_STAT0 (0x04a0) +#define AFE_IEC_CHL_STAT1 (0x04a4) +#define AFE_IEC_CHR_STAT0 (0x04a8) +#define AFE_IEC_CHR_STAT1 (0x04ac) +#define AFE_CONN25 (0x04b0) +#define AFE_CONN26 (0x04b4) +#define FPGA_CFG2 (0x04b8) +#define FPGA_CFG3 (0x04bc) +#define FPGA_CFG0 (0x04c0) +#define FPGA_CFG1 (0x04c4) +#define AFE_SRAM_DELSEL_CON0 (0x04f0) +#define AFE_SRAM_DELSEL_CON1 (0x04f4) +#define AFE_SRAM_DELSEL_CON2 (0x04f8) +#define FPGA_CFG4 (0x04fc) +#define AFE_TDM_GASRC4_ASRC_2CH_CON0 (0x0500) +#define AFE_TDM_GASRC4_ASRC_2CH_CON1 (0x0504) +#define AFE_TDM_GASRC4_ASRC_2CH_CON2 (0x0508) +#define AFE_TDM_GASRC4_ASRC_2CH_CON3 (0x050c) +#define AFE_TDM_GASRC4_ASRC_2CH_CON4 (0x0510) +#define AFE_TDM_GASRC4_ASRC_2CH_CON5 (0x0514) +#define AFE_TDM_GASRC4_ASRC_2CH_CON6 (0x0518) +#define AFE_TDM_GASRC4_ASRC_2CH_CON7 (0x051c) +#define AFE_TDM_GASRC4_ASRC_2CH_CON8 (0x0520) +#define AFE_TDM_GASRC4_ASRC_2CH_CON9 (0x0524) +#define AFE_TDM_GASRC4_ASRC_2CH_CON10 (0x0528) +#define AFE_TDM_GASRC4_ASRC_2CH_CON12 (0x0530) +#define AFE_TDM_GASRC4_ASRC_2CH_CON13 (0x0534) +#define PCM_INTF_CON2 (0x0538) +#define PCM2_INTF_CON (0x053c) +#define AFE_APB_MON (0x0540) +#define AFE_CONN34 (0x0544) +#define AFE_TDM_CON1 (0x0548) +#define AFE_TDM_CON2 (0x054c) +#define PCM_INTF_CON1 (0x0550) +#define AFE_SECURE_MASK_CONN47_1 (0x0554) +#define AFE_SECURE_MASK_CONN48_1 (0x0558) +#define AFE_SECURE_MASK_CONN49_1 (0x055c) +#define AFE_SECURE_MASK_CONN50_1 (0x0560) +#define AFE_SECURE_MASK_CONN51_1 (0x0564) +#define AFE_SECURE_MASK_CONN52_1 (0x0568) +#define AFE_SECURE_MASK_CONN53_1 (0x056c) +#define AFE_SE_SECURE_CON (0x0570) +#define AFE_TDM_IN_CON1 (0x0588) +#define AFE_TDM_IN_CON2 (0x058c) +#define AFE_TDM_IN_MON1 (0x0590) +#define AFE_TDM_IN_MON2 (0x0594) +#define AFE_TDM_IN_MON3 (0x0598) +#define AFE_DMIC0_UL_SRC_CON0 (0x05b4) +#define AFE_DMIC0_UL_SRC_CON1 (0x05b8) +#define AFE_DMIC0_SRC_DEBUG (0x05bc) +#define AFE_DMIC0_SRC_DEBUG_MON0 (0x05c0) +#define AFE_DMIC0_UL_SRC_MON0 (0x05c8) +#define AFE_DMIC0_UL_SRC_MON1 (0x05cc) +#define AFE_DMIC0_IIR_COEF_02_01 (0x05d0) +#define AFE_DMIC0_IIR_COEF_04_03 (0x05d4) +#define AFE_DMIC0_IIR_COEF_06_05 (0x05d8) +#define AFE_DMIC0_IIR_COEF_08_07 (0x05dc) +#define AFE_DMIC0_IIR_COEF_10_09 (0x05e0) +#define AFE_DMIC1_UL_SRC_CON0 (0x0620) +#define AFE_DMIC1_UL_SRC_CON1 (0x0624) +#define AFE_DMIC1_SRC_DEBUG (0x0628) +#define AFE_DMIC1_SRC_DEBUG_MON0 (0x062c) +#define AFE_DMIC1_UL_SRC_MON0 (0x0634) +#define AFE_DMIC1_UL_SRC_MON1 (0x0638) +#define AFE_DMIC1_IIR_COEF_02_01 (0x063c) +#define AFE_DMIC1_IIR_COEF_04_03 (0x0640) +#define AFE_DMIC1_IIR_COEF_06_05 (0x0644) +#define AFE_DMIC1_IIR_COEF_08_07 (0x0648) +#define AFE_DMIC1_IIR_COEF_10_09 (0x064c) +#define AFE_SECURE_MASK_CONN39_1 (0x068c) +#define AFE_SECURE_MASK_CONN40_1 (0x0690) +#define AFE_SECURE_MASK_CONN41_1 (0x0694) +#define AFE_SECURE_MASK_CONN42_1 (0x0698) +#define AFE_SECURE_MASK_CONN43_1 (0x069c) +#define AFE_SECURE_MASK_CONN44_1 (0x06a0) +#define AFE_SECURE_MASK_CONN45_1 (0x06a4) +#define AFE_SECURE_MASK_CONN46_1 (0x06a8) +#define AFE_TDM_GASRC1_ASRC_2CH_CON0 (0x06c0) +#define AFE_TDM_GASRC1_ASRC_2CH_CON1 (0x06c4) +#define AFE_TDM_GASRC1_ASRC_2CH_CON2 (0x06c8) +#define AFE_TDM_GASRC1_ASRC_2CH_CON3 (0x06cc) +#define AFE_TDM_GASRC1_ASRC_2CH_CON4 (0x06d0) +#define AFE_TDM_GASRC1_ASRC_2CH_CON5 (0x06d4) +#define AFE_TDM_GASRC1_ASRC_2CH_CON6 (0x06d8) +#define AFE_TDM_GASRC1_ASRC_2CH_CON7 (0x06dc) +#define AFE_TDM_GASRC1_ASRC_2CH_CON8 (0x06e0) +#define AFE_TDM_GASRC1_ASRC_2CH_CON9 (0x06e4) +#define AFE_TDM_GASRC1_ASRC_2CH_CON10 (0x06e8) +#define AFE_TDM_GASRC1_ASRC_2CH_CON12 (0x06f0) +#define AFE_TDM_GASRC1_ASRC_2CH_CON13 (0x06f4) +#define AFE_TDM_ASRC_CON0 (0x06f8) +#define AFE_TDM_GASRC2_ASRC_2CH_CON0 (0x0700) +#define AFE_TDM_GASRC2_ASRC_2CH_CON1 (0x0704) +#define AFE_TDM_GASRC2_ASRC_2CH_CON2 (0x0708) +#define AFE_TDM_GASRC2_ASRC_2CH_CON3 (0x070c) +#define AFE_TDM_GASRC2_ASRC_2CH_CON4 (0x0710) +#define AFE_TDM_GASRC2_ASRC_2CH_CON5 (0x0714) +#define AFE_TDM_GASRC2_ASRC_2CH_CON6 (0x0718) +#define AFE_TDM_GASRC2_ASRC_2CH_CON7 (0x071c) +#define AFE_TDM_GASRC2_ASRC_2CH_CON8 (0x0720) +#define AFE_TDM_GASRC2_ASRC_2CH_CON9 (0x0724) +#define AFE_TDM_GASRC2_ASRC_2CH_CON10 (0x0728) +#define AFE_TDM_GASRC2_ASRC_2CH_CON12 (0x0730) +#define AFE_TDM_GASRC2_ASRC_2CH_CON13 (0x0734) +#define AFE_TDM_GASRC3_ASRC_2CH_CON0 (0x0740) +#define AFE_TDM_GASRC3_ASRC_2CH_CON1 (0x0744) +#define AFE_TDM_GASRC3_ASRC_2CH_CON2 (0x0748) +#define AFE_TDM_GASRC3_ASRC_2CH_CON3 (0x074c) +#define AFE_TDM_GASRC3_ASRC_2CH_CON4 (0x0750) +#define AFE_TDM_GASRC3_ASRC_2CH_CON5 (0x0754) +#define AFE_TDM_GASRC3_ASRC_2CH_CON6 (0x0758) +#define AFE_TDM_GASRC3_ASRC_2CH_CON7 (0x075c) +#define AFE_TDM_GASRC3_ASRC_2CH_CON8 (0x0760) +#define AFE_TDM_GASRC3_ASRC_2CH_CON9 (0x0764) +#define AFE_TDM_GASRC3_ASRC_2CH_CON10 (0x0768) +#define AFE_TDM_GASRC3_ASRC_2CH_CON12 (0x0770) +#define AFE_TDM_GASRC3_ASRC_2CH_CON13 (0x0774) +#define AFE_DMIC2_UL_SRC_CON0 (0x0780) +#define AFE_DMIC2_UL_SRC_CON1 (0x0784) +#define AFE_DMIC2_SRC_DEBUG (0x0788) +#define AFE_DMIC2_SRC_DEBUG_MON0 (0x078c) +#define AFE_DMIC2_UL_SRC_MON0 (0x0794) +#define AFE_DMIC2_UL_SRC_MON1 (0x0798) +#define AFE_DMIC2_IIR_COEF_02_01 (0x079c) +#define AFE_DMIC2_IIR_COEF_04_03 (0x07a0) +#define AFE_DMIC2_IIR_COEF_06_05 (0x07a4) +#define AFE_DMIC2_IIR_COEF_08_07 (0x07a8) +#define AFE_DMIC2_IIR_COEF_10_09 (0x07ac) +#define AFE_DMIC3_UL_SRC_CON0 (0x07ec) +#define AFE_DMIC3_UL_SRC_CON1 (0x07f0) +#define AFE_DMIC3_SRC_DEBUG (0x07f4) +#define AFE_DMIC3_SRC_DEBUG_MON0 (0x07f8) +#define AFE_DMIC3_UL_SRC_MON0 (0x0800) +#define AFE_DMIC3_UL_SRC_MON1 (0x0804) +#define AFE_DMIC3_IIR_COEF_02_01 (0x0808) +#define AFE_DMIC3_IIR_COEF_04_03 (0x080c) +#define AFE_DMIC3_IIR_COEF_06_05 (0x0810) +#define AFE_DMIC3_IIR_COEF_08_07 (0x0814) +#define AFE_DMIC3_IIR_COEF_10_09 (0x0818) +#define AFE_SECURE_MASK_CONN25_1 (0x0858) +#define AFE_SECURE_MASK_CONN26_1 (0x085c) +#define AFE_SECURE_MASK_CONN27_1 (0x0860) +#define AFE_SECURE_MASK_CONN28_1 (0x0864) +#define AFE_SECURE_MASK_CONN29_1 (0x0868) +#define AFE_SECURE_MASK_CONN30_1 (0x086c) +#define AFE_SECURE_MASK_CONN31_1 (0x0870) +#define AFE_SECURE_MASK_CONN32_1 (0x0874) +#define AFE_SECURE_MASK_CONN33_1 (0x0878) +#define AFE_SECURE_MASK_CONN34_1 (0x087c) +#define AFE_SECURE_MASK_CONN35_1 (0x0880) +#define AFE_SECURE_MASK_CONN36_1 (0x0884) +#define AFE_SECURE_MASK_CONN37_1 (0x0888) +#define AFE_SECURE_MASK_CONN38_1 (0x088c) +#define AFE_IRQ_MCU_SCP_EN (0x0890) +#define AFE_IRQ_MCU_DSP_EN (0x0894) +#define AFE_IRQ3_MCU_CNT_MON (0x0898) +#define AFE_IRQ4_MCU_CNT_MON (0x089c) +#define AFE_IRQ8_MCU_CNT_MON (0x08a0) +#define AFE_IRQ_MCU_CNT3 (0x08a4) +#define AFE_IRQ_MCU_CNT4 (0x08a8) +#define AFE_IRQ_MCU_CNT8 (0x08ac) +#define AFE_IRQ_MCU_CNT11 (0x08b0) +#define AFE_IRQ_MCU_CNT12 (0x08b4) +#define AFE_IRQ11_MCU_CNT_MON (0x08b8) +#define AFE_IRQ12_MCU_CNT_MON (0x08bc) +#define AFE_VUL3_BASE (0x08c0) +#define AFE_VUL3_CUR (0x08c4) +#define AFE_VUL3_END (0x08c8) +#define AFE_VUL3_BASE_MSB (0x08d0) +#define AFE_VUL3_END_MSB (0x08d4) +#define AFE_IRQ10_MCU_CNT_MON (0x08d8) +#define AFE_IRQ_MCU_CNT10 (0x08dc) +#define AFE_IRQ_ACC1_CNT (0x08e0) +#define AFE_IRQ_ACC2_CNT (0x08e4) +#define AFE_IRQ_ACC1_CNT_MON1 (0x08e8) +#define AFE_IRQ_ACC2_CNT_MON (0x08ec) +#define AFE_TSF_CON (0x08f0) +#define AFE_TSF_MON (0x08f4) +#define AFE_IRQ_ACC1_CNT_MON2 (0x08f8) +#define AFE_SPDIFIN_CFG0 (0x0900) +#define AFE_SPDIFIN_CFG1 (0x0904) +#define AFE_SPDIFIN_CHSTS1 (0x0908) +#define AFE_SPDIFIN_CHSTS2 (0x090c) +#define AFE_SPDIFIN_CHSTS3 (0x0910) +#define AFE_SPDIFIN_CHSTS4 (0x0914) +#define AFE_SPDIFIN_CHSTS5 (0x0918) +#define AFE_SPDIFIN_CHSTS6 (0x091c) +#define AFE_SPDIFIN_DEBUG1 (0x0920) +#define AFE_SPDIFIN_DEBUG2 (0x0924) +#define AFE_SPDIFIN_DEBUG3 (0x0928) +#define AFE_SPDIFIN_DEBUG4 (0x092c) +#define AFE_SPDIFIN_EC (0x0930) +#define AFE_SPDIFIN_CKLOCK_CFG (0x0934) +#define AFE_SPDIFIN_BR (0x093c) +#define AFE_SPDIFIN_BR_DBG1 (0x0940) +#define AFE_SPDIFIN_INT_EXT (0x0948) +#define AFE_SPDIFIN_INT_EXT2 (0x094c) +#define SPDIFIN_FREQ_INFO (0x0950) +#define SPDIFIN_FREQ_INFO_2 (0x0954) +#define SPDIFIN_FREQ_INFO_3 (0x0958) +#define SPDIFIN_FREQ_STATUS (0x095c) +#define SPDIFIN_USERCODE1 (0x0960) +#define SPDIFIN_USERCODE2 (0x0964) +#define SPDIFIN_USERCODE3 (0x0968) +#define SPDIFIN_USERCODE4 (0x096c) +#define SPDIFIN_USERCODE5 (0x0970) +#define SPDIFIN_USERCODE6 (0x0974) +#define SPDIFIN_USERCODE7 (0x0978) +#define SPDIFIN_USERCODE8 (0x097c) +#define SPDIFIN_USERCODE9 (0x0980) +#define SPDIFIN_USERCODE10 (0x0984) +#define SPDIFIN_USERCODE11 (0x0988) +#define SPDIFIN_USERCODE12 (0x098c) +#define SPDIFIN_MEMIF_CON0 (0x0990) +#define SPDIFIN_BASE_ADR (0x0994) +#define SPDIFIN_END_ADR (0x0998) +#define SPDIFIN_APLL_TUNER_CFG (0x09a0) +#define SPDIFIN_APLL_TUNER_CFG1 (0x09a4) +#define SPDIFIN_APLL2_TUNER_CFG (0x09a8) +#define SPDIFIN_APLL2_TUNER_CFG1 (0x09ac) +#define SPDIFIN_TYPE_DET (0x09b0) +#define MPHONE_MULTI_CON0 (0x09b4) +#define SPDIFIN_CUR_ADR (0x09b8) +#define AFE_SINEGEN_CON_SPDIFIN (0x09bc) +#define AFE_HDMI_IN_2CH_CON0 (0x09c0) +#define AFE_HDMI_IN_2CH_BASE (0x09c4) +#define AFE_HDMI_IN_2CH_END (0x09c8) +#define AFE_HDMI_IN_2CH_CUR (0x09cc) +#define AFE_MEMIF_BUF_MON0 (0x09d0) +#define AFE_MEMIF_BUF_MON1 (0x09d4) +#define AFE_MEMIF_BUF_MON2 (0x09d8) +#define AFE_MEMIF_BUF_MON3 (0x09dc) +#define AFE_MEMIF_BUF_MON6 (0x09e8) +#define AFE_MEMIF_BUF_MON7 (0x09ec) +#define AFE_MEMIF_BUF_MON8 (0x09f0) +#define AFE_MEMIF_BUF_MON10 (0x09f8) +#define AFE_MEMIF_BUF_MON11 (0x09fc) +#define SYSTOP_STC_CONFIG (0x0a00) +#define AUDIO_STC_STATUS (0x0a04) +#define SYSTOP_W_STC_H (0x0a08) +#define SYSTOP_W_STC_L (0x0a0c) +#define SYSTOP_R_STC_H (0x0a10) +#define SYSTOP_R_STC_L (0x0a14) +#define AUDIO_W_STC_H (0x0a18) +#define AUDIO_W_STC_L (0x0a1c) +#define AUDIO_R_STC_H (0x0a20) +#define AUDIO_R_STC_L (0x0a24) +#define SYSTOP_W_STC2_H (0x0a28) +#define SYSTOP_W_STC2_L (0x0a2c) +#define SYSTOP_R_STC2_H (0x0a30) +#define SYSTOP_R_STC2_L (0x0a34) +#define AUDIO_W_STC2_H (0x0a38) +#define AUDIO_W_STC2_L (0x0a3c) +#define AUDIO_R_STC2_H (0x0a40) +#define AUDIO_R_STC2_L (0x0a44) + +#define AFE_CONN17 (0x0a48) +#define AFE_CONN18 (0x0a4c) +#define AFE_CONN19 (0x0a50) +#define AFE_CONN20 (0x0a54) +#define AFE_CONN27 (0x0a58) +#define AFE_CONN28 (0x0a5c) +#define AFE_CONN29 (0x0a60) +#define AFE_CONN30 (0x0a64) +#define AFE_CONN31 (0x0a68) +#define AFE_CONN32 (0x0a6c) +#define AFE_CONN33 (0x0a70) +#define AFE_CONN35 (0x0a74) +#define AFE_CONN36 (0x0a78) +#define AFE_CONN37 (0x0a7c) +#define AFE_CONN38 (0x0a80) +#define AFE_CONN39 (0x0a84) +#define AFE_CONN40 (0x0a88) +#define AFE_CONN41 (0x0a8c) +#define AFE_CONN42 (0x0a90) +#define AFE_CONN44 (0x0a94) +#define AFE_CONN45 (0x0a98) +#define AFE_CONN46 (0x0a9c) +#define AFE_CONN47 (0x0aa0) +#define AFE_CONN_24BIT (0x0aa4) +#define AFE_CONN0_1 (0x0aa8) +#define AFE_CONN1_1 (0x0aac) +#define AFE_CONN2_1 (0x0ab0) +#define AFE_CONN3_1 (0x0ab4) +#define AFE_CONN4_1 (0x0ab8) +#define AFE_CONN5_1 (0x0abc) +#define AFE_CONN6_1 (0x0ac0) +#define AFE_CONN7_1 (0x0ac4) +#define AFE_CONN8_1 (0x0ac8) +#define AFE_CONN9_1 (0x0acc) +#define AFE_CONN10_1 (0x0ad0) +#define AFE_CONN11_1 (0x0ad4) +#define AFE_CONN12_1 (0x0ad8) +#define AFE_CONN13_1 (0x0adc) +#define AFE_CONN14_1 (0x0ae0) +#define AFE_CONN15_1 (0x0ae4) +#define AFE_CONN16_1 (0x0ae8) +#define AFE_CONN17_1 (0x0aec) +#define AFE_CONN18_1 (0x0af0) +#define AFE_CONN19_1 (0x0af4) +#define AFE_CONN43 (0x0af8) +#define AFE_CONN43_1 (0x0afc) +#define AFE_CONN21_1 (0x0b00) +#define AFE_CONN22_1 (0x0b04) +#define AFE_CONN23_1 (0x0b08) +#define AFE_CONN24_1 (0x0b0c) +#define AFE_CONN25_1 (0x0b10) +#define AFE_CONN26_1 (0x0b14) +#define AFE_CONN27_1 (0x0b18) +#define AFE_CONN28_1 (0x0b1c) +#define AFE_CONN29_1 (0x0b20) +#define AFE_CONN30_1 (0x0b24) +#define AFE_CONN31_1 (0x0b28) +#define AFE_CONN32_1 (0x0b2c) +#define AFE_CONN33_1 (0x0b30) +#define AFE_CONN34_1 (0x0b34) +#define AFE_CONN35_1 (0x0b38) +#define AFE_CONN36_1 (0x0b3c) +#define AFE_CONN37_1 (0x0b40) +#define AFE_CONN38_1 (0x0b44) +#define AFE_CONN39_1 (0x0b48) +#define AFE_CONN40_1 (0x0b4c) +#define AFE_CONN41_1 (0x0b50) +#define AFE_CONN42_1 (0x0b54) +#define AFE_CONN44_1 (0x0b58) +#define AFE_CONN45_1 (0x0b5c) +#define AFE_CONN46_1 (0x0b60) +#define AFE_CONN47_1 (0x0b64) +#define AFE_CONN_RS_1 (0x0b68) +#define AFE_CONN_DI_1 (0x0b6c) +#define AFE_CONN_24BIT_1 (0x0b70) +#define AFE_GAIN1_CUR (0x0b78) +#define AFE_CONN20_1 (0x0b7c) +#define AFE_DL1_BASE_MSB (0x0b80) +#define AFE_DL1_END_MSB (0x0b84) +#define AFE_DL2_BASE_MSB (0x0b88) +#define AFE_DL2_END_MSB (0x0b8c) +#define AFE_AWB_BASE_MSB (0x0b90) +#define AFE_AWB_END_MSB (0x0b94) +#define AFE_VUL_BASE_MSB (0x0ba0) +#define AFE_VUL_END_MSB (0x0ba4) +#define AFE_VUL_D2_BASE_MSB (0x0ba8) +#define AFE_VUL_D2_END_MSB (0x0bac) +#define AFE_HDMI_OUT_BASE_MSB (0x0bb8) +#define AFE_HDMI_OUT_END_MSB (0x0bbc) +#define AFE_HDMI_IN_2CH_BASE_MSB (0x0bc0) +#define AFE_HDMI_IN_2CH_END_MSB (0x0bc4) +#define AFE_SPDIF_OUT_BASE_MSB (0x0bc8) +#define AFE_SPDIF_OUT_END_MSB (0x0bcc) +#define SPDIFIN_BASE_MSB (0x0bd0) +#define SPDIFIN_END_MSB (0x0bd4) +#define AFE_DL1_CUR_MSB (0x0bd8) +#define AFE_DL2_CUR_MSB (0x0bdc) +#define AFE_AWB_CUR_MSB (0x0be8) +#define AFE_VUL_CUR_MSB (0x0bf8) +#define AFE_VUL_D2_CUR_MSB (0x0c04) +#define AFE_HDMI_OUT_CUR_MSB (0x0c0c) +#define AFE_HDMI_IN_2CH_CUR_MSB (0x0c10) +#define AFE_SPDIF_OUT_CUR_MSB (0x0c14) +#define SPDIFIN_CUR_MSB (0x0c18) +#define AFE_CONN_REG (0x0c20) +#define AFE_SECURE_MASK_CONN14_1 (0x0c24) +#define AFE_SECURE_MASK_CONN15_1 (0x0c28) +#define AFE_SECURE_MASK_CONN16_1 (0x0c2c) +#define AFE_SECURE_MASK_CONN17_1 (0x0c30) +#define AFE_SECURE_MASK_CONN18_1 (0x0c34) +#define AFE_SECURE_MASK_CONN19_1 (0x0c38) +#define AFE_SECURE_MASK_CONN20_1 (0x0c3c) +#define AFE_SECURE_MASK_CONN21_1 (0x0c40) +#define AFE_SECURE_MASK_CONN22_1 (0x0c44) +#define AFE_SECURE_MASK_CONN23_1 (0x0c48) +#define AFE_SECURE_MASK_CONN24_1 (0x0c4c) +#define AFE_ADDA_DL_SDM_DCCOMP_CON (0x0c50) +#define AFE_ADDA_DL_SDM_TEST (0x0c54) +#define AFE_ADDA_DL_DC_COMP_CFG0 (0x0c58) +#define AFE_ADDA_DL_DC_COMP_CFG1 (0x0c5c) +#define AFE_ADDA_DL_SDM_FIFO_MON (0x0c60) +#define AFE_ADDA_DL_SRC_LCH_MON (0x0c64) +#define AFE_ADDA_DL_SRC_RCH_MON (0x0c68) +#define AFE_ADDA_DL_SDM_OUT_MON (0x0c6c) +#define AFE_ADDA_DL_SDM_DITHER_CON (0x0c70) + +#define AFE_VUL3_CUR_MSB (0x0c78) +#define AFE_ASRC_2CH_CON0 (0x0c80) +#define AFE_ASRC_2CH_CON1 (0x0c84) +#define AFE_ASRC_2CH_CON2 (0x0c88) +#define AFE_ASRC_2CH_CON3 (0x0c8c) +#define AFE_ASRC_2CH_CON4 (0x0c90) +#define AFE_ASRC_2CH_CON5 (0x0c94) +#define AFE_ASRC_2CH_CON6 (0x0c98) +#define AFE_ASRC_2CH_CON7 (0x0c9c) +#define AFE_ASRC_2CH_CON8 (0x0ca0) +#define AFE_ASRC_2CH_CON9 (0x0ca4) +#define AFE_ASRC_2CH_CON10 (0x0ca8) +#define AFE_ASRC_2CH_CON12 (0x0cb0) +#define AFE_ASRC_2CH_CON13 (0x0cb4) + +#define AFE_PCM_TX_ASRC_2CH_CON0 (0x0cc0) +#define AFE_PCM_TX_ASRC_2CH_CON1 (0x0cc4) +#define AFE_PCM_TX_ASRC_2CH_CON2 (0x0cc8) +#define AFE_PCM_TX_ASRC_2CH_CON3 (0x0ccc) +#define AFE_PCM_TX_ASRC_2CH_CON4 (0x0cd0) +#define AFE_PCM_TX_ASRC_2CH_CON5 (0x0cd4) +#define AFE_PCM_TX_ASRC_2CH_CON6 (0x0cd8) +#define AFE_PCM_TX_ASRC_2CH_CON7 (0x0cdc) +#define AFE_PCM_TX_ASRC_2CH_CON8 (0x0ce0) +#define AFE_PCM_TX_ASRC_2CH_CON9 (0x0ce4) +#define AFE_PCM_TX_ASRC_2CH_CON10 (0x0ce8) +#define AFE_PCM_TX_ASRC_2CH_CON12 (0x0cf0) +#define AFE_PCM_TX_ASRC_2CH_CON13 (0x0cf4) +#define AFE_PCM_RX_ASRC_2CH_CON0 (0x0d00) +#define AFE_PCM_RX_ASRC_2CH_CON1 (0x0d04) +#define AFE_PCM_RX_ASRC_2CH_CON2 (0x0d08) +#define AFE_PCM_RX_ASRC_2CH_CON3 (0x0d0c) +#define AFE_PCM_RX_ASRC_2CH_CON4 (0x0d10) +#define AFE_PCM_RX_ASRC_2CH_CON5 (0x0d14) +#define AFE_PCM_RX_ASRC_2CH_CON6 (0x0d18) +#define AFE_PCM_RX_ASRC_2CH_CON7 (0x0d1c) +#define AFE_PCM_RX_ASRC_2CH_CON8 (0x0d20) +#define AFE_PCM_RX_ASRC_2CH_CON9 (0x0d24) +#define AFE_PCM_RX_ASRC_2CH_CON10 (0x0d28) +#define AFE_PCM_RX_ASRC_2CH_CON12 (0x0d30) +#define AFE_PCM_RX_ASRC_2CH_CON13 (0x0d34) + +#define AFE_ADDA_PREDIS_CON2 (0x0d40) +#define AFE_ADDA_PREDIS_CON3 (0x0d44) +#define AFE_SECURE_MASK_CONN4_1 (0x0d48) +#define AFE_SECURE_MASK_CONN5_1 (0x0d4c) +#define AFE_SECURE_MASK_CONN6_1 (0x0d50) +#define AFE_SECURE_MASK_CONN7_1 (0x0d54) +#define AFE_SECURE_MASK_CONN8_1 (0x0d58) +#define AFE_SECURE_MASK_CONN9_1 (0x0d5c) +#define AFE_SECURE_MASK_CONN10_1 (0x0d60) +#define AFE_SECURE_MASK_CONN11_1 (0x0d64) +#define AFE_SECURE_MASK_CONN12_1 (0x0d68) +#define AFE_SECURE_MASK_CONN13_1 (0x0d6c) +#define AFE_MEMIF_MON12 (0x0d70) +#define AFE_MEMIF_MON13 (0x0d74) +#define AFE_MEMIF_MON14 (0x0d78) +#define AFE_MEMIF_MON15 (0x0d7c) +#define AFE_SECURE_MASK_CONN42 (0x0dbc) +#define AFE_SECURE_MASK_CONN43 (0x0dc0) +#define AFE_SECURE_MASK_CONN44 (0x0dc4) +#define AFE_SECURE_MASK_CONN45 (0x0dc8) +#define AFE_SECURE_MASK_CONN46 (0x0dcc) +#define AFE_HD_ENGEN_ENABLE (0x0dd0) +#define AFE_SECURE_MASK_CONN47 (0x0dd4) +#define AFE_SECURE_MASK_CONN48 (0x0dd8) +#define AFE_SECURE_MASK_CONN49 (0x0ddc) +#define AFE_SECURE_MASK_CONN50 (0x0de0) +#define AFE_SECURE_MASK_CONN51 (0x0de4) +#define AFE_SECURE_MASK_CONN52 (0x0de8) +#define AFE_SECURE_MASK_CONN53 (0x0dec) +#define AFE_SECURE_MASK_CONN0_1 (0x0df0) +#define AFE_SECURE_MASK_CONN1_1 (0x0df4) +#define AFE_SECURE_MASK_CONN2_1 (0x0df8) +#define AFE_SECURE_MASK_CONN3_1 (0x0dfc) + +#define AFE_ADDA_MTKAIF_CFG0 (0x0e00) +#define AFE_ADDA_MTKAIF_SYNCWORD_CFG (0x0e14) +#define AFE_ADDA_MTKAIF_RX_CFG0 (0x0e20) +#define AFE_ADDA_MTKAIF_RX_CFG1 (0x0e24) +#define AFE_ADDA_MTKAIF_RX_CFG2 (0x0e28) +#define AFE_ADDA_MTKAIF_MON0 (0x0e34) +#define AFE_ADDA_MTKAIF_MON1 (0x0e38) +#define AFE_AUD_PAD_TOP (0x0e40) + +#define AFE_CM1_CON4 (0x0e48) +#define AFE_CM2_CON4 (0x0e4c) +#define AFE_CM1_CON0 (0x0e50) +#define AFE_CM1_CON1 (0x0e54) +#define AFE_CM1_CON2 (0x0e58) +#define AFE_CM1_CON3 (0x0e5c) +#define AFE_CM2_CON0 (0x0e60) +#define AFE_CM2_CON1 (0x0e64) +#define AFE_CM2_CON2 (0x0e68) +#define AFE_CM2_CON3 (0x0e6c) +#define AFE_CM2_CONN0 (0x0e70) +#define AFE_CM2_CONN1 (0x0e74) +#define AFE_CM2_CONN2 (0x0e78) + +#define AFE_GENERAL1_ASRC_2CH_CON0 (0x0e80) +#define AFE_GENERAL1_ASRC_2CH_CON1 (0x0e84) +#define AFE_GENERAL1_ASRC_2CH_CON2 (0x0e88) +#define AFE_GENERAL1_ASRC_2CH_CON3 (0x0e8c) +#define AFE_GENERAL1_ASRC_2CH_CON4 (0x0e90) +#define AFE_GENERAL1_ASRC_2CH_CON5 (0x0e94) +#define AFE_GENERAL1_ASRC_2CH_CON6 (0x0e98) +#define AFE_GENERAL1_ASRC_2CH_CON7 (0x0e9c) +#define AFE_GENERAL1_ASRC_2CH_CON8 (0x0ea0) +#define AFE_GENERAL1_ASRC_2CH_CON9 (0x0ea4) +#define AFE_GENERAL1_ASRC_2CH_CON10 (0x0ea8) +#define AFE_GENERAL1_ASRC_2CH_CON12 (0x0eb0) +#define AFE_GENERAL1_ASRC_2CH_CON13 (0x0eb4) +#define GENERAL_ASRC_MODE (0x0eb8) +#define GENERAL_ASRC_EN_ON (0x0ebc) + +#define AFE_CONN48 (0x0ec0) +#define AFE_CONN49 (0x0ec4) +#define AFE_CONN50 (0x0ec8) +#define AFE_CONN51 (0x0ecc) +#define AFE_CONN52 (0x0ed0) +#define AFE_CONN53 (0x0ed4) +#define AFE_CONN48_1 (0x0ee0) +#define AFE_CONN49_1 (0x0ee4) +#define AFE_CONN50_1 (0x0ee8) +#define AFE_CONN51_1 (0x0eec) +#define AFE_CONN52_1 (0x0ef0) +#define AFE_CONN53_1 (0x0ef4) + +#define AFE_GENERAL2_ASRC_2CH_CON0 (0x0f00) +#define AFE_GENERAL2_ASRC_2CH_CON1 (0x0f04) +#define AFE_GENERAL2_ASRC_2CH_CON2 (0x0f08) +#define AFE_GENERAL2_ASRC_2CH_CON3 (0x0f0c) +#define AFE_GENERAL2_ASRC_2CH_CON4 (0x0f10) +#define AFE_GENERAL2_ASRC_2CH_CON5 (0x0f14) +#define AFE_GENERAL2_ASRC_2CH_CON6 (0x0f18) +#define AFE_GENERAL2_ASRC_2CH_CON7 (0x0f1c) +#define AFE_GENERAL2_ASRC_2CH_CON8 (0x0f20) +#define AFE_GENERAL2_ASRC_2CH_CON9 (0x0f24) +#define AFE_GENERAL2_ASRC_2CH_CON10 (0x0f28) +#define AFE_GENERAL2_ASRC_2CH_CON12 (0x0f30) +#define AFE_GENERAL2_ASRC_2CH_CON13 (0x0f34) + +#define AFE_SECURE_MASK_CONN28 (0x0f48) +#define AFE_SECURE_MASK_CONN29 (0x0f4c) +#define AFE_SECURE_MASK_CONN30 (0x0f50) +#define AFE_SECURE_MASK_CONN31 (0x0f54) +#define AFE_SECURE_MASK_CONN32 (0x0f58) +#define AFE_SECURE_MASK_CONN33 (0x0f5c) +#define AFE_SECURE_MASK_CONN34 (0x0f60) +#define AFE_SECURE_MASK_CONN35 (0x0f64) +#define AFE_SECURE_MASK_CONN36 (0x0f68) +#define AFE_SECURE_MASK_CONN37 (0x0f6c) +#define AFE_SECURE_MASK_CONN38 (0x0f70) +#define AFE_SECURE_MASK_CONN39 (0x0f74) +#define AFE_SECURE_MASK_CONN40 (0x0f78) +#define AFE_SECURE_MASK_CONN41 (0x0f7c) +#define AFE_SIDEBAND0 (0x0f80) +#define AFE_SIDEBAND1 (0x0f84) +#define AFE_SECURE_SIDEBAND0 (0x0f88) +#define AFE_SECURE_SIDEBAND1 (0x0f8c) +#define AFE_SECURE_MASK_CONN0 (0x0f90) +#define AFE_SECURE_MASK_CONN1 (0x0f94) +#define AFE_SECURE_MASK_CONN2 (0x0f98) +#define AFE_SECURE_MASK_CONN3 (0x0f9c) +#define AFE_SECURE_MASK_CONN4 (0x0fa0) +#define AFE_SECURE_MASK_CONN5 (0x0fa4) +#define AFE_SECURE_MASK_CONN6 (0x0fa8) +#define AFE_SECURE_MASK_CONN7 (0x0fac) +#define AFE_SECURE_MASK_CONN8 (0x0fb0) +#define AFE_SECURE_MASK_CONN9 (0x0fb4) +#define AFE_SECURE_MASK_CONN10 (0x0fb8) +#define AFE_SECURE_MASK_CONN11 (0x0fbc) +#define AFE_SECURE_MASK_CONN12 (0x0fc0) +#define AFE_SECURE_MASK_CONN13 (0x0fc4) +#define AFE_SECURE_MASK_CONN14 (0x0fc8) +#define AFE_SECURE_MASK_CONN15 (0x0fcc) +#define AFE_SECURE_MASK_CONN16 (0x0fd0) +#define AFE_SECURE_MASK_CONN17 (0x0fd4) +#define AFE_SECURE_MASK_CONN18 (0x0fd8) +#define AFE_SECURE_MASK_CONN19 (0x0fdc) +#define AFE_SECURE_MASK_CONN20 (0x0fe0) +#define AFE_SECURE_MASK_CONN21 (0x0fe4) +#define AFE_SECURE_MASK_CONN22 (0x0fe8) +#define AFE_SECURE_MASK_CONN23 (0x0fec) +#define AFE_SECURE_MASK_CONN24 (0x0ff0) +#define AFE_SECURE_MASK_CONN25 (0x0ff4) +#define AFE_SECURE_MASK_CONN26 (0x0ff8) +#define AFE_SECURE_MASK_CONN27 (0x0ffc) + +#define MAX_REGISTER AFE_SECURE_MASK_CONN27 + +#define AFE_IRQ_STATUS_BITS 0x3ff + +/* AUDIO_TOP_CON0 (0x0000) */ +#define AUD_TCON0_PDN_TML (1U << 27) +#define AUD_TCON0_PDN_DAC_PREDIS (1U << 26) +#define AUD_TCON0_PDN_DAC (1U << 25) +#define AUD_TCON0_PDN_ADC (1U << 24) +#define AUD_TCON0_PDN_TDM_IN (1U << 23) +#define AUD_TCON0_PDN_TDM_OUT (1U << 22) +#define AUD_TCON0_PDN_SPDIF (1U << 21) +#define AUD_TCON0_PDN_APLL_TUNER (1U << 19) +#define AUD_TCON0_PDN_APLL2_TUNER (1U << 18) +#define AUD_TCON0_PDN_INTDIR (1U << 15) +#define AUD_TCON0_PDN_24M (1U << 9) +#define AUD_TCON0_PDN_22M (1U << 8) +#define AUD_TCON0_PDN_I2S_IN (1U << 6) +#define AUD_TCON0_PDN_AFE (1U << 2) + +/* AUDIO_TOP_CON1 (0x0004) */ +#define AUD_TCON1_PDN_TDM_ASRC (1U << 15) +#define AUD_TCON1_PDN_GENERAL2_ASRC (1U << 14) +#define AUD_TCON1_PDN_GENERAL1_ASRC (1U << 13) +#define AUD_TCON1_PDN_CONNSYS_I2S_ASRC (1U << 12) +#define AUD_TCON1_PDN_DMIC3_ADC (1U << 11) +#define AUD_TCON1_PDN_DMIC2_ADC (1U << 10) +#define AUD_TCON1_PDN_DMIC1_ADC (1U << 9) +#define AUD_TCON1_PDN_DMIC0_ADC (1U << 8) +#define AUD_TCON1_PDN_I2S4_BCLK (1U << 7) +#define AUD_TCON1_PDN_I2S3_BCLK (1U << 6) +#define AUD_TCON1_PDN_I2S2_BCLK (1U << 5) +#define AUD_TCON1_PDN_I2S1_BCLK (1U << 4) + +/* AUDIO_TOP_CON3 (0x000C) */ +#define AUD_TCON3_HDMI_BCK_INV (1U << 3) + +/* AFE_I2S_CON (0x0018) */ +#define AFE_I2S_CON_PHASE_SHIFT_FIX (1U << 31) +#define AFE_I2S_CON_FROM_IO_MUX (1U << 28) +#define AFE_I2S_CON_LOW_JITTER_CLK (1U << 12) +#define AFE_I2S_CON_RATE_MASK GENMASK(11, 8) +#define AFE_I2S_CON_FORMAT_I2S (1U << 3) +#define AFE_I2S_CON_SRC_SLAVE (1U << 2) + +/* AFE_ASRC_2CH_CON0 */ +#define ONE_HEART (1U << 31) +#define CHSET_STR_CLR (1U << 4) +#define COEFF_SRAM_CTRL (1U << 1) +#define ASM_ON (1U << 0) + +/* CON2 */ +#define O16BIT (1U << 19) +#define CLR_IIR_HISTORY (1U << 17) +#define IS_MONO (1U << 16) +#define IIR_EN (1U << 11) +#define IIR_STAGE_MASK GENMASK(10, 8) + +/* CON5 */ +#define CALI_CYCLE_MASK GENMASK(31, 16) +#define CALI_64_CYCLE FIELD_PREP(CALI_CYCLE_MASK, 0x3F) +#define CALI_96_CYCLE FIELD_PREP(CALI_CYCLE_MASK, 0x5F) +#define CALI_441_CYCLE FIELD_PREP(CALI_CYCLE_MASK, 0x1B8) + +#define CALI_AUTORST (1U << 15) +#define AUTO_TUNE_FREQ5 (1U << 12) +#define COMP_FREQ_RES (1U << 11) + +#define CALI_SEL_MASK GENMASK(9, 8) +#define CALI_SEL_00 FIELD_PREP(CALI_SEL_MASK, 0) +#define CALI_SEL_01 FIELD_PREP(CALI_SEL_MASK, 1) + +#define CALI_BP_DGL (1U << 7) /* Bypass the deglitch circuit */ +#define AUTO_TUNE_FREQ4 (1U << 3) +#define CALI_AUTO_RESTART (1U << 2) +#define CALI_USE_FREQ_OUT (1U << 1) +#define CALI_ON (1U << 0) + +#define AFE_I2S_CON_WLEN_32BIT (1U << 1) +#define AFE_I2S_CON_EN (1U << 0) + +#define AFE_CONN3_I03_O03_S (1U << 3) +#define AFE_CONN4_I04_O04_S (1U << 4) +#define AFE_CONN4_I03_O04_S (1U << 3) + +/* AFE_I2S_CON1 (0x0034) */ +#define AFE_I2S_CON1_I2S2_TO_PAD (1U << 18) +#define AFE_I2S_CON1_TDMOUT_TO_PAD (0 << 18) +#define AFE_I2S_CON1_RATE GENMASK(11, 8) +#define AFE_I2S_CON1_FORMAT_I2S (1U << 3) +#define AFE_I2S_CON1_WLEN_32BIT (1U << 1) +#define AFE_I2S_CON1_EN (1U << 0) + +/* AFE_I2S_CON2 (0x0038) */ +#define AFE_I2S_CON2_LOW_JITTER_CLK (1U << 12) +#define AFE_I2S_CON2_RATE GENMASK(11, 8) +#define AFE_I2S_CON2_FORMAT_I2S (1U << 3) +#define AFE_I2S_CON2_WLEN_32BIT (1U << 1) +#define AFE_I2S_CON2_EN (1U << 0) + +/* AFE_I2S_CON3 (0x004C) */ +#define AFE_I2S_CON3_LOW_JITTER_CLK (1U << 12) +#define AFE_I2S_CON3_RATE GENMASK(11, 8) +#define AFE_I2S_CON3_FORMAT_I2S (1U << 3) +#define AFE_I2S_CON3_WLEN_32BIT (1U << 1) +#define AFE_I2S_CON3_EN (1U << 0) + +/* AFE_ADDA_DL_SRC2_CON0 (0x0108) */ +#define AFE_ADDA_DL_SAMPLING_RATE GENMASK(31, 28) +#define AFE_ADDA_DL_8X_UPSAMPLE GENMASK(25, 24) +#define AFE_ADDA_DL_MUTE_OFF_CH1 (1U << 12) +#define AFE_ADDA_DL_MUTE_OFF_CH2 (1U << 11) +#define AFE_ADDA_DL_VOICE_DATA (1U << 5) +#define AFE_ADDA_DL_DEGRADE_GAIN (1U << 1) + +/* AFE_ADDA_UL_SRC_CON0 (0x0114) */ +#define AFE_ADDA_UL_SAMPLING_RATE GENMASK(19, 17) + +/* AFE_ADDA_UL_DL_CON0 */ +#define AFE_ADDA_UL_DL_ADDA_AFE_ON (1U << 0) +#define AFE_ADDA_UL_DL_DMIC_CLKDIV_ON (1U << 1) + +/* AFE_APLL_TUNER_CFG (0x03f0) */ +#define AFE_APLL_TUNER_CFG_MASK GENMASK(15, 1) +#define AFE_APLL_TUNER_CFG_EN_MASK (1U << 0) + +/* AFE_APLL_TUNER_CFG1 (0x03f4) */ +#define AFE_APLL_TUNER_CFG1_MASK GENMASK(15, 1) +#define AFE_APLL_TUNER_CFG1_EN_MASK (1U << 0) + +/* PCM_INTF_CON1 (0x0550) */ +#define PCM_INTF_CON1_EXT_MODEM (1U << 17) +#define PCM_INTF_CON1_16BIT (0 << 16) +#define PCM_INTF_CON1_24BIT (1U << 16) +#define PCM_INTF_CON1_32BCK (0 << 14) +#define PCM_INTF_CON1_64BCK (1U << 14) +#define PCM_INTF_CON1_MASTER_MODE (0 << 5) +#define PCM_INTF_CON1_SLAVE_MODE (1U << 5) +#define PCM_INTF_CON1_FS_MASK GENMASK(4, 3) +#define PCM_INTF_CON1_FS_8K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 0) +#define PCM_INTF_CON1_FS_16K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 1) +#define PCM_INTF_CON1_FS_32K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 2) +#define PCM_INTF_CON1_FS_48K FIELD_PREP(PCM_INTF_CON1_FS_MASK, 3) +#define PCM_INTF_CON1_SYNC_LEN_MASK GENMASK(13, 9) +#define PCM_INTF_CON1_SYNC_LEN(x) FIELD_PREP(PCM_INTF_CON1_SYNC_LEN_MASK, ((x) - 1)) +#define PCM_INTF_CON1_FORMAT_MASK GENMASK(2, 1) +#define PCM_INTF_CON1_SYNC_OUT_INV (1U << 23) +#define PCM_INTF_CON1_BCLK_OUT_INV (1U << 22) +#define PCM_INTF_CON1_SYNC_IN_INV (1U << 21) +#define PCM_INTF_CON1_BCLK_IN_INV (1U << 20) +#define PCM_INTF_CON1_BYPASS_ASRC (1U << 6) +#define PCM_INTF_CON1_EN (1U << 0) +#define PCM_INTF_CON1_CONFIG_MASK (0xf3fffe) + +/* AFE_DMIC0_UL_SRC_CON0 (0x05b4) + * AFE_DMIC1_UL_SRC_CON0 (0x0620) + * AFE_DMIC2_UL_SRC_CON0 (0x0780) + * AFE_DMIC3_UL_SRC_CON0 (0x07ec) + */ +#define DMIC_TOP_CON_CK_PHASE_SEL_CH1 GENMASK(29, 27) +#define DMIC_TOP_CON_CK_PHASE_SEL_CH2 GENMASK(26, 24) +#define DMIC_TOP_CON_TWO_WIRE_MODE (1U << 23) +#define DMIC_TOP_CON_CH2_ON (1U << 22) +#define DMIC_TOP_CON_CH1_ON (1U << 21) +#define DMIC_TOP_CON_VOICE_MODE_MASK GENMASK(19, 17) +#define DMIC_TOP_CON_VOICE_MODE_8K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 0) +#define DMIC_TOP_CON_VOICE_MODE_16K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 1) +#define DMIC_TOP_CON_VOICE_MODE_32K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 2) +#define DMIC_TOP_CON_VOICE_MODE_48K FIELD_PREP(DMIC_TOP_CON_VOICE_MODE_MASK, 3) +#define DMIC_TOP_CON_LOW_POWER_MODE_MASK GENMASK(15, 14) +#define DMIC_TOP_CON_LOW_POWER_MODE(x) FIELD_PREP(DMIC_TOP_CON_LOW_POWER_MODE_MASK, (x)) +#define DMIC_TOP_CON_IIR_ON (1U << 10) +#define DMIC_TOP_CON_IIR_MODE GENMASK(9, 7) +#define DMIC_TOP_CON_INPUT_MODE (1U << 5) +#define DMIC_TOP_CON_SDM3_LEVEL_MODE (1U << 1) +#define DMIC_TOP_CON_SRC_ON (1U << 0) +#define DMIC_TOP_CON_SDM3_DE_SELECT (0 << 1) +#define DMIC_TOP_CON_CONFIG_MASK (0x3f8ed7a6) + +/* AFE_CONN_24BIT (0x0AA4) */ +#define AFE_CONN_24BIT_O10 (1U << 10) +#define AFE_CONN_24BIT_O09 (1U << 9) +#define AFE_CONN_24BIT_O06 (1U << 6) +#define AFE_CONN_24BIT_O05 (1U << 5) +#define AFE_CONN_24BIT_O04 (1U << 4) +#define AFE_CONN_24BIT_O03 (1U << 3) +#define AFE_CONN_24BIT_O02 (1U << 2) +#define AFE_CONN_24BIT_O01 (1U << 1) +#define AFE_CONN_24BIT_O00 (1U << 0) + +/* AFE_HD_ENGEN_ENABLE */ +#define AFE_22M_PLL_EN (1U << 0) +#define AFE_24M_PLL_EN (1U << 1) + +/* AFE_GAIN1_CON0 (0x0410) */ +#define AFE_GAIN1_CON0_EN_MASK GENMASK(0, 0) +#define AFE_GAIN1_CON0_MODE_MASK GENMASK(7, 4) +#define AFE_GAIN1_CON0_SAMPLE_PER_STEP_MASK GENMASK(15, 8) + +/* AFE_GAIN1_CON1 (0x0414) */ +#define AFE_GAIN1_CON1_MASK GENMASK(19, 0) + +/* AFE_GAIN1_CUR (0x0B78) */ +#define AFE_GAIN1_CUR_MASK GENMASK(19, 0) + +/* AFE_CM1_CON0 (0x0e50) */ +/* AFE_CM2_CON0 (0x0e60) */ +#define CM_AFE_CM_CH_NUM_MASK GENMASK(3, 0) +#define CM_AFE_CM_CH_NUM(x) FIELD_PREP(CM_AFE_CM_CH_NUM_MASK, ((x) - 1)) +#define CM_AFE_CM_ON (1U << 4) +#define CM_AFE_CM_START_DATA_MASK GENMASK(11, 8) + +#define CM_AFE_CM1_VUL_SEL (1U << 12) +#define CM_AFE_CM1_IN_MODE_MASK GENMASK(19, 16) +#define CM_AFE_CM2_TDM_SEL (1U << 12) +#define CM_AFE_CM2_CLK_SEL (1U << 13) +#define CM_AFE_CM2_GASRC1_OUT_SEL (1U << 17) +#define CM_AFE_CM2_GASRC2_OUT_SEL (1U << 16) + +/* AFE_CM2_CONN* */ +#define CM2_AFE_CM2_CONN_CFG1(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG1_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG1_MASK GENMASK(4, 0) +#define CM2_AFE_CM2_CONN_CFG2(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG2_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG2_MASK GENMASK(9, 5) +#define CM2_AFE_CM2_CONN_CFG3(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG3_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG3_MASK GENMASK(14, 10) +#define CM2_AFE_CM2_CONN_CFG4(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG4_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG4_MASK GENMASK(19, 15) +#define CM2_AFE_CM2_CONN_CFG5(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG5_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG5_MASK GENMASK(24, 20) +#define CM2_AFE_CM2_CONN_CFG6(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG6_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG6_MASK GENMASK(29, 25) +#define CM2_AFE_CM2_CONN_CFG7(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG7_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG7_MASK GENMASK(4, 0) +#define CM2_AFE_CM2_CONN_CFG8(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG8_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG8_MASK GENMASK(9, 5) +#define CM2_AFE_CM2_CONN_CFG9(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG9_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG9_MASK GENMASK(14, 10) +#define CM2_AFE_CM2_CONN_CFG10(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG10_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG10_MASK GENMASK(19, 15) +#define CM2_AFE_CM2_CONN_CFG11(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG11_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG11_MASK GENMASK(24, 20) +#define CM2_AFE_CM2_CONN_CFG12(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG12_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG12_MASK GENMASK(29, 25) +#define CM2_AFE_CM2_CONN_CFG13(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG13_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG13_MASK GENMASK(4, 0) +#define CM2_AFE_CM2_CONN_CFG14(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG14_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG14_MASK GENMASK(9, 5) +#define CM2_AFE_CM2_CONN_CFG15(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG15_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG15_MASK GENMASK(14, 10) +#define CM2_AFE_CM2_CONN_CFG16(x) FIELD_PREP(CM2_AFE_CM2_CONN_CFG16_MASK, (x)) +#define CM2_AFE_CM2_CONN_CFG16_MASK GENMASK(19, 15) + +/* AFE_CM1_CON* */ +#define CM_AFE_CM_UPDATE_CNT1_MASK GENMASK(15, 0) +#define CM_AFE_CM_UPDATE_CNT1(x) FIELD_PREP(CM_AFE_CM_UPDATE_CNT1_MASK, (x)) +#define CM_AFE_CM_UPDATE_CNT2_MASK GENMASK(31, 16) +#define CM_AFE_CM_UPDATE_CNT2(x) FIELD_PREP(CM_AFE_CM_UPDATE_CNT2_MASK, (x)) + +#endif |