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4 daysMerge tag 'clk-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This is the usual collection of primarily clk driver updates. The big part of the diff is all the new Qualcomm clk drivers added for a few SoCs they're working on. The other two vendors with significant work this cycle are Renesas and Amlogic. Renesas adds a bunch of clks to existing drivers and supports some new SoCs while Amlogic is starting a significant refactoring to simplify their code. The core framework gained a pair of helpers to get the 'struct device' or 'struct device_node' associated with a 'struct clk_hw'. Some associated KUnit tests were added for these simple helpers as well. Beyond that core change there are lots of little fixes throughout the clk drivers for the stuff we see every day, wrong clk driver data that affects tree topology or supported frequencies, etc. They're not found until the clks are actually used by some consumer device driver. New Drivers: - Global, display, gpu, video, camera, tcsr, and rpmh clock controller for the Qualcomm Milos SoC - Camera, display, GPU, and video clock controllers for Qualcomm QCS615 - Video clock controller driver for Qualcomm SM6350 - Camera clock controller driver for Qualcomm SC8180X - I3C clocks and resets on Renesas RZ/G3E - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/V2H(P) and RZ/V2N - SPI (RSPI) clocks and resets on Renesas RZ/V2H(P) - SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H - Ethernet clocks and resets on Renesas RZ/G3E - Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs - Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N - Timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on Renesas RZ/V2N Updates: - Support atomic PWMs in the PWM clk driver - clk_hw_get_dev() and clk_hw_get_of_node() helpers - Replace round_rate() with determine_rate() in various clk drivers - Convert clk DT bindings to DT schema format for DT validation - Various clk driver cleanups and refactorings from static analysis tools and possibly real humans - A lot of little fixes here and there to things like clk tree topology, missing frequencies, flagging clks as critical, etc" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (216 commits) clk: clocking-wizard: Fix the round rate handling for versal clk: Fix typos clk: spacemit: ccu_pll: fix error return value in recalc_rate callback clk: tegra: periph: Make tegra_clk_periph_ops static clk: tegra: periph: Fix error handling and resolve unsigned compare warning clk: imx: scu: convert from round_rate() to determine_rate() clk: imx: pllv4: convert from round_rate() to determine_rate() clk: imx: pllv3: convert from round_rate() to determine_rate() clk: imx: pllv2: convert from round_rate() to determine_rate() clk: imx: pll14xx: convert from round_rate() to determine_rate() clk: imx: pfd: convert from round_rate() to determine_rate() clk: imx: frac-pll: convert from round_rate() to determine_rate() clk: imx: fracn-gppll: convert from round_rate() to determine_rate() clk: imx: fixup-div: convert from round_rate() to determine_rate() clk: imx: cpu: convert from round_rate() to determine_rate() clk: imx: busy: convert from round_rate() to determine_rate() clk: imx: composite-93: remove round_rate() in favor of determine_rate() clk: imx: composite-8m: remove round_rate() in favor of determine_rate() clk: qcom: Remove redundant pm_runtime_mark_last_busy() calls clk: imx: Remove redundant pm_runtime_mark_last_busy() calls ...
6 daysMerge tag 'char-misc-6.17-rc1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char / misc / IIO / other driver updates from Greg KH: "Here is the big set of char/misc/iio and other smaller driver subsystems for 6.17-rc1. It's a big set this time around, with the huge majority being in the iio subsystem with new drivers and dts files being added there. Highlights include: - IIO driver updates, additions, and changes making more code const and cleaning up some init logic - bus_type constant conversion changes - misc device test functions added - rust miscdevice minor fixup - unused function removals for some drivers - mei driver updates - mhi driver updates - interconnect driver updates - Android binder updates and test infrastructure added - small cdx driver updates - small comedi fixes - small nvmem driver updates - small pps driver updates - some acrn virt driver fixes for printk messages - other small driver updates All of these have been in linux-next with no reported issues" * tag 'char-misc-6.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (292 commits) binder: Use seq_buf in binder_alloc kunit tests binder: Add copyright notice to new kunit files misc: ti_fpc202: Switch to of_fwnode_handle() bus: moxtet: Use dev_fwnode() pc104: move PC104 option to drivers/Kconfig drivers: virt: acrn: Don't use %pK through printk comedi: fix race between polling and detaching interconnect: qcom: Add Milos interconnect provider driver dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm Milos SoC mei: more prints with client prefix mei: bus: use cldev in prints bus: mhi: host: pci_generic: Add Telit FN990B40 modem support bus: mhi: host: Detect events pointing to unexpected TREs bus: mhi: host: pci_generic: Add Foxconn T99W696 modem bus: mhi: host: Use str_true_false() helper bus: mhi: host: pci_generic: Add support for EM929x and set MRU to 32768 for better performance. bus: mhi: host: Fix endianness of BHI vector table bus: mhi: host: pci_generic: Disable runtime PM for QDU100 bus: mhi: host: pci_generic: Fix the modem name of Foxconn T99W640 dt-bindings: interconnect: qcom,msm8998-bwmon: Allow 'nonposted-mmio' ...
2025-07-16iio: adc: ad_sigma_delta: Select IIO_BUFFER_DMAENGINE and SPI_OFFLOADNathan Chancellor
CONFIG_AD_SIGMA_DELTA uses several symbols that it does not explicitly select. If no other enabled driver selects them, the build fails with either a linker failure if the driver is built in or a modpost failure if the driver is a module. ld.lld: error: undefined symbol: devm_spi_offload_rx_stream_request_dma_chan ld.lld: error: undefined symbol: devm_iio_dmaengine_buffer_setup_with_handle ld.lld: error: undefined symbol: devm_spi_offload_trigger_get ld.lld: error: undefined symbol: devm_spi_offload_get ld.lld: error: undefined symbol: spi_offload_trigger_enable ld.lld: error: undefined symbol: spi_offload_trigger_disable Select the necessary Kconfig symbols to include these functions in the build to clear up the errors. Fixes: 219da3ea842a ("iio: adc: ad_sigma_delta: add SPI offload support") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250714-iio-ad_sigma_delta-fix-kconfig-selects-v1-1-32e0d6da0423@kernel.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-16iio: adc: ad7173: fix setting ODR in probeDavid Lechner
Fix the setting of the ODR register value in the probe function for AD7177. The AD7177 chip has a different ODR value after reset than the other chips (0x7 vs. 0x0) and 0 is a reserved value on that chip. The driver already has this information available in odr_start_value and uses it when checking valid values when writing to the sampling_frequency attribute, but failed to set the correct initial value in the probe function. Fixes: 37ae8381ccda ("iio: adc: ad7173: add support for additional models") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250710-iio-adc-ad7173-fix-setting-odr-in-probe-v1-1-78a100fec998@baylibre.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-16iio: adc: ad7173: fix calibration channelDavid Lechner
Fix the channel index values passed to ad_sd_calibrate() in ad7173_calibrate_all(). ad7173_calibrate_all() expects these values to be that of the CHANNELx register assigned to the channel, not the datasheet INPUTx number of the channel. The incorrect values were causing register writes to fail for some channels because they set the WEN bit that must always be 0 for register access and set the R/W bit to read instead of write. For other channels, the channel number was just wrong because the CHANNELx registers are generally assigned in reverse order and so almost never match the INPUTx numbers. Fixes: 031bdc8aee01 ("iio: adc: ad7173: add calibration support") Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250708-iio-adc-ad7313-fix-calibration-channel-v1-1-e6174e2c7cbf@baylibre.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-16iio: adc: ad7173: fix num_slotsDavid Lechner
Fix the num_slots value for most chips in the ad7173 driver. The correct value is the number of CHANNELx registers on the chip. In commit 4310e15b3140 ("iio: adc: ad7173: don't make copy of ad_sigma_delta_info struct"), we refactored struct ad_sigma_delta_info to be static const data instead of being dynamically populated during driver probe. However, there was an existing bug in commit 76a1e6a42802 ("iio: adc: ad7173: add AD7173 driver") where num_slots was incorrectly set to the number of CONFIGx registers instead of the number of CHANNELx registers. This bug was partially propagated to the refactored code in that the 16-channel chips were only given 8 slots instead of 16 although we did managed to fix the 8-channel chips and one of the 4-channel chips in that commit. However, we botched two of the 4-channel chips and ended up incorrectly giving them 8 slots during the refactoring. This patch fixes that mistake on the 4-channel chips and also corrects the 16-channel chips to have 16 slots. Fixes: 4310e15b3140 ("iio: adc: ad7173: don't make copy of ad_sigma_delta_info struct") Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250706-iio-adc-ad7173-fix-num_slots-on-most-chips-v3-1-d1f5453198a7@baylibre.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-16iio: adc: ad7173: fix channels index for syscalib_modeDavid Lechner
Fix the index used to look up the channel when accessing the syscalib_mode attribute. The address field is a 0-based index (same as scan_index) that it used to access the channel in the ad7173_channels array throughout the driver. The channels field, on the other hand, may not match the address field depending on the channel configuration specified in the device tree and could result in an out-of-bounds access. Fixes: 031bdc8aee01 ("iio: adc: ad7173: add calibration support") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250703-iio-adc-ad7173-fix-channels-index-for-syscalib_mode-v1-1-7fdaedb9cac0@baylibre.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-16iio: adc: ad_sigma_delta: change to buffer predisableDavid Lechner
Change the buffer disable callback from postdisable to predisable. This balances the existing posteanble callback. Using postdisable with posteanble can be problematic, for example, if update_scan_mode fails, it would call postdisable without ever having called posteanble, so the drivers using this would be in an unexpected state when postdisable was called. Fixes: af3008485ea0 ("iio:adc: Add common code for ADI Sigma Delta devices") Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250703-iio-adc-ad_sigma_delta-buffer-predisable-v1-1-f2ab85138f1f@baylibre.com Cc: <stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add support for weigh scale, thermocouple, and RTD sensMarcelo Schmitt
The AD4170-4 design provides features to aid interfacing with weigh scales, thermocouples, and RTD sensors, which are set up with additional circuitry for proper sensor operation. A key characteristic of those sensors is that the circuit they are in must be excited with a single, a pair, or two pairs of signals. The external circuit can be excited either by a voltage supply or by AD4170-4 excitation signals. The sensor can then be read through a different pair of lines that are connected to the AD4170-4 ADC. Extend the ad4170-4 driver to handle external circuit sensors. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/52686943040ecad34cc89833d4d5d37f1a51f412.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add support for internal temperature sensorMarcelo Schmitt
The AD4170-4 has an internal temperature sensor that can be read using the ADC. Whenever possible, configure an IIO channel to provide the chip's temperature. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/71ac994060cf79a6c49f39b0c7d04c6c9cbbab00.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add GPIO controller supportMarcelo Schmitt
The AD4170-4 has four multifunctional pins that can be used as GPIOs. The GPIO functionality can be accessed when the AD4170-4 chip is not busy performing continuous data capture or handling any other register read/write request. Also, the AD4170-4 does not provide any interrupt based on GPIO pin states so AD4170-4 GPIOs can't be used as interrupt sources. Implement gpio_chip callbacks to make AD4170-4 GPIO pins controllable through the gpiochip interface. Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/e031189d4b7e20cf02dd13220ab1ddf4798760c2.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add clock provider supportMarcelo Schmitt
The AD4170-4 chip can use an externally supplied clock at the XTAL2 pin, or an external crystal connected to the XTAL1 and XTAL2 pins. Alternatively, the AD4170-4 can provide its 16 MHz internal clock at the XTAL2 pin. In addition, the chip has a programmable clock divider that allows dividing the external or internal clock frequency, however, control for that is not provided in this patch. Extend the AD4170-4 driver so it effectively uses the provided external clock, if any, or supplies its own clock as a clock provider. Reviewed-by: Nuno Sá <nuno.sa@analog.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/68697c7613b1a69d752e541caef28d08b3e59bc1.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add timestamp channelMarcelo Schmitt
Add timestamp channel allowing to record the moment at which ADC samples are captured in buffered read mode. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/e0af7e5424898bee0f3edfbb017133624efc169d.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add support for buffered data captureMarcelo Schmitt
Extend the AD4170-4 driver to allow buffered data capture in continuous read mode. In continuous read mode, the chip skips the instruction phase and outputs just ADC sample data, enabling faster sample rates to be reached. The internal channel sequencer always starts sampling from channel 0 and channel 0 must be enabled if more than one channel is selected for data capture. The scan mask validation callback checks if the aforementioned condition is met. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/10ed544d31aa86eb40f93ea947f151d3d9827952.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add digital filter and sample frequency config supportMarcelo Schmitt
Add support for sinc3, sinc5, and averaged sinc5 digital filters along with sample frequency configuration. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/31f4226b4172b0bbb26daa054b74b25b1966c7b2.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add support for calibration biasMarcelo Schmitt
Add support for ADC calibration bias/offset configuration. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/f240fce693d62ec8d587885074bf540e01919b31.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: ad4170-4: Add support for calibration gainMarcelo Schmitt
Add support for ADC calibration gain configuration. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/ea8d07cad9b7b6106f0b5664c403ed080b362a6b.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-14iio: adc: Add basic support for AD4170-4Ana-Maria Cusco
The AD4170-4 is a multichannel, low noise, 24-bit precision sigma-delta analog to digital converter. The AD4170-4 design offers a flexible data acquisition solution with crosspoint multiplexed analog inputs, configurable ADC voltage reference inputs, ultra-low noise integrated PGA, digital filtering, wide range of configurable output data rates, internal oscillator and temperature sensor, four GPIOs, and integrated features for interfacing with load cell weigh scales, RTD, and thermocouple sensors. Add basic support for the AD4170-4 ADC with the following features: - Single-shot read. - Analog front end PGA configuration. - Differential and pseudo-differential input configuration. Signed-off-by: Ana-Maria Cusco <ana-maria.cusco@analog.com> Co-developed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/ce3fd150bd63a2aed6eb6fe59aad6d60c0f9fb67.1751895245.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: mt6359: Add support for MediaTek MT6373 PMIC AUXADCAngeloGioacchino Del Regno
MediaTek MT6373 is a PMIC found on MT8196/MT6991 board designs and communicates with the SoC over SPMI. This PMIC integrates an Auxiliary ADC (AUXADC) which has a grand total of 54 channels, of which usually only 9 are used as this is usually paired with MT6363 on the same board. For the Auxiliary ADC part, this reuses the same register layout as the MT6363 PMIC, but exposes only a subset of the ADC chans. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250703141146.171431-7-angelogioacchino.delregno@collabora.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: mt6359: Add support for MediaTek MT6363 PMIC AUXADCAngeloGioacchino Del Regno
MediaTek MT6363 is a PMIC found on MT8196/MT6991 board designs and communicates with the SoC over SPMI. This PMIC integrates an Auxiliary ADC (AUXADC) which has a grand total of 54 ADC channels: 49 PMIC-internal channels, 2 external NTC thermistor channels and 2 generic ADC channels (mapped to 7 PMIC ADC external inputs). To use a generic ADC channel it is necessary to enable one of the PMIC ADC inputs at a time and only then start the reading, so in this case it is possible to read only one external input for each generic ADC channel. Due to the lack of documentation, this implementation supports using only one generic ADC channel, hence supports reading only one external input at a time. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250703141146.171431-6-angelogioacchino.delregno@collabora.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: mt6359: Move reference voltage to platform dataAngeloGioacchino Del Regno
In preparation to add support for new PMICs, add a `vref_mv` member to struct mtk_pmic_auxadc_info and use it in place of the AUXADC_VOLT_FULL definition. As a consequence, the definition was also removed. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250703141146.171431-5-angelogioacchino.delregno@collabora.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: mt6359: Add ready register index and mask to channel dataAngeloGioacchino Del Regno
In preparation for adding support for the AUXADC block found in the MT6363 PMIC, add the ready register index and mask to the mtk_pmic_auxadc_chan structure, populate those in the channel description for all of the already supported SoCs and make use of them in the .read_imp() callbacks. Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250703141146.171431-4-angelogioacchino.delregno@collabora.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad4000: don't use shift_right()David Lechner
Drop use of shift_right() macro for unsigned value. The shift_right() macro is intended for signed values and is not needed for unsigned values. This was found by a static analysis tool [1]. Link: https://github.com/analogdevicesinc/linux/pull/2831/files#diff-c14a34a6492576d22e7192cc0f61ad0083190aeb627191596fe12462f0c6f21aR557 [1] Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250702-iio-adc-ad4000-don-t-use-shift_right-v1-1-041c2d6c3950@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: add SPI offload supportDavid Lechner
Add SPI offload support to the ad_sigma_delta module. When the SPI controller has SPI offload capabilities, the module will now use that for buffered reads instead of the RDY interrupt trigger. Drivers that use the ad_sigma_delta module will have to opt into this by setting supports_spi_offload since each driver will likely need additional changes before SPI offload can be used. This will allow us to gradually enable SPI offload support for each driver. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-11-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: use spi_optimize_message()David Lechner
Use spi_optimize_message() to improve the performance of buffered reads. By setting up the SPI message and pre-optimizing it in the buffer postenable callback, we can reduce overhead during each sample read. A rough estimate shows that this reduced the CPU usage of the interrupt handler thread from 22% to 16% using an EVAL-AD4112ARDZ board on a DE10-Nano (measuring a single channel at the default 6.2 kHz sample rate). Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-8-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: refactor setting read addressDavid Lechner
Refactor code to set the read address in a separate function. This code is already duplicated twice and we will need to use it a third time in a later commit. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-7-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: audit included headersDavid Lechner
Drop linux/iio/sysfs.h since it is unused and replace linux/kernel.h with more explicit headers. There are a couple of other headers added weren't covered by kernel.h, like linux/gpio/consumer.h that are added since the module makes use of those APIs as well. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-6-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: use BITS_TO_BYTES() macroDavid Lechner
Use the BITS_TO_BYTES() macro instead of dividing by 8 to convert bits to bytes. This makes it more obvious what unit conversion is taking place. In one instance, we also avoid the temporary assignment to a variable as it was confusing that reg_size was being used with two different units (bits and bytes). scan_type is factored out to reduce line wrapping. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-5-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: use sizeof() in ALIGN()David Lechner
Use sizeof() instead of hardcoding the size of the timestamp in the ALIGN() macro. This makes it a bit more obvious what the intention of the code is. Suggested-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-4-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: use u8 instead of uint8_tDavid Lechner
Replace uint8_t with u8 in the ad_sigma_delta driver. Technically, uint8_t comes from the C standard library, while u8 is a Linux kernel type. Since we don't use the C standard library in the kernel, we should use the kernel types instead. There is also one instance where int64_t is replaced with s64. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-3-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: sort includesDavid Lechner
Sort includes in alphabetical order and fix grouping before we add more. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-2-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad_sigma_delta: don't overallocate scan bufferDavid Lechner
Fix overallocating the size of the scan buffer by converting bits to bytes. The size is meant to be in bytes, so scanbits needs to be divided by 8. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250701-iio-adc-ad7173-add-spi-offload-support-v3-1-42abb83e3dac@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad7768-1: add low pass -3dB cutoff attributeJonathan Santos
Ad7768-1 has a different -3db frequency multiplier depending on the filter type configured. The cutoff frequency also varies according to the current ODR. Add a readonly low pass -3dB frequency cutoff attribute to clarify to the user which bandwidth is being allowed depending on the filter configurations. Reviewed-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Jonathan Santos <Jonathan.Santos@analog.com> Link: https://patch.msgid.link/804d66f1858014d7278aec3344d81c223661e878.1749569957.git.Jonathan.Santos@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-13iio: adc: ad7124: Use separate structures rather than array for chip infoDavid Lechner
Change the ad7124 driver to use individual chip info structures instead of an array. This reduces the verbosity of the code. Also, the data is now const as it should have been in the first place. Signed-off-by: David Lechner <dlechner@baylibre.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/20250628-iio-const-data-5-v1-1-9e56c2f77979@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: stm32-adc: make stm32_adc_trig_info constDavid Lechner
Add const qualifier to struct stm32_adc_trig_info. This is read-only data so it can be made const. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250628-iio-const-data-10-v1-1-0ba93ac792c8@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: qcom-vadc: make scale_adc5_fn constDavid Lechner
Add const qualifier to struct qcom_adc5_scale_type scale_adc5_fn[]. This is read-only data so it can be made const. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250628-iio-const-data-9-v1-1-188ca6e904ee@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: mp2629_adc: make mp2629_channels constDavid Lechner
Add const qualifier to struct iio_chan_spec mp2629_channels[]. This is read-only data so it can be made const. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250628-iio-const-data-8-v1-1-32ce79494d4a@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: axp20x_adc: make axp717_maps constDavid Lechner
Add const qualifier to struct iio_map axp717_maps[]. This is read-only data so it can be made const. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250628-iio-const-data-7-v1-1-10008d0a4c2f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: at91_adc: make at91_adc_caps constDavid Lechner
Add const qualifier to struct at91_adc_caps at91sam*_caps. This is read-only data so it can be made const. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250628-iio-const-data-6-v1-1-fbb1ca5edc8d@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: ad7091r8: make ad7091r_init_info constDavid Lechner
Add const qualifier to struct ad7091r_init_info ad7091r*_init_info. This is read-only data so it can be made const. Signed-off-by: David Lechner <dlechner@baylibre.com> Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Link: https://patch.msgid.link/20250628-iio-const-data-4-v1-1-4e0f93c9cf83@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: ad7091r5: make ad7091r5_init_info constDavid Lechner
Add const qualifier to struct ad7091r_init_info ad7091r5_init_info. This is read-only data so it can be made const. Signed-off-by: David Lechner <dlechner@baylibre.com> Acked-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Link: https://patch.msgid.link/20250628-iio-const-data-3-v1-1-13d3f0af5f3f@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: ad7380: remove unused oversampling_ratio getterDavid Lechner
Remove a call to ad7380_get_osr() in ad7380_init_offload_msg. The returned value is never used. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250624-iio-adc-ad7380-remove-unused-oversampling_ratio-getter-v1-1-26cbee356860@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: ad4851: add spi 3-wire supportAntoniu Miclaus
Add support for 3-wire configuration within the driver. By default 4-wire configuration is used. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Link: https://patch.msgid.link/20250626104024.8645-2-antoniu.miclaus@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-07-06iio: adc: ad7173: simplify clock enable/disableDavid Lechner
Use devm_clk_get_enabled() instead of devm_clk_get(), clk_prepare_enable(), devm_add_action_or_reset() to simplify the code as it effectively does the same thing. We can also drop ext_clk from struct ad7173_state since it is not used anywhere else. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250620-iio-adc-ad7173-simplify-clock-enable-disable-v1-1-8bc693b190ec@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-30include: linux: move adi-axi-common.h out of fpgaNuno Sá
The adi-axi-common.h header has some common defines used in various ADI IPs. However they are not specific for any fpga manager so it's questionable for the header to live under include/linux/fpga. Hence let's just move one directory up and update all users. Suggested-by: Xu Yilun <yilun.xu@linux.intel.com> Acked-by: Xu Yilun <yilun.xu@intel.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # for IIO Signed-off-by: Nuno Sá <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20250519-dev-axi-clkgen-limits-v6-3-bc4b3b61d1d4@analog.com Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-06-29iio: adc: ad7380: fix adi,gain-milli property parsingDavid Lechner
Change the data type of the "adi,gain-milli" property from u32 to u16. The devicetree binding specifies it as uint16, so we need to read it as such to avoid an -EOVERFLOW error when parsing the property. Fixes: c904e6dcf402 ("iio: adc: ad7380: add support for adaq4370-4 and adaq4380-4") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250619-iio-adc-ad7380-fix-adi-gain-milli-parsing-v1-1-4c27fb426860@baylibre.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-29iio: adc: ad7949: use spi_is_bpw_supported()David Lechner
Use spi_is_bpw_supported() instead of directly accessing spi->controller ->bits_per_word_mask. bits_per_word_mask may be 0, which implies that 8-bits-per-word is supported. spi_is_bpw_supported() takes this into account while spi_ctrl_mask == SPI_BPW_MASK(8) does not. Fixes: 0b2a740b424e ("iio: adc: ad7949: enable use with non 14/16-bit controllers") Closes: https://lore.kernel.org/linux-spi/c8b8a963-6cef-4c9b-bfef-dab2b7bd0b0f@sirena.org.uk/ Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Andy Shevchenko <andy@kernel.org> Link: https://patch.msgid.link/20250611-iio-adc-ad7949-use-spi_is_bpw_supported-v1-1-c4e15bfd326e@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-29iio: adc: axp20x_adc: Add missing sentinel to AXP717 ADC channel mapsChen-Yu Tsai
The AXP717 ADC channel maps is missing a sentinel entry at the end. This causes a KASAN warning. Add the missing sentinel entry. Fixes: 5ba0cb92584b ("iio: adc: axp20x_adc: add support for AXP717 ADC") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://patch.msgid.link/20250607135627.2086850-1-wens@kernel.org Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-29iio: adc: adi-axi-adc: fix ad7606_bus_reg_read()David Lechner
Mask the value read before returning it. The value read over the parallel bus via the AXI ADC IP block contains both the address and the data, but callers expect val to only contain the data. axi_adc_raw_write() takes a u32 parameter, so addr was the wrong type. This wasn't causing any issues but is corrected anyway since we are touching the same line to add a new variable. Cc: stable@vger.kernel.org Fixes: 79c47485e438 ("iio: adc: adi-axi-adc: add support for AD7606 register writing") Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250530-iio-adc-adi-axi-adc-fix-ad7606_bus_reg_read-v2-1-ad2dfc0694ce@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-06-26iio: adc: ti-tsc2046: use = { } instead of memset()David Lechner
Use { } instead of memset() to zero-initialize stack memory to simplify the code. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Nuno Sá <nuno.sa@analog.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://patch.msgid.link/20250611-iio-zero-init-stack-with-instead-of-memset-v1-11-ebb2d0a24302@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>