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path: root/drivers/net/wireless/realtek/rtw89/pci.c
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2023-08-25Fix nomenclature for USB and PCI wireless devicesAlan Stern
A mouse that uses a USB connection is called a "USB mouse" device (or "USB mouse" for short), not a "mouse USB" device. By analogy, a WiFi adapter that connects to the host computer via USB is a "USB wireless" device, not a "wireless USB" device. (The latter term more properly refers to a defunct Wireless USB specification, which described a technology for sending USB protocol messages over an ultra wideband radio link.) Similarly for a WiFi adapter card that plugs into a PCIe slot: It is a "PCIe wireless" device, not a "wireless PCIe" device. Rephrase the text in the kernel source where the word ordering is wrong. Signed-off-by: Alan Stern <stern@rowland.harvard.edu> Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/57da7c80-0e48-41b5-8427-884a02648f55@rowland.harvard.edu
2023-05-25wifi: rtw89: add chip_ops::query_rxdesc() and rxd_len as helpers to support ↵Ping-Ke Shih
newer chips The next generation chips use different RX descriptor format, so add a chip_ops to hook suitable handlers. Also, the length of RX descriptor is different, so add a variable to store the length according to chip and descriptor content dynamically. Then, the code can be more general. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230522122513.13559-2-pkshih@realtek.com
2023-05-11wifi: rtw89: pci: fix interrupt enable mask for HALT C2H of RTL8851BZong-Zhe Yang
RTL8851B keeps almost the same interrupt flow as RTL8852A and RTL8852B. But, it uses a different bitmask for interrupt indicator of FW HALT C2H. So, we make a chip judgement in pci when configuring interrupt mask. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230508084335.42953-2-pkshih@realtek.com
2023-05-05wifi: rtw89: use chip_info::small_fifo_size to choose debug_maskPing-Ke Shih
Previously, 8852B has smaller FIFO size than others, so I use chip_id to choose debug_mask before. 8851B has similar design, so add a field to chip_info as a general expression. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230421024551.29994-6-pkshih@realtek.com
2023-04-14wifi: rtw89: pci: update PCI related settings to support 8851BPing-Ke Shih
Many settings of 8851B are like 8852A or 8852B. Change them to proper settings as hardware design. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230330133324.19538-5-pkshih@realtek.com
2023-04-14wifi: rtw89: add function to wait for completion of TX skbsPo-Hao Huang
Allocate a per-skb completion to track those skbs we are interested in and wait for them to complete transmission with TX status. Normally, the completion object is freed by wait side, but it could be timeout result that complete side should free the object instead. Add a owner field with RCU to determine which side should free the object. Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230411124832.14965-3-pkshih@realtek.com
2023-04-03wifi: rtw89: Remove redundant pci_clear_masterCai Huoqing
Remove pci_clear_master to simplify the code, the bus-mastering is also cleared in do_pci_disable_device, like this: ./drivers/pci/pci.c:2197 static void do_pci_disable_device(struct pci_dev *dev) { u16 pci_command; pci_read_config_word(dev, PCI_COMMAND, &pci_command); if (pci_command & PCI_COMMAND_MASTER) { pci_command &= ~PCI_COMMAND_MASTER; pci_write_config_word(dev, PCI_COMMAND, pci_command); } pcibios_disable_device(dev); }. And dev->is_busmaster is set to 0 in pci_disable_device. Signed-off-by: Cai Huoqing <cai.huoqing@linux.dev> Reviewed-by: Simon Horman <simon.horman@corigine.com> Acked-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230323112613.7550-5-cai.huoqing@linux.dev
2023-04-03wifi: rtw89: fix potential race condition between napi_init and napi_enablePing-Ke Shih
A race condition can happen if netdev is registered, but NAPI isn't initialized yet, and meanwhile user space starts the netdev that will enable NAPI. Then, it hits BUG_ON(): kernel BUG at net/core/dev.c:6423! invalid opcode: 0000 [#1] PREEMPT SMP NOPTI CPU: 0 PID: 417 Comm: iwd Not tainted 6.2.7-slab-dirty #3 eb0f5a8a9d91 Hardware name: LENOVO 21DL/LNVNB161216, BIOS JPCN20WW(V1.06) 09/20/2022 RIP: 0010:napi_enable+0x3f/0x50 Code: 48 89 c2 48 83 e2 f6 f6 81 89 08 00 00 02 74 0d 48 83 ... RSP: 0018:ffffada1414f3548 EFLAGS: 00010246 RAX: 0000000000000000 RBX: ffffa01425802080 RCX: 0000000000000000 RDX: 00000000000002ff RSI: ffffada14e50c614 RDI: ffffa01425808dc0 RBP: 0000000000000000 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000001 R11: 0000000000000100 R12: ffffa01425808f58 R13: 0000000000000000 R14: ffffa01423498940 R15: 0000000000000001 FS: 00007f5577c0a740(0000) GS:ffffa0169fc00000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00007f5577a19972 CR3: 0000000125a7a000 CR4: 0000000000750ef0 PKRU: 55555554 Call Trace: <TASK> rtw89_pci_ops_start+0x1c/0x70 [rtw89_pci 6cbc75429515c181cbc386478d5cfb32ffc5a0f8] rtw89_core_start+0xbe/0x160 [rtw89_core fe07ecb874820b6d778370d4acb6ef8a37847f22] rtw89_ops_start+0x26/0x40 [rtw89_core fe07ecb874820b6d778370d4acb6ef8a37847f22] drv_start+0x42/0x100 [mac80211 c07fa22af8c3cf3f7d7ab3884ca990784d72e2d2] ieee80211_do_open+0x311/0x7d0 [mac80211 c07fa22af8c3cf3f7d7ab3884ca990784d72e2d2] ieee80211_open+0x6a/0x90 [mac80211 c07fa22af8c3cf3f7d7ab3884ca990784d72e2d2] __dev_open+0xe0/0x180 __dev_change_flags+0x1da/0x250 dev_change_flags+0x26/0x70 do_setlink+0x37c/0x12c0 ? ep_poll_callback+0x246/0x290 ? __nla_validate_parse+0x61/0xd00 ? __wake_up_common_lock+0x8f/0xd0 To fix this, follow Jonas' suggestion to switch the order of these functions and move register netdev to be the last step of PCI probe. Also, correct the error handling of rtw89_core_register_hw(). Fixes: e3ec7017f6a2 ("rtw89: add Realtek 802.11ax driver") Cc: stable@vger.kernel.org Reported-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> Link: https://lore.kernel.org/linux-wireless/CAOiHx=n7EwK2B9CnBR07FVA=sEzFagb8TkS4XC_qBNq8OwcYUg@mail.gmail.com/T/#t Suggested-by: Jonas Gorski <jonas.gorski@gmail.com> Tested-by: Larry Finger<Larry.Finger@lwfinger.net> Reviewed-by: Larry Finger<Larry.Finger@lwfinger.net> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230323082839.20474-1-pkshih@realtek.com
2023-02-13wifi: rtw89: 8852be: enable CLKREQ of PCI capabilityChin-Yen Lee
Enable CLKREQ to reduce power consumption for 8852BE. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230126112715.5811-1-pkshih@realtek.com
2023-01-16wifi: rtw89: fix assignation of TX BD RAM tableZong-Zhe Yang
TX BD's RAM table describes how HW allocates usable buffer section for each TX channel at fetch time. The total RAM size for TX BD is chip-dependent. For 8852BE, it has only half size (32) for TX channels of single band. Original table arrange total size (64) for dual band. It will overflow on 8852BE circuit and cause section conflicts between different TX channels. So, we do the changes below. * add another table for single band chip and export both kind of tables * point to the expected one in rtw89_pci_info by chip Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230113090632.60957-4-pkshih@realtek.com
2022-12-01wifi: rtw89: add HE radiotap for monitor modePing-Ke Shih
With basic HE radiotap, we can check data rate in sniffer data. To store the radiotap data, we reserve headroom of aligned 64 bytes, and then update HE radiotap in monitor mode, so it doesn't affect performance in normal mode. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221125072416.94752-3-pkshih@realtek.com
2022-11-09wifi: rtw89: 8852b: change debug mask of message of no TX resourcePing-Ke Shih
8852B has smaller TX FIFO than others in WiFi chip, so it would be buffer full frequently, but it doesn't affect TX performance. However, it shows verbose debug messages with RTW89_DBG_UNEXP mask that is used to indicate abnormal behavior, so change debug mask to RTW89_DBG_TXRX for 8852B. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221108014230.11068-1-pkshih@realtek.com
2022-11-01wifi: rtw89: add WoWLAN function supportChin-Yen Lee
WoWLAN is a feature which allows devices to be woken up from suspend state through WLAN events. When user enables WoWLAN feature and then let the device enter suspend state, WoWLAN firmware will be loaded by the driver and periodically monitors WiFi packets. Power consumption of WiFi chip will be reduced in this state. We now implement WoWLAN function in rtw8852ae and rtw8852ce chip. Currently supported WLAN events include receiving magic packet, rekey packet and deauth packet, and disconnecting from AP. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221027052707.14605-7-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: set power cut closed for 8852bePing-Ke Shih
Entering LPS with PCIe APHY power cut closed would cause PCIe link issue. To avoid the combinational issue, keep PCIe APHY power cut always on. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-7-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: add to do PCI auto calibrationPing-Ke Shih
8852be needs this with n times calibration to correct hardware clock. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-6-pkshih@realtek.com
2022-09-28wifi: rtw89: add DMA busy checking bits to chip infoPing-Ke Shih
8852B has less DMA channels, so its checking bits are different from other chips. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-4-pkshih@realtek.com
2022-09-28wifi: rtw89: pci: mask out unsupported TX channelsPing-Ke Shih
8852BE doesn't support some TX channels, so mask them out, or it access undefined registers. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220927062611.30484-2-pkshih@realtek.com
2022-09-19wifi: rtw89: pci: update LTR settingsPing-Ke Shih
Modify PCI LTR control flow and LTR idle latency to improve power save efficiency. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220916033811.13862-4-pkshih@realtek.com
2022-09-19wifi: rtw89: pci: concentrate control function of TX DMA channelChin-Yen Lee
Different chips use different register and mask for tx dma channels, so concentrate them. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912071706.13619-4-pkshih@realtek.com
2022-09-19wifi: rtw89: correct enable functions of HCI/PCI DMAChin-Yen Lee
Some PCI and MAC registers are changed for different chips and correct them accordingly. And HCI MAD functions belongs to MAC core, so move it to mac.h/.c. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912071706.13619-3-pkshih@realtek.com
2022-09-19wifi: rtw89: 8852c: L1 DMA reset has offloaded to FWZong-Zhe Yang
For 8852C, rtw89_pci_lv1rst_stop_dma() and rtw89_pci_lv1rst_start_dma() are offloaded to FW L1 reset flow. So, driver no longer needs to do them. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220912071706.13619-2-pkshih@realtek.com
2022-09-02wifi: rtw89: pci: correct TX resource checking in low power modePing-Ke Shih
Number of TX resource must be minimum of TX_BD and TX_WD. Only considering TX_BD could drop TX packets pulled from mac80211 if TX_WD is unavailable. Fixes: 52edbb9fb78a ("rtw89: ps: access TX/RX rings via another registers in low power mode") Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220824063312.15784-2-pkshih@realtek.com
2022-09-02wifi: rtw89: pci: fix interrupt stuck after leaving low power modePing-Ke Shih
We turn off interrupt in ISR, and re-enable interrupt in threadfn or napi_poll according to the mode it stays. If we are turning off interrupt, rtwpci->running flag is unset and interrupt handler stop processing even if it was called, so disallow to re-enable interrupt in this situation. Or, wifi chip doesn't trigger interrupt events anymore because interrupt status (ISR) isn't clear by interrupt handler anymore. Fixes: c83dcd0508e2 ("rtw89: pci: add a separate interrupt handler for low power mode") Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220824063312.15784-1-pkshih@realtek.com
2022-09-02wifi: rtw89: pci: correct suspend/resume setting for variant chipsChin-Yen Lee
We find that suspend/resume tests cause 8852CE lost, because some pci registers are changed for 8852CE. So, correct them accordingly. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220819064811.37700-6-pkshih@realtek.com
2022-09-02wifi: rtw89: pci: enable CLK_REQ, ASPM, L1 and L1ss for 8852cChin-Yen Lee
8852CE controls CLKREQ, ASPM L1, L1ss via wifi registers instead, so change them accordingly. Signed-off-by: Chin-Yen Lee <timlee@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220819064811.37700-5-pkshih@realtek.com
2022-09-02wifi: rtw89: pci: fix PCI PHY auto adaption by using software restoreChia-Yuan Li
There is chance that PCI PHY auto adaption fail. When first time boot up, software restore the right adaption value and close PHY auto adaption mechanism. Signed-off-by: Chia-Yuan Li <leo.li@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220819064811.37700-4-pkshih@realtek.com
2022-09-02rtw89: 8852c: disable dma during mac initPo-Hao Huang
Without this patch, our hardware attempts to perform dma while device cpu restarts, and leads to iommu page faults caused by invalid requests. Some platforms show warning messages as below: rtw89_8852ce 0000:01:00.0: AMD-Vi: Event logged [IO_PAGE_FAULT domain=0x000a address=0x10000000004 flags=0x0030] Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220704023453.19935-2-pkshih@realtek.com
2022-09-02wifi: rtw89: declare support for mac80211 chanctx ops by chipZong-Zhe Yang
Some HW features are required if we hook chanctx ops to mac80211. With it, mac80211 would expect the HW-supported variant ops exists on some behavior, e.g. HW scan. But, HW features may depend on chip's FW or its development. Besides, how many chanctx can be supported also depends on chip design. We can neither decide whether to generally support chanctx ops nor how many chanctx can be supported. So, support_chanctx_num is added under chip info to deal with this by chip. For now, all chip configure support_chanctx_num as 0. We haven't really hook chanctx ops yet. So, chip can run without mac80211 chanctx as before. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220809104952.61355-13-pkshih@realtek.com
2022-07-29wifi: rtw89: 8852a: adjust IMR for SER L1Zong-Zhe Yang
SER (system error recovery) L1 (level 1) has a step-by-step handshake process with FW. These handshakes still rely on B_AX_HS0ISR_IND_INT_EN. So, even already during recovery, we enable this bit in IMR. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220721074952.19676-1-pkshih@realtek.com
2022-06-21wifi: rtw89: pci: fix PCI doesn't reclaim TX BD properlyPing-Ke Shih
TX BD (TX ring index) and TX WD (WiFi descriptor buffer) are freed asynchronously. With burst packets, we free TX WD, but the corresponding TX BD couldn't be freed yet. Then, TX can possibly get stuck due to no more TX BD. To avoid this, ignore reclaiming TX BD only if TX WD is no free space, because at this moment TX BD must have some spaces. Otherwise, we reclaim TX BD to resolve TX stuck issue. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220610072610.27095-11-pkshih@realtek.com
2022-06-21wifi: rtw89: add UNEXP debug mask to keep monitor messages unexpected to ↵Ping-Ke Shih
happen frequently Some warning messages could bother users. With proper handling, these situations don't really affect usage, but we still need to keep monitor these messages. If they happen frequently, we must review driver or hardware design to clarify. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220610072610.27095-8-pkshih@realtek.com
2022-05-30rtw89: pci: handle hardware watchdog timeout interrupt statusPing-Ke Shih
This watchdog timeout status bit indicates hardware gets wrong, so run SER L2 flow that calls mac80211 to restart hardware. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220520071731.38563-4-pkshih@realtek.com
2022-05-17rtw89: pci: only mask out INT indicator register for disable interrupt v1Ping-Ke Shih
The design of INT indicator register (R_AX_PCIE_HIMR00_V1) is to reduce IO during frequent interrupts, because it can stop chip sending interrupt to host if we just set this indicator to 0, not all IMR(s). This indicator register looks like a root interrupt controller of wifi chip. However, we can't set all other IMR(s) to 0 during we are running on interrupt service routine, or the indicator register can't reflect the status of certain interrupt happened during this period, and then miss some interrupts especially SER interrupt events. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220516005215.5878-7-pkshih@realtek.com
2022-04-24rtw89: pci: allow to process RPP prior to TX BDPing-Ke Shih
RPP is to report certain skb(s) can be freed, and TX BD indicates which TX descriptors can be freed. Normally, TX BD is happened before RPP. In low power mode, RPP can happen ahead, so change flow to handle this case. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-8-pkshih@realtek.com
2022-04-24rtw89: ps: access TX/RX rings via another registers in low power modePing-Ke Shih
In low power mode, we need to pause PCI to configure IMR and PCI ring index registers accordingly, because the regular registers are power-off in this mode. In the transition moment named paused in code, we can't touch ring index, so don't kick off DMA immediately. Instead, queue them into pending queue, and kick off after the moment. There are three low power modes, which are RF off/clock gate/power gate, but PCI enter low power mode in later two modes only. So, add a mask to achieve this. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-7-pkshih@realtek.com
2022-04-24rtw89: ser: re-enable interrupt in threadfn if under_recoveryPing-Ke Shih
Normally, we re-enable interrupt by napi_poll, but for this special situation, we must turn it on immediately because napi_poll isn't scheduled. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-6-pkshih@realtek.com
2022-04-24rtw89: pci: add a separate interrupt handler for low power modePing-Ke Shih
In lower power mode, there are very low amount of RX, and it must process in a separated function instead of schedule_napi(), because the existing napi_poll does many things to optimize performance, but not all registers can access in low power mode. The simple way is to use threadfn to process the simple thing. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-5-pkshih@realtek.com
2022-04-24rtw89: pci: reclaim TX BD only if it really needPing-Ke Shih
To reclaim TX BD, we need to read hardware reading index to determine if any DMA is complete. Since this IO spends time, do this thing only if we really need it when TX BD has no free buffer corresponding to target skb. The experimental result shows that reading counter decreases from 26,000 to 130 per second. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-4-pkshih@realtek.com
2022-04-24rtw89: pci: add variant RPWM/CPWM to enter low power modePing-Ke Shih
RPWM/CPWM are registers that can set and check low power mode. Since chips use different address, add a field to access them in common flow. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-3-pkshih@realtek.com
2022-04-24rtw89: pci: add variant IMR/ISR and configure functionsPing-Ke Shih
8852CE uses different but similar IMR/ISR registers, and its masks are also different in various states, so add config_intr_mask ops to configure masks according to under_recovery or low_power states. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220421120903.73715-2-pkshih@realtek.com
2022-04-13rtw89: pci: correct return value handling of rtw89_write16_mdio_mask()Ping-Ke Shih
Fix wrong checking statement. Fortunately, this wrong code doesn't affect existing chip. Fixes: 740c431c22fe ("rtw89: pci: add register definition to rtw89_pci_info to generalize pci code") Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220413010804.8941-5-pkshih@realtek.com
2022-04-06rtw89: pci: add L1 settingsPing-Ke Shih
Configure L1 settings of enter and exit. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-8-pkshih@realtek.com
2022-04-06rtw89: pci: add deglitch settingPing-Ke Shih
Add setting to support 8852ce. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-7-pkshih@realtek.com
2022-04-06rtw89: pci: set address info registers depends on chipsPing-Ke Shih
Address info registers are used to configure size of DMA address info to point skb->data. With different size, it can support different number of scatters. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-6-pkshih@realtek.com
2022-04-06rtw89: pci: add LTR setting for v1 chipPing-Ke Shih
Add LTR handle to PCI deinit as well. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-5-pkshih@realtek.com
2022-04-06rtw89: pci: refine pci pre_init functionChia-Yuan Li
The pre_init is used to initialize partial PCI function during PCI probe. It doesn't need to initialize all functions, so probe can be faster. Signed-off-by: Chia-Yuan Li <leo.li@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-4-pkshih@realtek.com
2022-04-06rtw89: pci: add pci attributes to configure operating modePing-Ke Shih
Refine operating mode function to support variant chips. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-3-pkshih@realtek.com
2022-04-06rtw89: pci: add register definition to rtw89_pci_info to generalize pci codePing-Ke Shih
The PCI code of 8852AE and 8852CE are different, but the flow and register names are similar. To reuse the code, add a struct to define register or value accordingly. We also use chip id to control the slightly different flow. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220325060055.58482-2-pkshih@realtek.com
2022-04-06rtw89: support variant of fill_txdescPing-Ke Shih
The txdesc is descriptor related to skb->data. The v1 version contains 8 dwords txwd_body and 6 dwords txwd_info, and the format is also different from original one. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220318023214.32411-10-pkshih@realtek.com
2022-04-06rtw89: pci: support variant of fill_txaddr_infoPing-Ke Shih
The txaddr_info is used to fill the DMA address of skb->data. The v1 version can support up to 10 entries, but the maximum size of each entry is 2047, so it fill more than one entry for large packet, like 3000 bytes. Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220318023214.32411-9-pkshih@realtek.com
generated by cgit (git 2.34.1) at 2025-07-31 03:35:41 +0000