| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2025-06-13 | PCI/pwrctrl: Add optional slot clock for PCI slots | Marek Vasut | |
| Add the ability to enable optional slot clock into the pwrctrl driver. This is used to enable slot clock in split-clock topologies, where the PCIe host/controller supply and PCIe slot supply are not provided by the same clock. The PCIe host/controller clock should be described in the controller node as the controller clock, while the slot clock should be described in controller bridge/slot subnode. Example DT snippet: &pcicontroller { clocks = <&clk_dif 0>; /* PCIe controller clock */ pci@0,0 { #address-cells = <3>; #size-cells = <2>; reg = <0x0 0x0 0x0 0x0 0x0>; compatible = "pciclass,0604"; device_type = "pci"; clocks = <&clk_dif 1>; /* PCIe slot clock */ vpcie3v3-supply = <®_3p3v>; ranges; }; }; Example clock topology: ____________ ____________ | PCIe host | | PCIe slot | | | | | | PCIe RX<|==================|>PCIe TX | | PCIe TX<|==================|>PCIe RX | | | | | | PCIe CLK<|======.. ..======|>PCIe CLK | '------------' || || '------------' || || ____________ || || | 9FGV0441 | || || | | || || | CLK DIF0<|======'' || | CLK DIF1<|=========='' | CLK DIF2<| | CLK DIF3<| '------------' Immutable commit for Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Anand Moon <linux.amoon@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> | |||
| 2025-02-21 | PCI/pwrctrl: Add pwrctrl driver for PCI slots | Manivannan Sadhasivam | |
| This driver is used to control the power state of the devices attached to the PCI slots. Currently, it controls the voltage rails of the PCI slots defined in the devicetree node of the root port. The voltage rails for PCI slots are documented in the DT-schema: https://github.com/devicetree-org/dt-schema/blob/v2024.11/dtschema/schemas/pci/pci-bus-common.yaml#L153 Since this driver has to work with different kind of slots (PCIe x1/x4/x8/x16, Mini PCIe, PCI, etc.), the driver is thus using the of_regulator_bulk_get_all() API to obtain the voltage regulators defined in the DT node, instead of hardcoding them. As such, the DT node of the root port should define the relevant supply properties corresponding to the voltage rails of the PCI slot. Tested-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250116-pci-pwrctrl-slot-v3-5-827473c8fbf4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> | |||
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