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// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/marvell,pxa1908.h>
/ {
model = "Marvell Armada PXA1908";
compatible = "marvell,pxa1908";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
cpus {
#address-cells = <2>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0 0>;
enable-method = "psci";
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0 1>;
enable-method = "psci";
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0 2>;
enable-method = "psci";
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0 3>;
enable-method = "psci";
};
};
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
smmu: iommu@c0010000 {
compatible = "arm,mmu-400";
reg = <0 0xc0010000 0 0x10000>;
#global-interrupts = <1>;
#iommu-cells = <1>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
gic: interrupt-controller@d1df9000 {
compatible = "arm,gic-400";
reg = <0 0xd1df9000 0 0x1000>,
<0 0xd1dfa000 0 0x2000>,
/* The subsequent registers are guesses. */
<0 0xd1dfc000 0 0x2000>,
<0 0xd1dfe000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
interrupt-controller;
#interrupt-cells = <3>;
};
apb@d4000000 {
compatible = "simple-bus";
reg = <0 0xd4000000 0 0x200000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xd4000000 0x200000>;
pdma: dma-controller@0 {
compatible = "marvell,pdma-1.0";
reg = <0 0x10000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
dma-channels = <30>;
#dma-cells = <2>;
};
twsi1: i2c@10800 {
compatible = "mrvl,mmp-twsi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10800 0x64>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbc PXA1908_CLK_TWSI1>;
mrvl,i2c-fast-mode;
status = "disabled";
};
twsi0: i2c@11000 {
compatible = "mrvl,mmp-twsi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x11000 0x64>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbc PXA1908_CLK_TWSI0>;
mrvl,i2c-fast-mode;
status = "disabled";
};
twsi3: i2c@13800 {
compatible = "mrvl,mmp-twsi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x13800 0x64>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbc PXA1908_CLK_TWSI3>;
mrvl,i2c-fast-mode;
status = "disabled";
};
apbc: clock-controller@15000 {
compatible = "marvell,pxa1908-apbc";
reg = <0x15000 0x1000>;
#clock-cells = <1>;
};
uart0: serial@17000 {
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0x17000 0x1000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbc PXA1908_CLK_UART0>;
reg-shift = <2>;
};
uart1: serial@18000 {
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0x18000 0x1000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbc PXA1908_CLK_UART1>;
reg-shift = <2>;
};
gpio: gpio@19000 {
compatible = "marvell,mmp-gpio";
reg = <0x19000 0x800>;
#address-cells = <1>;
#size-cells = <1>;
gpio-controller;
#gpio-cells = <2>;
clocks = <&apbc PXA1908_CLK_GPIO>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gpio_mux";
interrupt-controller;
#interrupt-cells = <2>;
ranges = <0 0x19000 0x800>;
gpio@0 {
reg = <0x0 0x4>;
};
gpio@4 {
reg = <0x4 0x4>;
};
gpio@8 {
reg = <0x8 0x4>;
};
gpio@100 {
reg = <0x100 0x4>;
};
};
pmx: pinmux@1e000 {
compatible = "marvell,pxa1908-padconf", "pinconf-single";
reg = <0x1e000 0x330>;
#pinctrl-cells = <1>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <7>;
range: gpio-range {
#pinctrl-single,gpio-range-cells = <3>;
};
};
uart2: serial@36000 {
compatible = "mrvl,mmp-uart", "intel,xscale-uart";
reg = <0x36000 0x1000>;
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbcp PXA1908_CLK_UART2>;
reg-shift = <2>;
};
twsi2: i2c@37000 {
compatible = "mrvl,mmp-twsi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x37000 0x64>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apbcp PXA1908_CLK_TWSI2>;
mrvl,i2c-fast-mode;
status = "disabled";
};
apbcp: clock-controller@3b000 {
compatible = "marvell,pxa1908-apbcp";
reg = <0x3b000 0x1000>;
#clock-cells = <1>;
};
mpmu: clock-controller@50000 {
compatible = "marvell,pxa1908-mpmu";
reg = <0x50000 0x1000>;
#clock-cells = <1>;
};
};
axi@d4200000 {
compatible = "simple-bus";
reg = <0 0xd4200000 0 0x200000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xd4200000 0x200000>;
usbphy: phy@7000 {
compatible = "marvell,pxa1928-usb-phy";
reg = <0x7000 0x200>;
clocks = <&apmu PXA1908_CLK_USB>;
#phy-cells = <0>;
};
usb: usb@8000 {
compatible = "chipidea,usb2";
reg = <0x8000 0x200>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apmu PXA1908_CLK_USB>;
phys = <&usbphy>;
phy-names = "usb-phy";
};
sdh0: mmc@80000 {
compatible = "mrvl,pxav3-mmc";
reg = <0x80000 0x120>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apmu PXA1908_CLK_SDH0>;
clock-names = "io";
mrvl,clk-delay-cycles = <31>;
};
sdh1: mmc@80800 {
compatible = "mrvl,pxav3-mmc";
reg = <0x80800 0x120>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apmu PXA1908_CLK_SDH1>;
clock-names = "io";
mrvl,clk-delay-cycles = <31>;
};
sdh2: mmc@81000 {
compatible = "mrvl,pxav3-mmc";
reg = <0x81000 0x120>;
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apmu PXA1908_CLK_SDH2>;
clock-names = "io";
mrvl,clk-delay-cycles = <31>;
};
apmu: clock-controller@82800 {
compatible = "marvell,pxa1908-apmu";
reg = <0x82800 0x400>;
#clock-cells = <1>;
};
};
};
};
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