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authorBjorn Helgaas <bhelgaas@google.com>2025-10-03 12:13:14 -0500
committerBjorn Helgaas <bhelgaas@google.com>2025-10-03 12:13:14 -0500
commit94401068457e041fd2738c1ee23dc86ea4accdcc (patch)
treea953e989b3dbe2366051cae4f2199e7c1505b3e1 /scripts/generate_rust_analyzer.py
parentfef353037982e3fd9aa38e2b8a7426768443777c (diff)
parent96a17ed17b369109b662b40345df961b412c1cd3 (diff)
Merge branch 'pci/dt-binding'
- Correct indentation in qcom,pcie-sa8255p.yaml and amd,versal2-mdb-host.yaml so they indent with four spaces consistently (Krzysztof Kozlowski) - Add SM8750 compatible to qcom,pcie-sm8550.yaml (Krishna Chaitanya Chundru) - Add Peripheral Virtualization Unit (PVU), which restricts DMA from PCIe devices to specific regions of host memory, to the ti,am65 binding (Jan Kiszka) - Update qcom,pcie-x1e80100.yaml to allow fifth PCIe host on Qualcomm Glymur, which is compatible with X1E80100 but doesn't have the cnoc_sf_axi clock (Qiang Yu) * pci/dt-binding: dt-bindings: PCI: qcom,pcie-x1e80100: Set clocks minItems for the fifth Glymur PCIe Controller dt-bindings: PCI: ti,am65: Extend for use with PVU dt-bindings: PCI: qcom,pcie-sm8550: Add SM8750 compatible dt-bindings: PCI: Correct example indentation
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