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| author | Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> | 2025-07-11 10:25:38 +0000 |
|---|---|---|
| committer | Georgi Djakov <djakov@kernel.org> | 2025-07-18 17:54:58 +0300 |
| commit | a95571d8ffe2fa92bcc2af22a853170340ae1e9c (patch) | |
| tree | 9c37ffdb3aead8227148476c7d0cccfbf4ee1174 /tools/perf/scripts/python/parallel-perf.py | |
| parent | a8d7161d1dba668d814e66b28aef235341d7b1ed (diff) | |
dt-bindings: interconnect: Add EPSS L3 compatible for QCS8300 SoC
Add Epoch Subsystem (EPSS) L3 interconnect provider binding for
QCS8300 SoC. As the EPSS hardware in QCS8300 and SA8775P are same,
added a family-level compatible for SA877P SoC. This shared fallback
compatible allows grouping of SoCs with similar hardware, reducing
the need to explicitly list each variant in the driver match table.
Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250711102540.143-2-raviteja.laggyshetty@oss.qualcomm.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/parallel-perf.py')
0 files changed, 0 insertions, 0 deletions