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| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2025-05-13 16:46:33 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-06-10 10:20:45 +0200 |
| commit | d3c25dd1612da7ddf5857190e92b0c36d803c4d9 (patch) | |
| tree | b4b1e083ad4c04a1f2a57235173fffb666ec396b /tools/perf/util/scripting-engines/trace-event-python.c | |
| parent | 82a0bc727cc2abd5fa6c4e63f0c303a9244a8ca0 (diff) | |
clk: renesas: r9a09g056: Add clock and reset entries for RIIC controllers
Add module clock and reset definitions for RIIC controllers 0-8, which
are available on the RZ/V2N (R9A09G056) SoC.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250513154635.273664-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
0 files changed, 0 insertions, 0 deletions