diff options
| author | Andrew Jeffery <andrew@aj.id.au> | 2021-06-25 15:40:17 +0930 |
|---|---|---|
| committer | Joel Stanley <joel@jms.id.au> | 2021-07-01 13:34:42 +0930 |
| commit | 2d6608b57c50c54c3e46649110e8ea5a40959c30 (patch) | |
| tree | 6b24c065beb74a895847d0bac75012f318d23f84 | |
| parent | 812bae32e5d50914f75a6e036d3bde39ca86b0c3 (diff) | |
ARM: dts: tacoma: Add phase corrections for eMMC
The degree values were reversed out from the magic tap values of 7 (in)
and 15 + inversion (out) initially suggested by Aspeed.
With the patch tacoma survives several gigabytes of reads and writes
using dd while without it locks up randomly during the boot process.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/20210625061017.1149942-1-andrew@aj.id.au
Fixes: 2fc88f92359d ("mmc: sdhci-of-aspeed: Expose clock phase controls")
Fixes: 961216c135a8 ("ARM: dts: aspeed: Add Rainier system")
Signed-off-by: Joel Stanley <joel@jms.id.au>
| -rw-r--r-- | arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts index 48038b2ef3df..e33153dcaea8 100644 --- a/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts +++ b/arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts @@ -186,6 +186,7 @@ &emmc { status = "okay"; + clk-phase-mmc-hs200 = <36>, <270>; }; &fsim0 { |