diff options
| author | John Crispin <blogic@openwrt.org> | 2014-10-10 23:37:52 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:45:18 +0100 |
| commit | eb5dbd22b619c01ff15b58b27c8e3409cfc7a20e (patch) | |
| tree | 93d8f9ad4dc0ebd5311b5a80a56d226eaa21b4d3 | |
| parent | 17327862f3107b3a2a8ddd586f6b488b3ae37a13 (diff) | |
MIPS: lantiq: the detection of the gpe clock is broken
The code to detect unfused SoCs was broken due to missing register masking.
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/8049/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/lantiq/falcon/sysctrl.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/mips/lantiq/falcon/sysctrl.c b/arch/mips/lantiq/falcon/sysctrl.c index 468ffa043607..7e74760cf2bd 100644 --- a/arch/mips/lantiq/falcon/sysctrl.c +++ b/arch/mips/lantiq/falcon/sysctrl.c @@ -147,12 +147,11 @@ static void falcon_gpe_enable(void) if (status & (1 << (GPPC_OFFSET + 1))) return; - if (status_r32(STATUS_CONFIG) == 0) + freq = (status_r32(STATUS_CONFIG) & + GPEFREQ_MASK) >> + GPEFREQ_OFFSET; + if (freq == 0) freq = 1; /* use 625MHz on unfused chip */ - else - freq = (status_r32(STATUS_CONFIG) & - GPEFREQ_MASK) >> - GPEFREQ_OFFSET; /* apply new frequency */ sysctl_w32_mask(SYSCTL_SYS1, 7 << (GPPC_OFFSET + 1), |