Merge tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC devicetree updates from Arnd Bergmann:
 "After the last release contained a surprising amount of new 32-bit
  machines, this time two thirds of the code changes are for 64-bit.

  The usual updates to existing files include:

   - Device tree compiler warning fixes for Berlin, Renesas, SoCFPGA,
     nomadik, stm32, Allwinner, TI Keystone

   - Support for additional devices on existing machines on Renesas,
     SoCFPGA, at91, hisilicon, OMAP, Tegra, TI K3, Allwinner, Broadcom,
     ux500, Mediatek, Marvell Armada, Marvell MMP, ZynqMP, AMLogic,
     Qualcomm, i.MX, Layerscape, Actions, ASpeed, Toshiba

   - Cleanups and minor fixes for Renesas, at91, mstar, ux500, Samsung,
     stm32, Tegra, Broadcom, Mediatek, Marvell MMP, AMLogic, Qualcomm,
     i.MX, Rockchip, ASpeed, Zynq

  Only three new SoCs this time, but a number of boards across:

  Renesas:
   - Two Beacon EmbeddedWorks boards (RZ/G2H and RZ/G2N based)

  Intel SoCFPGA:
   - eASIC N5X board (N5X)

  ST-Ericsson Ux500:
   - Samsung GT-I9070 (Janice) phone (u8500)

  TI OMAP:
   - MYIR Tech Limited development board (AM335X)

  Allwinner/sunxi:
   - SL631 Action Camera (V3)
   - PineTab Early Adopter tablet (A64)

  Broadcom:
   - BCM4906 networking chip
   - Netgear R8000P router (BCM4906)

  AMLogic:
   - Hardkernel ODROID-HC4 development board (SM1)
   - Beelink GS-King-X TV Box (S922X)

  Qualcomm:
   - Snapdragon 888 / SM8350 high-end phone SoC
   - Qualcomm SDX55 5G modem as standalone SoC
   - Snapdragon MTP reference board (SM8350)
   - Snapdragon MTP reference board (SDX55)
   - Sony Kitakami phones: Xperia Z3+/Z4/Z5 (APQ8094)
   - Alcatel Idol 3 phone (MSM8916)
   - ASUS Zenfone 2 Laser phone (MSM8916)
   - BQ Aquaris X5 aka Longcheer L8910 phone (MSM8916)
   - OnePlus6 phone (SDM845)
   - OnePlus6T phone (SDM845)
   - Alfa Network AP120C-AC access point (IPQ4018)

  NXP i.MX6 (32-bit):
   - Plymovent BAS base system controller for filter systems (imx6dl)
   - Protonic MVT industrial touchscreen terminals (imx6dl)
   - Protonic PRTI6G reference board (imx6ul)
   - Kverneland UT1, UT1Q, UT1P, TGO agricultural terminals (imx6q/dl/qp)

  NXP i.MX8 (64-bit)
   - Beacon i.MX8M Nano development kit (imx8mn)
   - Boundary Devices i.MX8MM Nitrogen SBC (imx8mm)
   - Gateworks Venice i.MX 8M Mini Development Kits (imx8mm)
   - phyBOARD-Pollux-i.MX8MP (imx8mp)
   - Purism Librem5 Evergreen phone (imx8mp)
   - Kontron SMARC-sAL28 system-on-module(imx8mp)

  Rockchip:
   - NanoPi M4B Single-board computer (RK3399)
   - Radxa Rock Pi E router SBC (RK3328)

  ASpeed:
   - Ampere Mt. Jade, a BMC for an x86 server (AST2500)
   - IBM Everest, a BMC for a Power10 server (AST2600)
   - Supermicro x11spi, a BMC for an ARM server (AST2500)

  Zynq:
   - Ebang EBAZ4205, FPGA board (Zynq-7000)
   - ZynqMP zcu104 revC reference platform (ZynqMP)"

* tag 'arm-dt-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (584 commits)
  ARM: dts: aspeed: align GPIO hog names with dtschema
  ARM: dts: aspeed: fix PCA95xx GPIO expander properties on Portwell
  dt-bindings: spi: zynq: Convert Zynq QSPI binding to yaml
  arm: dts: visconti: Add DT support for Toshiba Visconti5 GPIO driver
  ARM: dts: aspeed: ast2600evb: Add enable ehci and uhci
  ARM: dts: aspeed: mowgli: Add i2c rtc device
  ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
  dt-bindings: arm: xilinx: Add missing Zturn boards
  ARM: dts: ebaz4205: add pinctrl entries for switches
  ARM: dts: add Ebang EBAZ4205 device tree
  dt-bindings: arm: add Ebang EBAZ4205 board
  dt-bindings: add ebang vendor prefix
  ARM: dts: aspeed: Add Everest BMC machine
  ARM: dts: aspeed: inspur-fp5280g2: Add ipsps1 driver
  ARM: dts: aspeed: inspur-fp5280g2: Add GPIO line names
  ARM: dts: aspeed: Add Supermicro x11spi BMC machine
  ARM: dts: aspeed: g220a: Fix some gpio
  ARM: dts: aspeed: g220a: Enable ipmb
  ARM: dts: aspeed: rainier: Add eMMC clock phase compensation
  ARM: dts: aspeed: Add LCLK to lpc-snoop
  ...

1 files changed, 140 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 1dbe4e8b38ac..cd635f222d26 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -5,8 +5,11 @@
  * Copyright (c) 2016-2017 Andreas Färber
  */
 
+#include <dt-bindings/clock/actions,s500-cmu.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/owl-s500-powergate.h>
+#include <dt-bindings/reset/actions,s500-reset.h>
 
 / {
 	compatible = "actions,s500";
@@ -70,6 +73,12 @@
 		#clock-cells = <0>;
 	};
 
+	losc: losc {
+		compatible = "fixed-clock";
+		clock-frequency = <32768>;
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		#address-cells = <1>;
@@ -124,6 +133,7 @@
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0120000 0x2000>;
 			interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART0>;
 			status = "disabled";
 		};
 
@@ -131,6 +141,7 @@
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0122000 0x2000>;
 			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART1>;
 			status = "disabled";
 		};
 
@@ -138,6 +149,7 @@
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0124000 0x2000>;
 			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART2>;
 			status = "disabled";
 		};
 
@@ -145,6 +157,7 @@
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0126000 0x2000>;
 			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART3>;
 			status = "disabled";
 		};
 
@@ -152,6 +165,7 @@
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb0128000 0x2000>;
 			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART4>;
 			status = "disabled";
 		};
 
@@ -159,6 +173,7 @@
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb012a000 0x2000>;
 			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART5>;
 			status = "disabled";
 		};
 
@@ -166,9 +181,68 @@
 			compatible = "actions,s500-uart", "actions,owl-uart";
 			reg = <0xb012c000 0x2000>;
 			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_UART6>;
+			status = "disabled";
+		};
+
+		cmu: clock-controller@b0160000 {
+			compatible = "actions,s500-cmu";
+			reg = <0xb0160000 0x8000>;
+			clocks = <&hosc>, <&losc>;
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
+
+		i2c0: i2c@b0170000 {
+			compatible = "actions,s500-i2c";
+			reg = <0xb0170000 0x4000>;
+			clocks = <&cmu CLK_I2C0>;
+			interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@b0174000 {
+			compatible = "actions,s500-i2c";
+			reg = <0xb0174000 0x4000>;
+			clocks = <&cmu CLK_I2C1>;
+			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@b0178000 {
+			compatible = "actions,s500-i2c";
+			reg = <0xb0178000 0x4000>;
+			clocks = <&cmu CLK_I2C2>;
+			interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@b017c000 {
+			compatible = "actions,s500-i2c";
+			reg = <0xb017c000 0x4000>;
+			clocks = <&cmu CLK_I2C3>;
+			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
 			status = "disabled";
 		};
 
+		sirq: interrupt-controller@b01b0200 {
+			compatible = "actions,s500-sirq";
+			reg = <0xb01b0200 0x4>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ0 */
+				     <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, /* SIRQ1 */
+				     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; /* SIRQ2 */
+		};
+
 		timer: timer@b0168000 {
 			compatible = "actions,s500-timer";
 			reg = <0xb0168000 0x8000>;
@@ -184,5 +258,71 @@
 			reg = <0xb01b0100 0x100>;
 			#power-domain-cells = <1>;
 		};
+
+		pinctrl: pinctrl@b01b0000 {
+			compatible = "actions,s500-pinctrl";
+			reg = <0xb01b0000 0x40>, /* GPIO */
+			      <0xb01b0040 0x10>, /* Multiplexing Control */
+			      <0xb01b0060 0x18>, /* PAD Control */
+			      <0xb01b0080 0xc>;  /* PAD Drive Capacity */
+			clocks = <&cmu CLK_GPIO>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl 0 0 132>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
+				     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
+				     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
+				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
+		};
+
+		dma: dma-controller@b0260000 {
+			compatible = "actions,s500-dma";
+			reg = <0xb0260000 0xd00>;
+			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+			#dma-cells = <1>;
+			dma-channels = <12>;
+			dma-requests = <46>;
+			clocks = <&cmu CLK_DMAC>;
+			power-domains = <&sps S500_PD_DMA>;
+		};
+
+		mmc0: mmc@b0230000 {
+			compatible = "actions,s500-mmc", "actions,owl-mmc";
+			reg = <0xb0230000 0x38>;
+			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_SD0>;
+			resets = <&cmu RESET_SD0>;
+			dmas = <&dma 2>;
+			dma-names = "mmc";
+			status = "disabled";
+		};
+
+		mmc1: mmc@b0234000 {
+			compatible = "actions,s500-mmc", "actions,owl-mmc";
+			reg = <0xb0234000 0x38>;
+			interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_SD1>;
+			resets = <&cmu RESET_SD1>;
+			dmas = <&dma 3>;
+			dma-names = "mmc";
+			status = "disabled";
+		};
+
+		mmc2: mmc@b0238000 {
+			compatible = "actions,s500-mmc", "actions,owl-mmc";
+			reg = <0xb0238000 0x38>;
+			interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_SD2>;
+			resets = <&cmu RESET_SD2>;
+			dmas = <&dma 4>;
+			dma-names = "mmc";
+			status = "disabled";
+		};
 	};
 };