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authorShaoyun Liu <Shaoyun.Liu@amd.com>2017-11-29 13:51:32 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-12-08 11:32:24 -0500
commitcd29253f650a6ab27bae8c0b8c17fb8e71f864e8 (patch)
tree529568d8a82b8dffceaa40c1bdfe5bf7bb72dfb5 /drivers/gpu/drm/amd/amdgpu/soc15_common.h
parent946a4d5b301028621791e6c8b53f64c426dea1a5 (diff)
drm/amdgpu: Change SOC15_REG_OFFSET to use dynamic register offset
Acked-by: Christian Konig <christian.koenig@amd.com> Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/soc15_common.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/soc15_common.h6
1 files changed, 1 insertions, 5 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
index e2207c5745f0..413951c33983 100644
--- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h
+++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h
@@ -41,11 +41,7 @@ struct nbio_hdp_flush_reg {
/* Register Access Macros */
-#define SOC15_REG_OFFSET(ip, inst, reg) (0 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG0 + reg : \
- (1 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG1 + reg : \
- (2 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG2 + reg : \
- (3 == reg##_BASE_IDX ? ip##_BASE__INST##inst##_SEG3 + reg : \
- (ip##_BASE__INST##inst##_SEG4 + reg)))))
+#define SOC15_REG_OFFSET(ip, inst, reg) (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg)
#define WREG32_FIELD15(ip, idx, reg, field, val) \
WREG32(adev->reg_offset[ip##_HWIP][idx][mm##reg##_BASE_IDX] + mm##reg, \