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-rw-r--r--arch/arm64/boot/dts/exynos/google/Makefile1
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101-oriole.dts267
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi294
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101-raven.dts29
-rw-r--r--arch/arm64/boot/dts/exynos/google/gs101.dtsi74
5 files changed, 391 insertions, 274 deletions
diff --git a/arch/arm64/boot/dts/exynos/google/Makefile b/arch/arm64/boot/dts/exynos/google/Makefile
index 0a6d5e1fe4ee..7385f82b03c9 100644
--- a/arch/arm64/boot/dts/exynos/google/Makefile
+++ b/arch/arm64/boot/dts/exynos/google/Makefile
@@ -2,3 +2,4 @@
dtb-$(CONFIG_ARCH_EXYNOS) += \
gs101-oriole.dtb \
+ gs101-raven.dtb
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
index e58881c61d53..8df42bedbc03 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
@@ -8,273 +8,22 @@
/dts-v1/;
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/usb/pd.h>
-#include "gs101-pinctrl.h"
-#include "gs101.dtsi"
+#include "gs101-pixel-common.dtsi"
/ {
model = "Oriole";
compatible = "google,gs101-oriole", "google,gs101";
-
- aliases {
- serial0 = &serial_0;
- };
-
- chosen {
- /* Bootloader expects bootargs specified otherwise it crashes */
- bootargs = "";
- stdout-path = &serial_0;
- };
-
- gpio-keys {
- compatible = "gpio-keys";
- pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
- pinctrl-names = "default";
-
- button-vol-down {
- label = "KEY_VOLUMEDOWN";
- linux,code = <KEY_VOLUMEDOWN>;
- gpios = <&gpa7 3 GPIO_ACTIVE_LOW>;
- wakeup-source;
- };
-
- button-vol-up {
- label = "KEY_VOLUMEUP";
- linux,code = <KEY_VOLUMEUP>;
- gpios = <&gpa8 1 GPIO_ACTIVE_LOW>;
- wakeup-source;
- };
-
- button-power {
- label = "KEY_POWER";
- linux,code = <KEY_POWER>;
- gpios = <&gpa10 1 GPIO_ACTIVE_LOW>;
- wakeup-source;
- };
- };
-
- /* TODO: Remove this once PMIC is implemented */
- reg_placeholder: regulator-0 {
- compatible = "regulator-fixed";
- regulator-name = "placeholder_reg";
- };
-
- /* TODO: Remove this once S2MPG11 slave PMIC is implemented */
- ufs_0_fixed_vcc_reg: regulator-1 {
- compatible = "regulator-fixed";
- regulator-name = "ufs-vcc";
- gpio = <&gpp0 1 GPIO_ACTIVE_HIGH>;
- regulator-boot-on;
- enable-active-high;
- };
-};
-
-&ext_24_5m {
- clock-frequency = <24576000>;
-};
-
-&ext_200m {
- clock-frequency = <200000000>;
-};
-
-&hsi2c_8 {
- status = "okay";
-
- eeprom: eeprom@50 {
- compatible = "atmel,24c08";
- reg = <0x50>;
- };
-};
-
-&hsi2c_12 {
- status = "okay";
- /* TODO: add the devices once drivers exist */
-
- usb-typec@25 {
- compatible = "maxim,max77759-tcpci", "maxim,max33359";
- reg = <0x25>;
- interrupts-extended = <&gpa8 2 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-0 = <&typec_int>;
- pinctrl-names = "default";
-
- connector {
- compatible = "usb-c-connector";
- label = "USB-C";
- data-role = "dual";
- power-role = "dual";
- self-powered;
- try-power-role = "sink";
- op-sink-microwatt = <2600000>;
- slow-charger-loop;
- /*
- * max77759 operating in reverse boost mode (0xA) can
- * source up to 1.5A while extboost can only do ~1A.
- * Since extboost is the primary path, advertise 900mA.
- */
- source-pdos = <PDO_FIXED(5000, 900,
- (PDO_FIXED_SUSPEND
- | PDO_FIXED_USB_COMM
- | PDO_FIXED_DATA_SWAP
- | PDO_FIXED_DUAL_ROLE))>;
- sink-pdos = <PDO_FIXED(5000, 3000,
- (PDO_FIXED_DATA_SWAP
- | PDO_FIXED_USB_COMM
- | PDO_FIXED_HIGHER_CAP
- | PDO_FIXED_DUAL_ROLE))
- PDO_FIXED(9000, 2200, 0)
- PDO_PPS_APDO(5000, 11000, 3000)>;
- sink-vdos = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
- IDH_PTYPE_DFP_HOST, 2, 0x18d1)
- VDO_CERT(0x0)
- VDO_PRODUCT(0x4ee1, 0x0)
- VDO_UFP(UFP_VDO_VER1_2,
- (DEV_USB2_CAPABLE
- | DEV_USB3_CAPABLE),
- UFP_RECEPTACLE, 0,
- AMA_VCONN_NOT_REQ, 0,
- UFP_ALTMODE_NOT_SUPP,
- UFP_USB32_GEN1)
- /* padding */ 0
- VDO_DFP(DFP_VDO_VER1_1,
- (HOST_USB2_CAPABLE
- | HOST_USB3_CAPABLE),
- DFP_RECEPTACLE, 0)>;
- sink-vdos-v1 = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
- 0, 0, 0x18d1)
- VDO_CERT(0x0)
- VDO_PRODUCT(0x4ee1, 0x0)>;
- /*
- * Until bootloader is updated to set those two when
- * console is enabled, we disable PD here.
- */
- pd-disable;
- typec-power-opmode = "default";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- usbc0_orien_sw: endpoint {
- remote-endpoint = <&usbdrd31_phy_orien_switch>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- usbc0_role_sw: endpoint {
- remote-endpoint = <&usbdrd31_dwc3_role_switch>;
- };
- };
- };
- };
- };
-};
-
-&pinctrl_far_alive {
- key_voldown: key-voldown-pins {
- samsung,pins = "gpa7-3";
- samsung,pin-function = <GS101_PIN_FUNC_EINT>;
- samsung,pin-pud = <GS101_PIN_PULL_NONE>;
- samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
- };
-
- key_volup: key-volup-pins {
- samsung,pins = "gpa8-1";
- samsung,pin-function = <GS101_PIN_FUNC_EINT>;
- samsung,pin-pud = <GS101_PIN_PULL_NONE>;
- samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
- };
-
- typec_int: typec-int-pins {
- samsung,pins = "gpa8-2";
- samsung,pin-function = <GS101_PIN_FUNC_EINT>;
- samsung,pin-pud = <GS101_PIN_PULL_UP>;
- samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
- };
-};
-
-&pinctrl_gpio_alive {
- key_power: key-power-pins {
- samsung,pins = "gpa10-1";
- samsung,pin-function = <GS101_PIN_FUNC_EINT>;
- samsung,pin-pud = <GS101_PIN_PULL_NONE>;
- samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
- };
-};
-
-&serial_0 {
- status = "okay";
-};
-
-&ufs_0 {
- status = "okay";
- vcc-supply = <&ufs_0_fixed_vcc_reg>;
-};
-
-&ufs_0_phy {
- status = "okay";
-};
-
-&usbdrd31 {
- vdd10-supply = <&reg_placeholder>;
- vdd33-supply = <&reg_placeholder>;
- status = "okay";
-};
-
-&usbdrd31_dwc3 {
- dr_mode = "otg";
- usb-role-switch;
- role-switch-default-mode = "peripheral";
- maximum-speed = "super-speed-plus";
- status = "okay";
-
- port {
- usbdrd31_dwc3_role_switch: endpoint {
- remote-endpoint = <&usbc0_role_sw>;
- };
- };
-};
-
-&usbdrd31_phy {
- orientation-switch;
- /* TODO: Update these once PMIC is implemented */
- pll-supply = <&reg_placeholder>;
- dvdd-usb20-supply = <&reg_placeholder>;
- vddh-usb20-supply = <&reg_placeholder>;
- vdd33-usb20-supply = <&reg_placeholder>;
- vdda-usbdp-supply = <&reg_placeholder>;
- vddh-usbdp-supply = <&reg_placeholder>;
- status = "okay";
-
- port {
- usbdrd31_phy_orien_switch: endpoint {
- remote-endpoint = <&usbc0_orien_sw>;
- };
- };
-};
-
-&usi_uart {
- samsung,clkreq-on; /* needed for UART mode */
- status = "okay";
-};
-
-&usi8 {
- samsung,mode = <USI_V2_I2C>;
- status = "okay";
};
-&usi12 {
- samsung,mode = <USI_V2_I2C>;
+&cont_splash_mem {
+ reg = <0x0 0xfac00000 (1080 * 2400 * 4)>;
status = "okay";
};
-&watchdog_cl0 {
- timeout-sec = <30>;
+&framebuffer0 {
+ width = <1080>;
+ height = <2400>;
+ stride = <(1080 * 4)>;
+ format = "a8r8g8b8";
status = "okay";
};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
new file mode 100644
index 000000000000..d6ddcc13f7b2
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/google/gs101-pixel-common.dtsi
@@ -0,0 +1,294 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Device Tree nodes common for all GS101-based Pixel
+ *
+ * Copyright 2021-2023 Google LLC
+ * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/usb/pd.h>
+#include "gs101-pinctrl.h"
+#include "gs101.dtsi"
+
+/ {
+ aliases {
+ serial0 = &serial_0;
+ };
+
+ chosen {
+ /* Bootloader expects bootargs specified otherwise it crashes */
+ bootargs = "";
+ stdout-path = &serial_0;
+
+ /* Use display framebuffer as setup by bootloader */
+ framebuffer0: framebuffer-0 {
+ compatible = "simple-framebuffer";
+ memory-region = <&cont_splash_mem>;
+ /* format properties to be added by actual board */
+ status = "disabled";
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>;
+ pinctrl-names = "default";
+
+ button-vol-down {
+ label = "KEY_VOLUMEDOWN";
+ linux,code = <KEY_VOLUMEDOWN>;
+ gpios = <&gpa7 3 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+
+ button-vol-up {
+ label = "KEY_VOLUMEUP";
+ linux,code = <KEY_VOLUMEUP>;
+ gpios = <&gpa8 1 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+
+ button-power {
+ label = "KEY_POWER";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpa10 1 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+ };
+
+ /* TODO: Remove this once PMIC is implemented */
+ reg_placeholder: regulator-0 {
+ compatible = "regulator-fixed";
+ regulator-name = "placeholder_reg";
+ };
+
+ /* TODO: Remove this once S2MPG11 slave PMIC is implemented */
+ ufs_0_fixed_vcc_reg: regulator-1 {
+ compatible = "regulator-fixed";
+ regulator-name = "ufs-vcc";
+ gpio = <&gpp0 1 GPIO_ACTIVE_HIGH>;
+ regulator-boot-on;
+ enable-active-high;
+ };
+
+ reserved-memory {
+ cont_splash_mem: splash@fac00000 {
+ /* size to be updated by actual board */
+ reg = <0x0 0xfac00000 0x0>;
+ no-map;
+ status = "disabled";
+ };
+ };
+};
+
+&ext_24_5m {
+ clock-frequency = <24576000>;
+};
+
+&ext_200m {
+ clock-frequency = <200000000>;
+};
+
+&hsi2c_8 {
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ };
+};
+
+&hsi2c_12 {
+ status = "okay";
+ /* TODO: add the devices once drivers exist */
+
+ usb-typec@25 {
+ compatible = "maxim,max77759-tcpci", "maxim,max33359";
+ reg = <0x25>;
+ interrupts-extended = <&gpa8 2 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&typec_int>;
+ pinctrl-names = "default";
+
+ connector {
+ compatible = "usb-c-connector";
+ label = "USB-C";
+ data-role = "dual";
+ power-role = "dual";
+ self-powered;
+ try-power-role = "sink";
+ op-sink-microwatt = <2600000>;
+ slow-charger-loop;
+ /*
+ * max77759 operating in reverse boost mode (0xA) can
+ * source up to 1.5A while extboost can only do ~1A.
+ * Since extboost is the primary path, advertise 900mA.
+ */
+ source-pdos = <PDO_FIXED(5000, 900,
+ (PDO_FIXED_SUSPEND
+ | PDO_FIXED_USB_COMM
+ | PDO_FIXED_DATA_SWAP
+ | PDO_FIXED_DUAL_ROLE))>;
+ sink-pdos = <PDO_FIXED(5000, 3000,
+ (PDO_FIXED_DATA_SWAP
+ | PDO_FIXED_USB_COMM
+ | PDO_FIXED_HIGHER_CAP
+ | PDO_FIXED_DUAL_ROLE))
+ PDO_FIXED(9000, 2200, 0)
+ PDO_PPS_APDO(5000, 11000, 3000)>;
+ sink-vdos = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
+ IDH_PTYPE_DFP_HOST, 2, 0x18d1)
+ VDO_CERT(0x0)
+ VDO_PRODUCT(0x4ee1, 0x0)
+ VDO_UFP(UFP_VDO_VER1_2,
+ (DEV_USB2_CAPABLE
+ | DEV_USB3_CAPABLE),
+ UFP_RECEPTACLE, 0,
+ AMA_VCONN_NOT_REQ, 0,
+ UFP_ALTMODE_NOT_SUPP,
+ UFP_USB32_GEN1)
+ /* padding */ 0
+ VDO_DFP(DFP_VDO_VER1_1,
+ (HOST_USB2_CAPABLE
+ | HOST_USB3_CAPABLE),
+ DFP_RECEPTACLE, 0)>;
+ sink-vdos-v1 = <VDO_IDH(1, 1, IDH_PTYPE_PERIPH, 0,
+ 0, 0, 0x18d1)
+ VDO_CERT(0x0)
+ VDO_PRODUCT(0x4ee1, 0x0)>;
+ /*
+ * Until bootloader is updated to set those two when
+ * console is enabled, we disable PD here.
+ */
+ pd-disable;
+ typec-power-opmode = "default";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usbc0_orien_sw: endpoint {
+ remote-endpoint = <&usbdrd31_phy_orien_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usbc0_role_sw: endpoint {
+ remote-endpoint = <&usbdrd31_dwc3_role_switch>;
+ };
+ };
+ };
+ };
+ };
+};
+
+&pinctrl_far_alive {
+ key_voldown: key-voldown-pins {
+ samsung,pins = "gpa7-3";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_NONE>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+
+ key_volup: key-volup-pins {
+ samsung,pins = "gpa8-1";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_NONE>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+
+ typec_int: typec-int-pins {
+ samsung,pins = "gpa8-2";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_UP>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+};
+
+&pinctrl_gpio_alive {
+ key_power: key-power-pins {
+ samsung,pins = "gpa10-1";
+ samsung,pin-function = <GS101_PIN_FUNC_EINT>;
+ samsung,pin-pud = <GS101_PIN_PULL_NONE>;
+ samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>;
+ };
+};
+
+&serial_0 {
+ status = "okay";
+};
+
+&ufs_0 {
+ status = "okay";
+ vcc-supply = <&ufs_0_fixed_vcc_reg>;
+};
+
+&ufs_0_phy {
+ status = "okay";
+};
+
+&usbdrd31 {
+ vdd10-supply = <&reg_placeholder>;
+ vdd33-supply = <&reg_placeholder>;
+ status = "okay";
+};
+
+&usbdrd31_dwc3 {
+ dr_mode = "otg";
+ usb-role-switch;
+ role-switch-default-mode = "peripheral";
+ maximum-speed = "super-speed-plus";
+ status = "okay";
+
+ port {
+ usbdrd31_dwc3_role_switch: endpoint {
+ remote-endpoint = <&usbc0_role_sw>;
+ };
+ };
+};
+
+&usbdrd31_phy {
+ orientation-switch;
+ /* TODO: Update these once PMIC is implemented */
+ pll-supply = <&reg_placeholder>;
+ dvdd-usb20-supply = <&reg_placeholder>;
+ vddh-usb20-supply = <&reg_placeholder>;
+ vdd33-usb20-supply = <&reg_placeholder>;
+ vdda-usbdp-supply = <&reg_placeholder>;
+ vddh-usbdp-supply = <&reg_placeholder>;
+ status = "okay";
+
+ port {
+ usbdrd31_phy_orien_switch: endpoint {
+ remote-endpoint = <&usbc0_orien_sw>;
+ };
+ };
+};
+
+&usi_uart {
+ samsung,clkreq-on; /* needed for UART mode */
+ status = "okay";
+};
+
+&usi8 {
+ samsung,mode = <USI_MODE_I2C>;
+ status = "okay";
+};
+
+&usi12 {
+ samsung,mode = <USI_MODE_I2C>;
+ status = "okay";
+};
+
+&watchdog_cl0 {
+ timeout-sec = <30>;
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-raven.dts b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts
new file mode 100644
index 000000000000..1e7e6b34b864
--- /dev/null
+++ b/arch/arm64/boot/dts/exynos/google/gs101-raven.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Raven Device Tree
+ *
+ * Copyright 2021-2023 Google LLC
+ * Copyright 2023-2025 Linaro Ltd
+ */
+
+/dts-v1/;
+
+#include "gs101-pixel-common.dtsi"
+
+/ {
+ model = "Raven";
+ compatible = "google,gs101-raven", "google,gs101";
+};
+
+&cont_splash_mem {
+ reg = <0x0 0xfac00000 (1440 * 3120 * 4)>;
+ status = "okay";
+};
+
+&framebuffer0 {
+ width = <1440>;
+ height = <3120>;
+ stride = <(1440 * 4)>;
+ format = "a8r8g8b8";
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index c5335dd59dfe..48c691fd0a3a 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -73,7 +73,7 @@
compatible = "arm,cortex-a55";
reg = <0x0000>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -83,7 +83,7 @@
compatible = "arm,cortex-a55";
reg = <0x0100>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -93,7 +93,7 @@
compatible = "arm,cortex-a55";
reg = <0x0200>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -103,7 +103,7 @@
compatible = "arm,cortex-a55";
reg = <0x0300>;
enable-method = "psci";
- cpu-idle-states = <&ANANKE_CPU_SLEEP>;
+ cpu-idle-states = <&ananke_cpu_sleep>;
capacity-dmips-mhz = <250>;
dynamic-power-coefficient = <70>;
};
@@ -113,7 +113,7 @@
compatible = "arm,cortex-a76";
reg = <0x0400>;
enable-method = "psci";
- cpu-idle-states = <&ENYO_CPU_SLEEP>;
+ cpu-idle-states = <&enyo_cpu_sleep>;
capacity-dmips-mhz = <620>;
dynamic-power-coefficient = <284>;
};
@@ -123,7 +123,7 @@
compatible = "arm,cortex-a76";
reg = <0x0500>;
enable-method = "psci";
- cpu-idle-states = <&ENYO_CPU_SLEEP>;
+ cpu-idle-states = <&enyo_cpu_sleep>;
capacity-dmips-mhz = <620>;
dynamic-power-coefficient = <284>;
};
@@ -133,7 +133,7 @@
compatible = "arm,cortex-x1";
reg = <0x0600>;
enable-method = "psci";
- cpu-idle-states = <&HERA_CPU_SLEEP>;
+ cpu-idle-states = <&hera_cpu_sleep>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <650>;
};
@@ -143,7 +143,7 @@
compatible = "arm,cortex-x1";
reg = <0x0700>;
enable-method = "psci";
- cpu-idle-states = <&HERA_CPU_SLEEP>;
+ cpu-idle-states = <&hera_cpu_sleep>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <650>;
};
@@ -151,7 +151,7 @@
idle-states {
entry-method = "psci";
- ANANKE_CPU_SLEEP: cpu-ananke-sleep {
+ ananke_cpu_sleep: cpu-ananke-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
@@ -160,7 +160,7 @@
min-residency-us = <2000>;
};
- ENYO_CPU_SLEEP: cpu-enyo-sleep {
+ enyo_cpu_sleep: cpu-enyo-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
@@ -169,7 +169,7 @@
min-residency-us = <2500>;
};
- HERA_CPU_SLEEP: cpu-hera-sleep {
+ hera_cpu_sleep: cpu-hera-sleep {
idle-state-name = "c2";
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
@@ -196,6 +196,14 @@
clock-output-names = "ext-200m";
};
+ firmware {
+ acpm_ipc: power-management {
+ compatible = "google,gs101-acpm-ipc";
+ mboxes = <&ap2apm_mailbox>;
+ shmem = <&apm_sram>;
+ };
+ };
+
pmu-0 {
compatible = "arm,cortex-a55-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>;
@@ -825,7 +833,7 @@
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
clock-names = "pclk", "ipclk";
samsung,sysreg = <&sysreg_peric0 0x1020>;
- samsung,mode = <USI_V2_UART>;
+ samsung,mode = <USI_MODE_UART>;
status = "disabled";
serial_0: serial@10a00000 {
@@ -1397,21 +1405,39 @@
pmu_system_controller: system-controller@17460000 {
compatible = "google,gs101-pmu", "syscon";
reg = <0x17460000 0x10000>;
+ google,pmu-intr-gen-syscon = <&pmu_intr_gen>;
poweroff: syscon-poweroff {
compatible = "syscon-poweroff";
- regmap = <&pmu_system_controller>;
offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */
- mask = <0x100>; /* reset value */
+ mask = <0x00000100>;
+ value = <0x0>;
};
reboot: syscon-reboot {
compatible = "syscon-reboot";
- regmap = <&pmu_system_controller>;
offset = <0x3a00>; /* SYSTEM_CONFIGURATION */
mask = <0x2>; /* SWRESET_SYSTEM */
value = <0x2>; /* reset value */
};
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <0x0810>; /* EXYNOS_PMU_SYSIP_DAT0 */
+ mode-bootloader = <0xfc>;
+ mode-charge = <0x0a>;
+ mode-fastboot = <0xfa>;
+ mode-reboot-ab-update = <0x52>;
+ mode-recovery = <0xff>;
+ mode-rescue = <0xf9>;
+ mode-shutdown-thermal = <0x51>;
+ mode-shutdown-thermal-battery = <0x51>;
+ };
+ };
+
+ pmu_intr_gen: syscon@17470000 {
+ compatible = "google,gs101-pmu-intr-gen", "syscon";
+ reg = <0x17470000 0x10000>;
};
pinctrl_gpio_alive: pinctrl@174d0000 {
@@ -1440,6 +1466,15 @@
};
};
+ ap2apm_mailbox: mailbox@17610000 {
+ compatible = "google,gs101-mbox";
+ reg = <0x17610000 0x1000>;
+ clocks = <&cmu_apm CLK_GOUT_APM_MAILBOX_APM_AP_PCLK>;
+ clock-names = "pclk";
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH 0>;
+ #mbox-cells = <0>;
+ };
+
pinctrl_gsactrl: pinctrl@17940000 {
compatible = "google,gs101-pinctrl";
reg = <0x17940000 0x00001000>;
@@ -1454,6 +1489,7 @@
/* TODO: update once support for this CMU exists */
clocks = <0>;
clock-names = "pclk";
+ status = "disabled";
};
cmu_top: clock-controller@1e080000 {
@@ -1466,6 +1502,14 @@
};
};
+ apm_sram: sram@2039000 {
+ compatible = "mmio-sram";
+ reg = <0x0 0x2039000 0x40000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x2039000 0x40000>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts =