diff options
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 26 |
1 files changed, 19 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index e80412abec08..ab232e5c7ad6 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -83,9 +83,7 @@ /* On-module TI DP83825I PHY but no connector, enable in carrierboard */ &gmac { - snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 50000 50000>; + phy-handle = <&dp83825>; phy-supply = <&vcc_3v3>; clock_in_out = "output"; }; @@ -325,10 +323,6 @@ }; }; -&i2c3 { - status = "okay"; -}; - &i2s0_8ch { rockchip,trcm-sync-tx-only; @@ -348,6 +342,18 @@ status = "okay"; }; +&mdio { + dp83825: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + pinctrl-names = "default"; + pinctrl-0 = <&phy_rst>; + reset-assert-us = <50000>; + reset-deassert-us = <50000>; + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + }; +}; + &pinctrl { emmc { emmc_reset: emmc-reset { @@ -355,6 +361,12 @@ }; }; + ethernet { + phy_rst: phy-rst { + rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + leds { module_led_pin: module-led-pin { rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; |