Age | Commit message (Collapse) | Author |
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Add fixed-partitions for spi-nor flash to match the at91 boot flow
and layout of the nand flash.
Partitions can be listed from /proc/mtd:
[root@sama7g54 ~]$ cat /proc/mtd | grep qspi
mtd6: 00040000 00001000 "qspi1: at91bootstrap"
mtd7: 00100000 00001000 "qspi1: u-boot"
mtd8: 00040000 00001000 "qspi1: u-boot env"
mtd9: 00080000 00001000 "qspi1: device tree"
mtd10: 00600000 00001000 "qspi1: kernel"
[root@sama7g54 ~]$ mtdinfo /dev/mtd10
mtd10
Name: qspi1: kernel
Type: nor
Eraseblock size: 4096 bytes, 4.0 KiB
Amount of eraseblocks: 1536 (6291456 bytes, 6.0 MiB)
Minimum input/output unit size: 1 byte
Sub-page size: 1 byte
Character device major/minor: 90:20
Bad blocks are allowed: false
Device is writable: true
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250429064547.5807-1-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add RTT timer with backup register for SAMA7D65_Curiosity board.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/463581224a07bf122c6907d34a0c5c71b1cc73e1.1744666011.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add RTT support for SAMA7D65 SoC. The GPBR is added so the SoC is able
to store the RTT time data.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/e8868ef06102241b47883ba10edaed751831be6d.1744666011.git.Ryan.Wanner@microchip.com
[claudiu.beznea: keep nodes sorted by their address]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add SRAM, secumod, UDDRC, and DDR3phy to enable support for low power modes.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/354ecd628fdd292d2125570a6b10a93cbecb7706.1744666011.git.Ryan.Wanner@microchip.com
[claudiu.beznea: keep nodes sorted by their address]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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If the MAC address is not fetched and loaded by U-boot then Linux will
have to load the address. The EEPROM and nvmem-layout to describe
EUI48 MAC address regions.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/96ee6832d9b55acfae8d3560f625798025dfd89c.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: added nvmem properties in gmac0 node before the status
one]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add MCP16502 to the sama7d65_curiosity board to control voltages in the
MPU. The device is connected to twi 10 interface
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/60f6b7764227bb42c74404e8ca1388477183b7b5.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: drop regulator-suspend-voltage for ldo2 as it is not
needed]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Enable GMAC0 interface for sama7d65_curiosity board.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/fca0c1deb74006cdedbdd71061dec9dabf1e9b9a.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: move gmac0 node to keep the nodes alphanumerically
sorted, dropped status property on the PHY node, added missing blank
line]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add FLEXCOMs to the SAMA7D65 SoC device tree.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/d474fcd850978261ac889950ac1c3a36bc6d3926.1743523114.git.Ryan.Wanner@microchip.com
[claudiu.beznea: use vendor specific properties at the end of the node,
align DMA entries, add missing spaces]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add support for GMAC interfaces on SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/05b107796b6f3a173d0dd0a5b2107b675cfd994e.1743523114.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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NAND did not work on my USB-A9263. I discovered that the offending
commit converted the PIO bank for chip selects wrongly, so all A9263
boards need to be fixed.
Fixes: 1004a2977bdc ("ARM: dts: at91: Switch to the new NAND bindings")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20250402210446.5972-2-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Only the LPW variant has the external RTC. Move it to that board
specific DT. As a result, the common include for A9G20 boards can
go now.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20250402204856.5197-5-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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All devices use equal parameters in 'chosen'. So, the memory node can
be put into the most generic DTSI.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20250402204856.5197-4-wsa+renesas@sang-engineering.com
[claudiu.beznea: s/can bet put/can be put/g in commit description]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Do not use the kernel command line for specifying the default serial
console.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20250402204856.5197-3-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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All devices have 64MB RAM. So, the memory node can be put into the
most generic DTSI.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20250402204856.5197-2-wsa+renesas@sang-engineering.com
[claudiu.beznea: s/can bet put/can be put/g in commit description]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Dataflash did not work on my board. After checking schematics and using
the proper GPIO, it works now. Also, make it active low to avoid:
flash@0 enforce active low on GPIO handle
Fixes: 2432d201468d ("ARM: at91: dt: usb-a9263: add dataflash support")
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250404112742.67416-2-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Schematics and board layout indicate that versions with a dataflash
instead of an EEPROM might exist. Let's handle that once we have
hardware to test.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250403064336.4846-2-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Set ADC trigger edge type property as interrupt edge rising value.
Signed-off-by: Nayab Sayed <nayabbasha.sayed@microchip.com>
Link: https://lore.kernel.org/r/20250304-sama7g5-hw-trigger-enable-v1-1-61b5618285f0@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add watchdog timer support for SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/05785a34b9181b7debb57c1896cc733bd3088c56.1740675317.git.Ryan.Wanner@microchip.com
[claudiu.beznea: fixed conflict]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Enable shutdown controller to support shutdown and wake up.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/c31c40eb388b2fc0ad6ee17ed2e23bcd04e8e1c8.1740671156.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add SFRBU support to the SAMA7D65 SoC. This is required to change the power
source for backup mode for the SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/dbc51f95f301c106c031fb93f84d0d847e818d91.1740671156.git.Ryan.Wanner@microchip.com
[claudiu.beznea: fixed conflict]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add RTC support for the SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/fa1587ffef21a8198317062c15d8eb5c3ca6187c.1740671156.git.Ryan.Wanner@microchip.com
[claudiu.beznea: fixed conflict, keep nodes sorted by their addresses]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add shutdown controller support for SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/ffc76b757cd1ba4ca38947f8b30525b848aa8ad7.1740671156.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add Reset Controller support to SAMA7D65 SoC.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/a9620ff11456a1ddfb9c289421606602193ce5b6.1740671156.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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They should be named "usb@".
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250226084938.3436-10-wsa+renesas@sang-engineering.com
[claudiu.beznea: replace at91 w/ microchip in commit title]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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The board was made by Calao, not by Atmel.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20250226084938.3436-9-wsa+renesas@sang-engineering.com
[claudiu.beznea: replaced at91 w/ microchip in commit title]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Enable DMA interface for sama7d65_curiosity board.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/e233ab028123bd91b1de7b0f02eb966d719cc0af.1739555984.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add DMAs to the SAMA7D65 SoC device tree.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/78da4125a991c6f4081fce78825f1f983091e0f5.1739555984.git.Ryan.Wanner@microchip.com
[claudiu.beznea: dropped extra space in reg property of dma0]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add chipID for the sama7d65 SoC to the device tree.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/14e6cafb64df345e6bd79ac96961248cc266770c.1739555984.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add PAC1934 support in order to monitor the board power consumption.
Device is connected on flexcom10 in twi mode.
[root@SAMA7D65 ~]$ awk -f pac1934.awk
VDD3V3 current: 146.173 mA, voltage: 3302.73 mV
VDDIODDR current: 62.1356 mA, voltage: 1353.96 mV
VDDCORE current: 242.248 mA, voltage: 1204.36 mV
VDDCPU current: 213.565 mA, voltage: 1303.05 mV
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250211143302.4102-3-mihai.sain@microchip.com
[claudiu.beznea: kept pinctrl nodes alphanumerically sorted in the
pinctrl container]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add flexcom 10 node and its i2c-controller subnode
for usage on the SAMA7D65 Curiosity board.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250211143302.4102-2-mihai.sain@microchip.com
[claudiu.beznea: use compatible, reg, ranges order in flexcom node]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Adhere to DT schema. Found by 'make dtbs_check'.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20250131210236.36212-10-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Adhere naming to DT schema. And remove the unneeded #*-cells. Found by
'make dtbs_check'.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20250131210236.36212-9-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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The company was named "Calao", not "Caloa".
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20250131210236.36212-8-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Default DTs should be minimal. It is cumbersome carrying a custom patch
disabling the heartbeat just to use the LED for own cases.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20250131162611.33338-6-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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It is active high per testing via sysfs. Also matches the very similar
usb_a9263 variant.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20250131162611.33338-5-wsa+renesas@sang-engineering.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add device tree support for the SAMA7D65 Curiosity board.
Update the Makefile to include the new device tree file.
uart6 is related to flexcom6, hence not sorted in alphabetical order.
Signed-off-by: Romain Sioen <romain.sioen@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Link: https://lore.kernel.org/r/20250107160850.120537-6-Ryan.Wanner@microchip.com
[claudiu.beznea: moved chosen node after alias for aphanumerically
sortage, added a space in front of <PIN_PD19__FLEXCOM6_IO1> for
alignment]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add Device Tree for sama7d65 SoC.
Co-developed-by: Dharma Balasubiramani <dharma.b@microchip.com>
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
Co-developed-by: Romain Sioen <romain.sioen@microchip.com>
Signed-off-by: Romain Sioen <romain.sioen@microchip.com>
Co-developed-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/20250107160850.120537-5-Ryan.Wanner@microchip.com
[claudiu.beznea: dropped comma typo from copyright, dropped space in
front of slow_xtal node, dropped empty space after slow_xtal node]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Since these properties are common for all spi subnodes,
add them to SoC dtsi instead of board dts.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20241218080333.2225-3-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Since these properties are common for all spi subnodes,
add them to SoC dtsi instead of board dts.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20241218080333.2225-2-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add no-1-8-v property to sdmmc0 node to keep VDDSDMMC power rail at 3.3V.
This property will stop the LDO regulator from switching to 1.8V when the
MMC core detects an UHS SD Card. VDDSDMMC power rail is used by all the
SDMMC interface pins in GPIO mode (PA0 - PA13).
On this board, PA10 is used as GPIO to enable the power switch controlling
USB Vbus for the USB Host. The change is needed to fix the PA10 voltage
level to 3.3V instead of 1.8V.
Fixes: 5d4c3cfb63fe ("ARM: dts: at91: sama5d27_wlsom1: add SAMA5D27 wlsom1 and wlsom1-ek")
Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Tested-by: Andrei Simion <andrei.simion@microchip.com>
Link: https://lore.kernel.org/r/20241119160107.598411-3-cristian.birsan@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add no-1-8-v property to sdmmc0 node to keep VDDSDMMC power rail at 3.3V.
This property will stop the LDO regulator from switching to 1.8V when the
MMC core detects an UHS SD Card. VDDSDMMC power rail is used by all the
SDMMC interface pins in GPIO mode (PA0 - PA13).
On this board, PA6 is used as GPIO to enable the power switch controlling
USB Vbus for the USB Host. The change is needed to fix the PA6 voltage
level to 3.3V instead of 1.8V.
Fixes: d85c4229e925 ("ARM: dts: at91: sama5d29_curiosity: Add device tree for sama5d29_curiosity board")
Suggested-by: Mihai Sain <mihai.sain@microchip.com>
Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
Tested-by: Andrei Simion <andrei.simion@microchip.com>
Link: https://lore.kernel.org/r/20241119160107.598411-2-cristian.birsan@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add sama7d65 pin descriptions.
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/a8f880b89cd4470526a2955a0b6aaaaa24ba65b8.1733505542.git.Ryan.Wanner@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add PAC1934 support in order to monitor the board power consumption.
Device is connected on flexcom7 in twi mode.
[root@SAM9X75 ~]$ awk -f pac1934.awk
VDD3V3 current: 10.675 mA, voltage: 3295.41 mV
VDDOUT4 current: 5.7625 mA, voltage: 1196.78 mV
VDDCORE current: 115.442 mA, voltage: 1243.65 mV
VDDIODDR current: 29.585 mA, voltage: 1345.21 mV
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20241122080523.3941-3-mihai.sain@microchip.com
[claudiu.beznea: s/VDDOUT4/DCDC4 to comply with schematics]
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Since these properties are common for all i2c subnodes,
move them to SoC dtsi from board dts.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/20241122080523.3941-2-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add device tree file for sam9x75 curiosity board.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Reviewed-by: Hari Prasath Gujulan Elango <hari.prasathge@microchip.com>
Link: https://lore.kernel.org/r/20241010120444.93252-1-varshini.rajendran@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add device tree file for SAM9X7 SoC family.
Co-developed-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Link: https://lore.kernel.org/r/20241010120432.93151-1-varshini.rajendran@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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dtbs_check warnings:
leds: 'd[0-9]', 'ds[0-9]' do not match any of the regexes :
'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
leds: 'red', 'green', 'blue' do not match any of regexes :
'(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Rename the led sub nodes according to devicetree specification and
leds-gpio.yaml and for aks-cdu add label property and use the old node
name as value to stay stable and avoid breaking the userspace applications
that depend on those paths.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
Link: https://lore.kernel.org/r/20241002123010.111028-4-andrei.simion@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Rename the pmic node according to the devicetree specification.
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
Link: https://lore.kernel.org/r/20241002123010.111028-3-andrei.simion@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Align the eeprom nodename according to devicetree specification and
at24.yaml
Signed-off-by: Andrei Simion <andrei.simion@microchip.com>
Link: https://lore.kernel.org/r/20241002123010.111028-2-andrei.simion@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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Add PAC1934 support in order to monitor the board power consumption.
Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20240923064932.5797-5-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
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