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path: root/drivers/clk/renesas/r9a06g032-clocks.c
AgeCommit message (Expand)Author
2023-09-18clk: renesas: r9a06g032: Name anonymous structsRalph Siemsen
2023-09-18clk: renesas: r9a06g032: Fix kerneldoc warningRalph Siemsen
2023-09-11clk: renesas: r9a06g032: Use for_each_compatible_node()Yang Yingliang
2023-06-08clk: renesas: r9a06g032: Add a determine_rate hookMaxime Ripard
2023-03-10clk: renesas: r9a06g032: Improve clock tablesRalph Siemsen
2023-03-10clk: renesas: r9a06g032: Document structsRalph Siemsen
2023-03-10clk: renesas: r9a06g032: Drop unused fieldsRalph Siemsen
2023-03-10clk: renesas: r9a06g032: Improve readabilityRalph Siemsen
2023-01-17soc: renesas: r9a06g032-sysctrl: Handle h2mode setting based on USBF presenceHerve Codina
2022-11-01clk: renesas: r9a06g032: Repair grave increment errorMarek Vasut
2022-06-06clk: renesas: r9a06g032: Fix UART clkgrp bitselRalph Siemsen
2022-06-06clk: renesas: r9a06g032: Drop some unused fieldsRalph Siemsen
2022-05-29Merge tag 'dmaengine-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds
2022-05-19clk: renesas: r9a06g032: Probe possible childrenMiquel Raynal
2022-05-19clk: renesas: r9a06g032: Export function to set dmamuxMiquel Raynal
2022-04-28clk: renesas: r9a06g032: Fix the RTC hclock descriptionMiquel Raynal
2021-05-11clk: renesas: r9a06g032: Switch to .determine_rate()Geert Uytterhoeven
2021-03-30clk: renesas: Zero init clk_init_dataGeert Uytterhoeven
2021-03-24clk: renesas: Couple of spelling fixesBhaskar Chowdhury
2020-12-07clk: renesas: r9a06g032: Drop __packed for portabilityGeert Uytterhoeven
2020-04-14clk: renesas: r9a06g032: Fix some typo in commentsChristophe JAILLET
2019-08-23clk: renesas: r9a06g032: Set GENPD_FLAG_ALWAYS_ON for clock domainGeert Uytterhoeven
2019-06-04clk: renesas: r9a06g032: Add clock domain supportGareth Williams
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd
2019-04-02clk: renesas: r9a06g032: Add missing PCI USB clockGareth Williams
2018-12-10clk: renesas: Remove usage of CLK_IS_BASICStephen Boyd
2018-09-11clk: renesas: r9a06g032: Fix UART34567 clock ratePhil Edworthy
2018-06-25clk: renesas: Renesas R9A06G032 clock driverMichel Pollet
generated by cgit (git 2.34.1) at 2024-06-18 03:10:56 +0000