diff options
| author | Zixian Zeng <sycamoremoon376@gmail.com> | 2025-09-16 21:22:53 +0800 |
|---|---|---|
| committer | Inochi Amaoto <inochiama@gmail.com> | 2025-11-18 09:17:55 +0800 |
| commit | af5eb17ff893bf6e52680a31059e1816749c2d20 (patch) | |
| tree | c9ad9ee9277df5b1337e8eb92538c6bc05311dc3 | |
| parent | 11f4d84c9f724ec4c6810567d6b9713b054bb28b (diff) | |
riscv: dts: sophgo: Enable SPI NOR node for SG2042_EVB_V2
Enable SPI NOR node for SG2042_EVB_V2 device tree
According to SG2042_EVB_V2 schematic, SPI-NOR Flash cannot support QSPI
due to hardware design. Thus spi-(tx|rx)-bus-width must be set to 1.
Signed-off-by: Han Gao <rabenda.cn@gmail.com>
Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com>
Link: https://lore.kernel.org/r/20250916-sfg-spidts-v2-4-b5d9024fe1c8@gmail.com
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Chen Wang <wangchen20@iscas.ac.cn>
| -rw-r--r-- | arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts index 0cd0dc0f537c..b2ceae2d8829 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts +++ b/arch/riscv/boot/dts/sophgo/sg2042-evb-v2.dts @@ -238,6 +238,18 @@ status = "okay"; }; +&spifmc1 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; +}; + &uart0 { pinctrl-0 = <&uart0_cfg>; pinctrl-names = "default"; |